Display device

Abstract

A display device includes: a substrate including an upper surface and a lower surface; a pixel circuit layer on the upper surface of the substrate; an organic emission layer on the pixel circuit layer; and a bent portion including a wiring layer, a first urethane resin layer, and a second urethane resin layer, the wiring layer being electrically connected to the pixel circuit layer, the first urethane resin layer covering one surface of the wiring layer, and the second urethane resin layer covering the other surface of the wiring layer.

Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2024-0039979, filed on March 22, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to display devices, and more specifically, to display devices having elongated bezels. Background Technology

[0004] The display device receives information about an image and displays the image. The display device can be used as a monitor for small products such as mobile phones or large products such as televisions.

[0005] A display device may include pixels that receive electrical signals and emit light to display an image. Each pixel may include a light-emitting element, and for example, in the case of an organic light-emitting display device, the light-emitting element may be an organic light-emitting diode (OLED). Typically, an organic light-emitting display device includes a thin-film transistor and an OLED on a substrate, and each OLED emits light. Summary of the Invention

[0006] One or more embodiments of this disclosure include a display device having an elongated bezel. However, the embodiments disclosed herein are exemplary and are not intended to limit the scope of the claims.

[0007] Additional aspects will be set forth in part in the description which follows and in part will be obvious from the description, or may be learned by practicing the embodiments presented in this disclosure.

[0008] According to one or more embodiments, a display device includes: a substrate including an upper surface and a lower surface; a pixel circuit layer on the upper surface of the substrate; an organic emitting layer on the pixel circuit layer; and a bent portion including a wiring layer, a first urethane resin layer and a second urethane resin layer, the wiring layer being electrically connected to the pixel circuit layer, the first urethane resin layer covering one surface of the wiring layer, and the second urethane resin layer covering the other surface of the wiring layer.

[0009] According to an embodiment, one end of the bent portion can be in a groove formed on one edge of the substrate.

[0010] According to an embodiment, the first urethane resin layer may include at least one through-hole, and the wiring layer and the pixel circuit layer may be electrically connected to each other through at least one through-hole of the first urethane resin layer.

[0011] According to an embodiment, the first urethane resin layer can be in direct contact with the pixel circuit layer.

[0012] According to an embodiment, the substrate may include a display area and a peripheral area, with the peripheral area surrounding the display area.

[0013] According to an embodiment, at least one through-hole in the first urethane resin layer may be located in the peripheral region.

[0014] According to an embodiment, in the peripheral region, the pixel circuit layer may include a conductive layer on a first urethane resin layer and a gate layer on the conductive layer, the gate layer being electrically connected to the conductive layer in the peripheral region.

[0015] According to an embodiment, the wiring layer can be in direct contact with the conductive layer.

[0016] According to an embodiment, the display device may further include a semiconductor layer that is in contact with both the lower surface of the gate layer and the conductive layer.

[0017] According to an embodiment, one end of the bent portion can be in a groove formed on one edge of the substrate.

[0018] According to an embodiment, the display device may further include a lower structural layer below the substrate.

[0019] According to an embodiment, the other end of the bent portion can be attached to the lower surface of the lower structural layer.

[0020] According to an embodiment, the display device may further include: a driver chip disposed on the first urethane resin layer around the other end of the bent portion.

[0021] According to an embodiment, the display device may further include a resin member configured to seal the gap between the bent portion and the underlying structural layer.

[0022] According to an embodiment, the resin component can be in direct contact with at least a portion of the lower surface of one end of the bent portion and with at least a portion of the side surface of the lower structural layer.

[0023] According to an embodiment, one end of the bent portion can directly contact the upper surface of the pixel circuit layer.

[0024] According to an embodiment, the second urethane resin layer may include at least one through-hole, and the wiring layer and the pixel circuit layer may be electrically connected to each other through at least one through-hole of the second urethane resin layer.

[0025] According to an embodiment, a portion of the second urethane resin layer can be in direct contact with the pixel circuit layer.

[0026] According to an embodiment, a portion of the first urethane resin layer may be attached to the lower surface of the pixel circuit layer.

[0027] According to an embodiment, the display device may further include: a lower structural layer below the substrate, wherein the other end of the bent portion may be attached to the lower surface of the lower structural layer. Attached Figure Description

[0028] The above and other aspects, features and advantages of embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings.

[0029] Figure 1 This is a schematic plan view of a display device according to an embodiment.

[0030] Figure 2 yes Figure 1 A schematic equivalent circuit diagram of an embodiment of the pixels of a display device.

[0031] Figure 3 yes Figure 1 A schematic cross-sectional view of a region in an embodiment of the display device.

[0032] Figure 4 It is a diagram. Figure 1 A schematic cross-sectional view of a region in another embodiment of the display device.

[0033] Figure 5 It is a diagram. Figure 1 A schematic cross-sectional view of a region in another embodiment of the display device.

[0034] Figure 6 It is a diagram. Figure 1 A schematic cross-sectional view of another area in an embodiment of the display device.

[0035] Figure 7 yes Figure 6 A cross-sectional view of the region in the embodiment of the bent portion shown in the figure.

[0036] Figure 8 It is a diagram. Figure 6 A schematic cross-sectional view of an example area in an embodiment of the display panel.

[0037] Figure 9 It is a diagram. Figure 6 A schematic cross-sectional view of an example of another area in an embodiment of the display panel.

[0038] Figure 10 It is a diagram. Figure 1 A schematic cross-sectional view of an example area in an embodiment of the display device.

[0039] Figure 11 Based on Figure 10 A cross-sectional view of the area of ​​the display device with the bent portion. Detailed Implementation

[0040] The following describes in detail some exemplary embodiments illustrated in the accompanying drawings. In this regard, the exemplary embodiments may take different forms and should not be construed as limited to the description set forth herein. Rather, the embodiments described below and illustrated in the accompanying drawings are provided merely to illustrate aspects of this description. Various modifications can be applied to the exemplary embodiments. Effects and features, as well as methods for implementing them, are illustrated with reference to the embodiments described below. However, embodiments may take different forms and should not be construed as limited to the description set forth herein.

[0041] In the following description, embodiments will now be described in detail with reference to the accompanying drawings. When describing with reference to the drawings, the same or corresponding elements may be given the same reference numerals, and redundant descriptions of these elements may be omitted.

[0042] In the following embodiments, an element such as a layer, film, region, or plate referred to as "on" another element means that the element may be "directly" on the other element, or "indirectly" on the other element with an intermediary element therein. Additionally, in the following embodiments, an element such as a layer, film, region, or plate referred to as "below" another element means that the element may be "directly" below the other element, or "indirectly" below the other element with an intermediary element therein.

[0043] For ease of illustration or depiction, the dimensions of elements in the accompanying drawings may be exaggerated or otherwise altered. For example, for ease of illustration, the dimensions, thicknesses, and scales of elements in the drawings may be arbitrarily illustrated, and the embodiments disclosed herein are not limited to the dimensions, thicknesses, or scales illustrated. That is, for ease of description and clarity, the dimensions, thicknesses, and scales of elements shown in the accompanying drawings may be exaggerated and / or simplified.

[0044] Spatial relative terms such as “below,” “under,” “above,” “over,” and “above” can be used herein to readily describe the relationships between elements and features. Such spatial relative terms can describe spaces, orientations, etc., as shown in the accompanying drawings, but can be understood to describe various other orientations or viewpoints. For example, when the device or element shown in the drawings is flipped, a device or element described as “below” that device or element can be interpreted as being located in a different orientation (e.g., rotated 90 degrees or located in the opposite direction). Accordingly, the terms “below” or “under” and “above,” “over,” or “above” can include both upward and downward directions. Furthermore, devices or elements may be oriented differently than those shown in the accompanying drawings, and the descriptions of space or orientation herein can be interpreted in various ways.

[0045] In this specification, the order of processes or methods described in the description of processing techniques, manufacturing methods, etc., may differ from the order described herein. For example, two processes or methods described consecutively may be performed simultaneously or substantially simultaneously, or may be performed in the reverse order from that described herein.

[0046] In the following embodiments, the x-axis, y-axis, and z-axis directions are not limited to the directions corresponding to the three axes of the Cartesian coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis directions can be orthogonal to each other, or they can refer to different directions that are not orthogonal to each other.

[0047] As used herein, the terms “first,” “second,” “third,” etc., can be used to describe a specific element, and the terms “first,” “second,” “third,” etc., can be used to distinguish one element from another.

[0048] An element referred to as "connected" or "coupled" to another element means that the element can be directly or indirectly connected to or coupled to the other element. Similarly, when an element is referred to as "electrically connected" to another element, the element and the other element can be directly electrically connected or can be indirectly electrically connected via a conductive element therebetween.

[0049] An element referred to as an element between two elements means that the element is the only element between the two elements, or that another element is also between the two elements.

[0050] As used herein, unless the context explicitly indicates otherwise, the singular forms “a” and “the (said)” are intended to also include the plural forms.

[0051] Expressions such as “mixture,” “composite,” “having,” “including,” “comprising”, etc., indicate the presence of features, integers, steps, operations, elements, and / or components described herein, but do not exclude the presence or addition of one or more features, integers, steps, operations, elements, components, and / or groups thereof.

[0052] The term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" indicates A, B, or A and B. The expression "at least one" can be used to refer to one or more elements among a plurality of elements. For example, the expressions "at least one of a, b, and c" and "at least one selected from the group consisting of a, b, and c" can indicate "a", "b", "c", "a and b", "b and c", "a and c", or "a, b, and c".

[0053] Terms such as “basically” and “approximately” and other similar terms are used as terms of approximation rather than degree, and may be intended to describe inherent biases in measured or calculated values ​​that can be recognized by a person skilled in the art.

[0054] In this specification, a layer having the same layer structure as another layer can mean that multiple layers included in that one layer can be included in that other layer in the same order. For example, multiple layers included in that one layer and multiple layers included in that other layer can include the same material and can be formed in the same order.

[0055] Electronic or electrical devices and / or any other related devices or components (e.g., some of the various modules) according to one or more embodiments described herein can be constructed using any suitable hardware, firmware (e.g., application-specific integrated circuits (ICs)), software, or a combination of firmware and hardware. For example, the various components of these devices can be formed on a single IC chip or on multiple separate IC chips. Additionally, the various components of these devices can be formed on a flexible printed circuit film, a tape-on-a-chip (TCP), or a rigid printed circuit board (PCB), or on a single substrate. Furthermore, the various components of these devices can be processes or threads that run on one or more processors, execute computer program instructions on one or more computing devices, and interact with other system components to perform the various functions described herein.

[0056] Based on the foregoing description, the display device according to the embodiments will be described in detail below.

[0057] Figure 1 This is a schematic plan view of a display device according to an embodiment.

[0058] like Figure 1As shown, the display device may include a display panel 10. The display device can be any device that includes a display panel 10. For example, the display device can be various devices such as smartphones, tablets, laptops, televisions, or billboards. The display device according to an embodiment includes pixels PX, each comprising a thin-film transistor (TFT) and a capacitor, and the TFT and capacitor can be implemented by conductive layers and insulating layers in and on a substrate.

[0059] Display panel 10 includes a display area DA and a peripheral area PA located outside the display area DA. Although Figure 1 The illustration shows a rectangular display area DA, but the embodiment is not limited to this. The display area DA can have various other shapes such as circular, elliptical, other polygonal, or specific graphic shapes.

[0060] The display area DA is the area for displaying an image, and multiple pixels PX can be located within the display area DA. Each pixel PX can include a display element such as an organic light-emitting diode (OLED). Each pixel PX can emit, for example, red, green, or blue light. Each pixel PX can include pixel circuitry containing TFTs and storage capacitors, etc. The pixel circuitry can be connected to a scan line SL configured to transmit scan signals, a data line DL intersecting the scan line SL and configured to transmit data signals, and a drive voltage line PL configured to supply drive voltage. The data line DL and the drive voltage line PL can extend in the y-axis direction (hereinafter referred to as the first direction), and the scan line SL can extend in the x-axis direction (hereinafter referred to as the second direction).

[0061] Each pixel PX can emit light of a certain brightness in response to an electrical signal from a pixel circuit electrically connected to the pixel PX. The display area DA can display a specific image using the light emitted from the pixel PX. For reference, each pixel PX can be defined as an emitting area that emits light of any one of the colors red, green, and blue.

[0062] The peripheral area PA can be an area that does not include pixels PX, and can be an area where no image is displayed. Power lines configured to drive pixels PX can be in the peripheral area PA. In addition, multiple pads can be in the peripheral area PA, and the aforementioned pads can be electrically connected to each other in the peripheral area PA, such as IC devices like driver ICs or PCBs including drive circuitry portions.

[0063] For reference, since the display panel 10 includes a substrate 100, the substrate 100 may also include a display area DA and a peripheral area PA. The substrate 100 is described in detail below.

[0064] Multiple transistors can be present in the display area DA. Depending on the transistor type (N-type or P-type) and / or operating conditions, the first terminal of each of the multiple transistors can be either a source electrode or a drain electrode, and its second terminal can be an electrode different from the first terminal. For example, when the first terminal is a source electrode, the second terminal can be a drain electrode.

[0065] In each pixel circuit, multiple transistors may include a driving transistor, a data writing transistor, a compensation transistor, an initialization transistor, an emitter control transistor, etc. The driving transistor in the pixel circuit may be connected between the driving voltage line PL and the associated pixel PX of the OLED, and the data writing transistor may be connected to the data line DL and the driving transistor and configured to perform a switching operation to transmit data signals transmitted through the data line DL.

[0066] The compensation transistor can be turned on in response to the scan signal received through the scan line SL, and can be connected to the driving transistor and the OLED, thereby compensating for the threshold voltage of the driving transistor.

[0067] The initialization transistor can be turned on in response to a scan signal received via scan line SL, and can be configured to transmit an initialization voltage to the gate electrode of the driving transistor and initialize the gate electrode of the driving transistor. The scan line SL connected to the initialization transistor can be a separate scan line, different from the scan line SL connected to the compensation transistor.

[0068] The emit control transistor can be turned on in response to an emit control signal received via the emit control line, and as a result, drive current can flow through the OLED.

[0069] An OLED can include pixel electrodes (anodes) and counter electrodes (cathodes), and can receive voltage from both the pixel electrodes (anodes) and counter electrodes (cathodes). An OLED can form a portion of an image by receiving drive current from a driving transistor and emitting light with an intensity that depends on the drive current.

[0070] The bent portion 300 can be attached to the display panel 10. The bent portion 300 can be attached to the peripheral area PA of the display panel 10. The driver chip DIC and the flexible circuit board FPCB can be on one main surface of the bent portion 300. A portion of the other main surface of the bent portion 300 can be attached to the display panel 10, and the other main surface of the bent portion 300 can refer to the surface opposite to the surface to which the driver chip DIC is attached.

[0071] The bent portion 300 can be bent in one direction. For example, one end of the bent portion 300 can be attached to the display panel 10, and the bent portion 300 can be bent such that the other end of the bent portion 300 faces the back of the display panel 10.

[0072] The bent portion 300 may include multiple layers. The bent portion 300 may include wiring layers comprising conductive material, and the driver chip DIC or flexible circuit board FPCB and the pixels PX or wiring inside the display panel 10 can be electrically connected to each other through the wiring layers. For example, the bent portion 300 may be a chip-on-film. The chip-on-film may be electrically connected to one end of the substrate 100 and may contain signal wiring configured to supply electrical signals to the pixels PX in the display area DA. For example, one side of the chip-on-film may be connected to the peripheral area PA of the substrate 100. When the signal wiring is on the chip-on-film, electrical signals can be supplied through the driver chip DIC.

[0073] The bending portion 300 may contain a bendable flexible material (film or strip) and can therefore be bent in various ways. To reduce the size of the display device, the flip-chip film may have a U-shaped shape extending from the edge of the substrate 100. Bending the flip-chip film allows the driver chip (DIC) and / or flexible circuit board (FPCB) to be placed on or adjacent to the back of the display panel 10. In the process of manufacturing the display device, the flip-chip film can securely attach the driver chip (DIC) and / or flexible circuit board (FPCB) to the back of the display panel 10.

[0074] The driver chip DIC can be on a flip-chip film, and the driver chip DIC can include a data driver configured to apply a data voltage to a data line, a gate driver configured to apply a gate conduction voltage to a gate line, and a signal controller configured to control the operation of the data driver and the gate driver.

[0075] Flexible printed circuit boards (FPCBs) can be connected to the other end of a flip-chip film. For example, a flexible printed circuit board (FPCB) can be electrically and physically connected to a flip-chip film via an anisotropic conductive film (ACF).

[0076] In an embodiment, in order to electrically connect each pixel PX in the display area DA to the driver chip DIC and / or the flexible circuit board FPCB, one side of the bent portion 300 can be attached to the peripheral area PA, and the other side of the bent portion 300 can be attached to the back of the display panel 10.

[0077] In the following description, organic light-emitting display devices are used as examples of display devices according to embodiments, but the display devices according to this disclosure are not limited thereto. In another embodiment, the display device may include an inorganic light-emitting display device (or an inorganic electroluminescent (EL) display device) or a quantum dot light-emitting display device. For example, the emitting layer of the display element included in the display device may include an organic or inorganic material. Additionally, the display device may include an emitting layer and quantum dots along the path of light emitted from the emitting layer.

[0078] Figure 2 yes Figure 1 A schematic equivalent circuit diagram of an embodiment of a pixel PX in a display device.

[0079] like Figure 2 As shown, each pixel PX may include a pixel circuit PC connected to the scan line SL and the data line DL, and an organic light-emitting diode (OLED) connected to the pixel circuit PC.

[0080] Figure 2 The pixel circuit PC in the embodiment shown includes a driving thin-film transistor Td, a switching thin-film transistor Ts, and a storage capacitor Cst. The switching thin-film transistor Ts can be connected to the scan line SL and the data line DL associated with the pixel PX, and can transmit the data signal Dm from the data line DL to the driving thin-film transistor Td in response to the scan signal Sn input through the scan line SL.

[0081] The storage capacitor Cst is connected to the switching thin-film transistor Ts and the drive voltage line PL, and the storage capacitor Cst stores the voltage corresponding to the difference between the voltage from the switching thin-film transistor Ts and the first power voltage ELVDD (or drive voltage) on the drive voltage line PL.

[0082] The driving thin-film transistor Td can be connected to the driving voltage line PL and the storage capacitor Cst, and in response to the voltage stored in the storage capacitor Cst, the driving thin-film transistor Td can control the driving current flowing from the driving voltage line PL to the OLED. The OLED can emit light with a certain brightness according to the driving current.

[0083] OLEDs can receive a second electrical voltage ELVSS (or common voltage). For example, an OLED can be configured to receive the second electrical voltage ELVSS (or common voltage) through an electrode (cathode) opposite to an electrode (anode) directly connected to the pixel circuit PC, and the OLED can emit light with a specific brightness based on the drive current driven by the voltage difference between the first electrical voltage ELVDD (or drive voltage) and the second electrical voltage ELVSS (or common voltage).

[0084] although Figure 2 The illustration shows a pixel circuit PC including two thin-film transistors and a storage capacitor, but embodiments of this disclosure are not limited thereto. For example, the pixel circuit PC may include two or more storage capacitors and may include three or more TFTs or other types of transistors.

[0085] Figure 3 It is a diagram. Figure 1A schematic cross-sectional view of an area of ​​an example embodiment of the display device. Figure 3 The cross-section shown is based on pixels PX in the display area DA.

[0086] As described above, substrate 100 may include regions corresponding to display area DA and peripheral region PA outside display area DA. Substrate 100 may include various flexible or bendable materials. For example, substrate 100 may include glass, metal, or polymer resin. Additionally, substrate 100 may include polymer resins such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide, polyarylate, polyimide (PI), polycarbonate, or cellulose acetate propionate. Various modifications are possible. For example, substrate 100 may have a multilayer structure comprising two layers, each comprising a polymer resin, and a barrier layer between the two layers, the barrier layer comprising an inorganic material (e.g., silicon oxide, silicon nitride, or silicon oxynitride).

[0087] A buffer layer 101 may be disposed on the substrate 100. The buffer layer 101 can serve as a barrier layer and / or inhibiting layer to prevent the diffusion of impurity ions, prevent the penetration of moisture or external air, and flatten or planarize the surface on which other layers are formed. The buffer layer 101 may comprise silicon oxide, silicon nitride, or silicon oxynitride. Furthermore, the buffer layer 101 may be configured to adjust the heat transfer rate during the crystallization process for forming the semiconductor layer S1, so that the semiconductor layer S1 can be crystallized uniformly.

[0088] The first conductive layer SD1 may be on the buffer layer 101. The first conductive layer SD1 may include at least one metal selected from aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu). For example, the first conductive layer SD1 may include a Ti layer, an Al layer, and / or a Cu layer. For example, the first conductive layer SD1 may have a Ti / Al / Ti structure.

[0089] A first inorganic insulating layer IL1 may be present on the buffer layer 101. The first inorganic insulating layer IL1 may cover the first conductive layer SD1. The first inorganic insulating layer IL1 may comprise inorganic materials such as silicon oxide, silicon nitride, and / or silicon oxynitride. Furthermore, the first inorganic insulating layer IL1 may substantially cover the entire surface of the substrate 100 and may also have a structure including contact holes. The first inorganic insulating layer IL1 may be formed using chemical vapor deposition (CVD) or atomic layer deposition (ALD). Embodiments and modifications thereof described further below may use similar or identical processes to form the first inorganic insulating layer IL1. The first inorganic insulating layer IL1 may include vias, through which the first conductive layer SD1 may be connected to the semiconductor layer S1, which will be described below. As a result, the first inorganic insulating layer IL1 may surround the side surface of the first conductive layer SD1.

[0090] Semiconductor layer S1 may cover the first inorganic insulating layer IL1 and the first conductive layer SD1. Semiconductor layer S1 may include polysilicon and may include an undoped channel region and source and drain regions that can be formed by doping impurities on the opposite side of the channel region. In this case, the impurities may vary depending on the type of TFT and may include N-type or P-type impurities. Although not shown in the figures, the display device according to one or more embodiments may further include another semiconductor layer on which transistors are formed. Second inorganic insulating layer IL2 is a gate insulating layer and may be disposed on semiconductor layer S1. Second inorganic insulating layer IL2 may provide electrical insulation between semiconductor layer S1 and gate layer GT. Second inorganic insulating layer IL2 may include inorganic materials such as silicon oxide, silicon nitride, and / or silicon oxynitride, and may be between semiconductor layer S1 and gate layer GT. In addition, second inorganic insulating layer IL2 may cover the entire surface of substrate 100 and may have a structure including contact holes. As described above, inorganic insulating layers IL1 or IL2 comprising inorganic materials may be formed by using CVD or ALD.

[0091] The gate layer GT may be on the second inorganic insulating layer IL2. The gate layer GT may be patterned to overlap the semiconductor layer S1 perpendicularly, and may include at least one metal selected from Mo, Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, lithium (Li), Ca, Ti, W, and Cu. The display device according to one or more embodiments may further include another gate layer (not shown) configured to cover another semiconductor layer of other transistors. In a plan view, the area of ​​the gate layer GT may be smaller than the area of ​​the semiconductor layer S1.

[0092] The third inorganic insulating layer IL3 is an interlayer insulating layer and can be disposed on the gate layer GT. The third inorganic insulating layer IL3 can cover the gate layer GT. The third inorganic insulating layer IL3 can include inorganic materials. For example, the third inorganic insulating layer IL3 can include metal oxides or metal nitrides, and more specifically, the inorganic material can include silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x N y The materials used are aluminum oxide (Al₂O₃), titanium oxide (TiO₂), tantalum oxide (Ta₂O₅), hafnium oxide (HfO₂), or zinc oxide (ZrO₂). In some embodiments, the third inorganic insulating layer IL₃ may have SiO₂. x / SiN y or SiN x / SiO y The dual structure.

[0093] The second conductive layer SD2 can be disposed on the third inorganic insulating layer IL3. The second conductive layer SD2 can serve as an electrode connected to the source / drain region of the semiconductor layer S1 via vias extending through the third inorganic insulating layer IL3 and the second inorganic insulating layer IL2. The second conductive layer SD2 may include at least one metal selected from Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. For example, the second conductive layer SD2 may include a Ti layer, an Al layer, and / or a Cu layer. For example, the second conductive layer SD2 may have a Ti / Al / Ti structure.

[0094] Although not shown in the accompanying drawings, the display device according to one or more embodiments may further include another conductive layer disposed on another insulating layer. For example, the other conductive layer may serve as a wiring layer. The other conductive layer may comprise the same material and have the same layer structure as the first conductive layer SD1 and / or the second conductive layer SD2.

[0095] An organic insulating layer OL1 may be disposed on the second conductive layer SD2. The organic insulating layer OL1 covers the upper portion of the second conductive layer SD2 and has a generally flat top surface, thus serving as a planarization layer. The organic insulating layer OL1 may comprise organic materials such as acrylic resin, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). Various modifications are possible. The organic insulating layer OL1 may comprise a single-layer or multi-layer structure.

[0096] Although not shown in the accompanying drawings, the display device according to one or more embodiments may further include another organic insulating layer covering the first organic insulating layer OL1. The other organic insulating layer may be disposed on the aforementioned other conductive layer and may serve as a planarization layer by covering the upper portion of the other conductive layer. The other organic insulating layer and the aforementioned organic insulating layer OL1 may comprise the same material and have the same layer structure.

[0097] The pixel electrode PE can be on the organic insulating layer OL1. Alternatively, the pixel electrode PE can be on another organic insulating layer as described above. However, for ease of description, an example in which the pixel electrode PE is disposed on the organic insulating layer OL1 is described below.

[0098] The pixel electrode PE can be connected to the second conductive layer SD2 through contact holes formed in the organic insulating layer OL1. A display element including the pixel electrode PE can be disposed on the organic insulating layer OL1. Organic light-emitting materials can be used in the display element. That is, organic light-emitting materials can be disposed, for example, on the pixel electrode PE. The pixel electrode PE can include a transparent conductive layer and / or a reflective layer, wherein the transparent conductive layer includes a transparent conductive oxide such as indium tin oxide (ITO), indium oxide (In2O3), or indium zinc oxide (IZO), and the reflective layer includes a metal such as Al or Ag. For example, the pixel electrode PE can have a three-layer structure of ITO / Ag / ITO.

[0099] The pixel defining layer OL2 may be on the organic insulating layer OL1 and may cover the edge of the pixel electrode PE. The pixel defining layer OL2 may have an opening corresponding to the pixel PX, and the opening may expose at least the central portion of the pixel electrode PE. The pixel defining layer OL2 may thus define the opening corresponding to the pixel PX.

[0100] The pixel defining layer OL2 may include organic materials such as PI or HMDSO. Additionally, spacers (not shown) may be disposed on the pixel defining layer OL2. The spacers (not shown) prevent damage to the OLED due to mask sagging during the manufacturing process using a mask. The spacers (not shown) may include organic insulating materials and may comprise a single-layer or multi-layer structure.

[0101] The intermediate layer EL and the counter electrode OE can be located within the aforementioned opening. The intermediate layer EL can comprise a low molecular weight material or a polymer material. When the intermediate layer EL comprises a low molecular weight material, it can comprise a hole injection layer, a hole transport layer, an emitter layer, an electron transport layer, and / or an electron injection layer. When the intermediate layer EL comprises a polymer material, it can typically have a structure including a hole transport layer and an emitter layer.

[0102] The structure of the intermediate layer EL is not limited to those described above and can have various structures. For example, at least one of the layers forming the intermediate layer EL can be formed as a single unit, similar to the counter electrode OE. In an embodiment, the intermediate layer EL may include a patterned layer containing separate regions corresponding to a plurality of pixel electrodes PE, respectively.

[0103] The counter electrode (OE) may comprise a light-transmitting conductive layer containing a light-transmitting conductive oxide such as ITO, In₂O₃, or IZO. The pixel electrode (PE) can be used as the anode, and the counter electrode (OE) can be used as the cathode. The polarity of the electrodes can be reversed.

[0104] The counter electrode OE can be distributed throughout the display area DA and can be located in front of the display area DA. The counter electrode OE can be formed as a single unit distributed throughout multiple pixels PX. The counter electrode OE can be electrically contacted with a common power line (not shown) in the peripheral area PA.

[0105] The thin-film encapsulation layer TFE can cover the entire display area DA and can extend to the peripheral area PA to cover at least a portion of the peripheral area PA. The thin-film encapsulation layer TFE can extend outside the common power line (not shown).

[0106] The thin-film encapsulation layer TFE may comprise a first inorganic encapsulation layer TF1, a second inorganic encapsulation layer TF3, and an organic encapsulation layer TF2, sequentially stacked in a z-axis direction perpendicular to the first and second directions. The first inorganic encapsulation layer TF1 and the second inorganic encapsulation layer TF3 may comprise at least one inorganic material selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon oxynitride, and silicon nitride. The first inorganic encapsulation layer TF1 and the second inorganic encapsulation layer TF3 may comprise a single-layer or multi-layer structure containing the aforementioned materials. The first inorganic encapsulation layer TF1 and the second inorganic encapsulation layer TF3 may comprise the same material or different materials.

[0107] The first inorganic encapsulation layer TF1 and the second inorganic encapsulation layer TF3 may have different thicknesses. The thickness of the first inorganic encapsulation layer TF1 may be greater than the thickness of the second inorganic encapsulation layer TF3. Alternatively, the thickness of the second inorganic encapsulation layer TF3 may be greater than the thickness of the first inorganic encapsulation layer TF1, or the first inorganic encapsulation layer TF1 and the second inorganic encapsulation layer TF3 may have the same thickness.

[0108] The organic encapsulation layer TF2 may comprise monomeric or polymeric materials. Polymeric materials may include acrylic resins, epoxy resins, polyimide (PI), and / or polyethylene. For example, the organic encapsulation layer TF2 may comprise acrylates.

[0109] According to an embodiment, the thin-film encapsulation layer TFE can be replaced by a cover member that covers the entire display area DA. The cover member can cover at least a portion of the peripheral area PA and the display area DA. The cover member can include a rigid member (e.g., glass). In some cases, a transparent filler can be present between the cover member and the counter electrode OE.

[0110] Figure 4 It is a diagram. Figure 1 A schematic cross-sectional view of a region of another embodiment of the display device, and Figure 5 It is a diagram. Figure 1 A schematic cross-sectional view of a region of another embodiment of the display device. For reference, Figure 4 and Figure 5 The cross-section shown corresponds to pixel PX in the display area DA. For ease of description, Figure 4 and Figure 5 The description of the embodiments shown in the figure focuses primarily on the relationship with Figure 3 The differences are in the embodiments shown.

[0111] like Figure 4 As shown, the first conductive layer SD1 can be disposed on the buffer layer 101. The first inorganic insulating layer IL1 can be disposed on the buffer layer 101. The first inorganic insulating layer IL1 can cover the first conductive layer SD1.

[0112] The gate layer GT can be disposed on the first inorganic insulating layer IL1. The gate layer GT can be formed in a trench in the first inorganic insulating layer IL1. The second inorganic insulating layer IL2 can be on the first inorganic insulating layer IL1. The second inorganic insulating layer IL2 can also be on the gate layer GT. The second inorganic insulating layer IL2 can cover the upper surface of the gate layer GT.

[0113] The semiconductor layer S1 may be on the second inorganic insulating layer IL2. The first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 may include a common via. The first conductive layer SD1 may be connected to the semiconductor layer S1 through the via in the first inorganic insulating layer IL1 and the second inorganic insulating layer IL2.

[0114] The third inorganic insulating layer IL3 can be on the semiconductor layer S1. The third inorganic insulating layer IL3 can cover the semiconductor layer S1. The organic insulating layer OL1 can be on the third inorganic insulating layer IL3.

[0115] and Figure 3 The embodiments differ, and can be implemented in different ways. Figure 4 In the embodiment shown, the second conductive layer SD2 is omitted, and the pixel electrode PE can be connected to the semiconductor layer S1 through vias formed in the third inorganic insulating layer IL3 and the organic insulating layer OL1.

[0116] like Figure 5 As shown, the first conductive layer SD1 may be on the buffer layer 101. The first inorganic insulating layer IL1 may be on the buffer layer 101 and may cover the first conductive layer SD1.

[0117] A second inorganic insulating layer IL2 may be disposed on the first inorganic insulating layer IL1. A gate layer GT may be disposed on the second inorganic insulating layer IL2. The gate layer GT may be disposed in a trench formed in the second inorganic insulating layer IL2. A third inorganic insulating layer IL3 may be disposed on the second inorganic insulating layer IL2. The third inorganic insulating layer IL3 may cover the gate layer GT.

[0118] The semiconductor layer S1 may be on the third inorganic insulating layer IL3. The first inorganic insulating layer IL1, the second inorganic insulating layer IL2, and the third inorganic insulating layer IL3 may include a common via. The first conductive layer SD1 may be connected to the semiconductor layer S1 through the via formed commonly in the first inorganic insulating layer IL1, the second inorganic layer IL2, and the third inorganic insulating layer IL3.

[0119] The fourth inorganic insulating layer IL4 can be on the semiconductor layer S1. The organic insulating layer OL1 can be on the fourth inorganic insulating layer IL4.

[0120] and Figure 3 The embodiments differ, and can be implemented in different ways. Figure 5 In the embodiment, the second conductive layer SD2 is omitted, and the pixel electrode PE can be connected to the semiconductor layer S1 through vias formed in the fourth inorganic insulating layer IL4 and the organic insulating layer OL1.

[0121] Figure 6 It is a diagram. Figure 1 A schematic cross-sectional view of another area in an embodiment of the display device, and Figure 7 yes Figure 6 The cross-sectional view of the bent portion 300 shown is illustrated in the figure. For reference, with... Figures 3 to 5 different, Figure 6 The cross-section shown is a cross-section of one edge of the display panel 10, and may include a cross-section of the peripheral region PA and a cross-section of the display region DA.

[0122] like Figure 6 As shown, the display device according to the embodiment may include a substrate 100, a pixel circuit layer 110 on the substrate 100, a lower structure layer 200 below the substrate 100, a polarizing layer 130, an adhesive layer 140, a window layer 150, a light-shielding material layer BM, a resin component RS, an insulating component HS, a driver chip DIC, and a flexible circuit board FPCB.

[0123] In an embodiment, the display device may further include an organic emitting layer 120. The substrate 100 has an upper surface and a lower surface. A pixel circuit layer 110 is located on the upper surface of the substrate 100, and the organic emitting layer 120 is located on the pixel circuit layer 110. The display device may further include a bent portion 300 electrically connected to the pixel circuit layer 110.

[0124] Pixel circuit layer 110 may be a term used herein for ease of description. Pixel circuit layer 110 may refer to the elements between substrate 100 and organic emitter layer 120. Pixel circuit layer 110 may be on substrate 100.

[0125] exist Figure 3 Among the components shown, the pixel circuit layer 110 may include a buffer layer 101, a semiconductor layer S1, a first inorganic insulating layer IL1, a second inorganic insulating layer IL2, a third inorganic insulating layer IL3, a gate layer GT, a first conductive layer SD1, a second conductive layer SD2, and an organic insulating layer OL1 on the substrate 100. For example, the pixel circuit layer 110 may refer to... Figure 3 The element located below the pixel electrode PE and above the substrate 100.

[0126] exist Figure 4 Among the components shown, the pixel circuit layer 110 may include a buffer layer 101, a semiconductor layer S1, a first inorganic insulating layer IL1, a second inorganic insulating layer IL2, a third inorganic insulating layer IL3, a gate layer GT, a first conductive layer SD1, and an organic insulating layer OL1 on the substrate 100. For example, the pixel circuit layer 110 may refer to... Figure 4 The element located below the pixel electrode PE and above the substrate 100.

[0127] exist Figure 5 Among the components shown, the pixel circuit layer 110 may include a buffer layer 101, a semiconductor layer S1, a first inorganic insulating layer IL1, a second inorganic insulating layer IL2, a third inorganic insulating layer IL3, a fourth inorganic insulating layer IL4, a gate layer GT, a first conductive layer SD1, and an organic insulating layer OL1 on the substrate 100. For example, the pixel circuit layer 110 may refer to... Figure 5 The element located below the pixel electrode PE and above the substrate 100.

[0128] The organic emitting layer 120 can generate light. The organic emitting layer 120 can be disposed on the pixel circuit layer 110. For example, the organic emitting layer 120 may include a pixel electrode PE, an intermediate layer EL, and a counter electrode OE. The organic emitting layer 120 can be disposed on the pixel circuit layer 110.

[0129] The polarization layer 130 may be located on the organic emitting layer 120. The polarization layer 130 can prevent or suppress the reflection of external light incident on the display device, thereby improving the display quality of the display device. For this purpose, the polarization layer 130 may at least cover the display area DA of the display device.

[0130] The polarization layer 130 can be configured to convert natural light or any polarized light into light that is linearly polarized in a specific direction, and can include a linearly polarized light layer (not shown) for reducing the reflection of external light and a phase difference layer (not shown) for shifting the phase of the incident light by λ / 4. Accordingly, the phase difference layer (not shown) can change linearly polarized light into circularly polarized light, or change circularly polarized light into linearly polarized light.

[0131] The adhesive layer 140 may be on the polarizing layer 130. The adhesive layer 140 may include pressure-sensitive adhesive (PSA), optically transparent adhesive (OCA), or optically transparent resin (OCR). The adhesive layer 140 may be between the window layer 150 and the polarizing layer 130, and may attach the lower surface of the window layer 150 and the upper surface of the polarizing layer 130 to each other.

[0132] A window layer 150 may be on the adhesive layer 140. In a plan view, the window layer 150 may be divided into a transparent area (not shown) and a light-blocking area (not shown). In a plan view, the light-blocking area (not shown) may surround the transparent area (not shown). A light-blocking material layer BM on the lower surface of the window layer 150 may define a light-blocking area (not shown). In a plan view, the light-blocking area (not shown) may refer to the area containing the light-blocking material layer BM. In a plan view, the transparent area (not shown) may refer to the area where the light-blocking material layer BM is not present.

[0133] A light-shielding material layer BM may be located on a portion of the lower surface of window layer 150. For example, the light-shielding material layer BM may extend along the edge of window layer 150. The light-shielding material layer BM may have a specific width starting from the edge of window layer 150. The light-shielding material layer BM may correspond to the bezel of the display device and may need to be wide enough to overlap with or conceal the bend in the bend portion 300. Display devices with elongated bezels may therefore require sharp bends in the bend portion 300, but sharp bends in the bend portion 300 and at the electrical connection between the bend portion 300 and the substrate 100 create stress. As further described below, the structure of the bend portion 300 according to some embodiments of the present disclosure is capable of withstanding sharp bends and can be securely attached to provide electrical connection.

[0134] The light-shielding material layer BM can be a black matrix and can include various materials capable of absorbing at least a portion of light. For example, the light-shielding material layer BM can include at least one of carbon black, graphite, chromium-based materials, dyes, metal-based reflective films, and light-absorbing films.

[0135] The lower structural layer 200 may be located below the substrate 100. The lower structural layer 200 may include a first protective sheet 210 below the substrate 100 and a second protective sheet 220 below the first protective sheet 210. The lower structural layer 200 may further include a digital converter 230 below the second protective sheet 220 and a metal sheet layer 240 below the digital converter 230.

[0136] The first protective sheet 210 may include a polymer component. The polymer component of the first protective sheet 210 may have a dark color (e.g., black) to help display the background when the display device is turned off. As an example, the polymer component may act as a pad to absorb impacts from outside the display device and prevent damage to the display panel 10.

[0137] The second protective layer 220 can be a pad. The pad can prevent or significantly reduce damage to the display panel 10 and the digitizer 230 that external impacts might otherwise cause. For example, the upper or lower surface of the pad may include at least one uneven surface, and the uneven surface can absorb external impacts. For example, the pad may have a porous structure including multiple air gaps. The porous structure of the pad can absorb external impacts.

[0138] The digitizer 230 may include a patterned layer for detecting signals input from an external electronic pen or the like. Specifically, the digitizer 230 can detect the intensity or direction of the signals input from the electronic pen or the like. The digitizer 230 may be electrically connected to a separately provided main circuit board. However, embodiments according to this disclosure are not limited thereto.

[0139] The metal sheet 240 can help strengthen the rigidity of the display device and can also serve as noise shielding and to dissipate heat from surrounding heat-generating components. As an example, the metal sheet 240 may include at least one of stainless steel (SUS) (e.g., stainless steel (STS)), Cu, Al, and CLAD (e.g., stacked members in which SUS and Al are arranged alternately). Alternatively, the metal sheet 240 may include other alloy materials.

[0140] The resin component RS can seal the gap between the bent portion 300 and the lower structural layer 200. The resin component RS can be in direct contact with at least a portion of the lower surface of one end 300a of the bent portion 300 and at least a portion of the side surface of the lower structural layer 200. For example, the upper surface of one end 300a of the bent portion 300 can be attached to the lower surface of the pixel circuit layer 110, and the resin component RS can cover the lower surface of one end 300a of the bent portion 300. The other end 300b of the bent portion 300 can be in direct contact with the lower structural layer 200 below the substrate 100. The driver chip DIC can be disposed on the first urethane resin layer 310 around the other end 300b of the bent portion 300.

[0141] The resin component RS can be applied along the gap between the bent portion 300 and the lower structural layer 200, and can be cured using ultraviolet light after application of the resin component RS. For example, the resin component RS may include OCR. For example, OCR may include acrylic resin, epoxy resin, silicone resin, rubber resin, etc. These can be used alone or in combination with each other.

[0142] An insulating member HS may be located on the edge of the pixel circuit layer 110. An organic emitting layer 120 may be located on the pixel circuit layer 110. In a plan view, the organic emitting layer 120 may be located in the display area DA, but may not be located in the peripheral area PA. Accordingly, in the peripheral area PA, instead of the organic emitting layer 120, the insulating member HS may be located between the pixel circuit layer 110 and the polarization layer 130.

[0143] The insulating member HS and the organic emitting layer 120 can be on the same layer. The insulating member HS can cover the area of ​​the pixel circuit layer 110 corresponding to the peripheral area PA. For example, the insulating member HS can be formed into a flat surface flush with the surface of the organic emitting layer 120, thereby helping to stably form the insulating member HS and other layers on the organic emitting layer 120. For example, the insulating member HS can include inorganic insulating materials or organic insulating materials.

[0144] First adhesive layer PSA1 and second adhesive layer PSA2 (in) Figure 10 (As shown in the diagram) may include PSA, OCA, or OCR. A first adhesive layer PSA1 can attach one end 300a of the bent portion 300 to the polarizing layer 130. A second adhesive layer PSA2 can attach the other end 300b of the bent portion 300 and the lower structural layer 200 below the substrate 100 to each other. The second adhesive layer PSA2 can be located between the other end 300b of the bent portion 300 and the lower structural layer 200.

[0145] like Figure 7As shown, the bent portion 300 may include a wiring layer 320, a first urethane resin layer 310 and a second urethane resin layer 330. The wiring layer 320 is electrically connected to the pixel circuit layer 110. The first urethane resin layer 310 covers one surface of the wiring layer 320 and the second urethane resin layer 330 covers the other surface of the wiring layer 320.

[0146] Wiring layer 320 may include at least one metal selected from Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W, and Cu. For example, wiring layer 320 may include a Ti layer, an Al layer, and / or a Cu layer. For example, wiring layer 320 may have a Ti / Al / Ti structure.

[0147] The first urethane resin layer 310 may cover one surface of the wiring layer 320. For example, the first urethane resin layer 310 may include at least one of urethane monomers and urethane resin.

[0148] The second urethane resin layer 330 may cover another surface of the wiring layer 320. For example, the second urethane resin layer 330 may include at least one of urethane monomers and urethane resin.

[0149] The wiring layer 320 may be located between the first urethane resin layer 310 and the second urethane resin layer 330. For example, the first urethane resin layer 310 may extend parallel to the second urethane resin layer 330. The second urethane resin layer 330 may extend parallel to the first urethane resin layer 310.

[0150] Ethyl urethane resin exhibits better resistance to flexural stress than polyamide materials. For example, urethane resin has an elasticity approximately eight times that of polyamide materials. Accordingly, by using urethane resin in the bending portion 300 (or the flip-chip film), the bending portion 300 (or the flip-chip film) is less likely to break during bending and has a more robust structure than flip-chip films using polyamide materials.

[0151] Figure 8 It is a diagram. Figure 6 A schematic cross-sectional view of an area in an embodiment of the display panel 10 shown in the figure, and Figure 9 It is a diagram. Figure 6 A schematic cross-sectional view of a region in another embodiment of the display panel 10 is shown. For reference, Figure 8 and Figure 9 It can be shown in relation to Figure 6 The cross-section is a section taken from different planes. For example, Figure 8 and Figure 9 Showing in with Figure 6 The section shown is a section taken from the plane intersecting the planes of the cross-section. Additionally, Figure 8 and Figure 9 It is a cross-sectional view obtained in the outer region PA, and it can be Figure 6 A cross-sectional view of the area where the bent portion 300 and the pixel circuit layer 110 contact each other. This is a cross-sectional view of the display area DA. Figures 3 to 5 The structure shown may differ from Figure 8 The structure of the cross-sectional view and Figure 9 The structure of the cross-section diagram.

[0152] Figure 8 The area where the first conductive layer SD1 and the gate layer GT are in direct contact with each other is shown. In the peripheral region PA, the gate layer GT may be disposed on the first conductive layer SD1.

[0153] The substrate 100 may include a first through-slot GR1. The first through-slot GR1 may be located in the peripheral region PA. The first through-slot GR1 may be formed at one edge of the substrate 100. The width of the first through-slot GR1 and the width of the bent portion 300 may be the same, such that the bent portion 300 can be inserted into the first through-slot GR1. One end 300a of the bent portion 300 may be inserted into the first through-slot GR1, and as a result, the bent portion 300 and the pixel circuit layer 110 may be electrically connected to each other.

[0154] The substrate 100 may have a single-layer structure or a structure in which two or more layers are stacked. For example, the substrate 100 may include a base layer 100a, a barrier layer 100b on the base layer 100a, and a protective layer 100c on the barrier layer 100b.

[0155] The substrate 100a may include an insulating material. In an embodiment, the substrate 100a may include PI, but the material of the substrate 100a is not limited thereto.

[0156] A barrier layer 100b may be disposed on the substrate layer 100a. The barrier layer 100b prevents impurity elements from penetrating into or from the substrate 100. In an embodiment, the barrier layer 100b may include elements selected from SiO2. x and SiN x The material may be one or more materials from the group consisting of, but the material of the barrier layer 100b is not limited thereto. The barrier layer 100b may have a single-layer structure or a structure in which two or more layers are stacked. In embodiments in which the barrier layer 100b includes two layers, the two layers may include different materials. For example, the first layer may include SiO2. x The second layer may include SiN xHowever, this is merely an example, and the structure of the barrier layer 100b is not limited thereto. Additionally, in another embodiment, the barrier layer 100b may be omitted depending on the material or processing conditions of the substrate 100.

[0157] The protective layer 100c may be disposed on the barrier layer 100b. The protective layer 100c may comprise organic or inorganic materials. For example, the protective layer 100c may comprise one or more materials selected from PI, PET, and PEN, but this is merely an example. The materials of the protective layer 100c are not limited thereto.

[0158] To electrically connect the bent portion 300 and the pixel circuit layer 110 to each other, the first urethane resin layer 310 of the bent portion 300 may include at least one through-hole. The wiring layer 320 of the bent portion 300 and the pixel circuit layer 110 may be electrically connected to each other through at least one through-hole. For example, the wiring layer 320 of the bent portion 300 may extend through at least one through-hole included in the first urethane resin layer 310, such that the wiring layer 320 of the bent portion 300 and the first conductive layer SD1 of the pixel circuit layer 110 can be in direct contact with each other or electrically connected to each other. Furthermore, the first urethane resin layer 310 may be in direct contact with the pixel circuit layer 110, and depending on the shape of the first conductive layer SD1 of the pixel circuit layer 110, the first urethane resin layer 310 and the first conductive layer SD1 may be in direct contact with each other. The wiring layer 320 may be in direct contact with the first conductive layer SD1. For example, in the peripheral region PA, the pixel circuit layer 110 may include a first conductive layer SD1 on the first urethane resin layer 310 and a gate layer GT disposed on the first conductive layer SD1 and electrically connected to the first conductive layer SD1 and the wiring layer 320 in the peripheral region PA.

[0159] According to an embodiment, the first urethane resin layer 310 may include a first through-hole TH1 and a second through-hole TH2. Although for ease of description, only... Figure 8 The diagram shows a first through-hole TH1 and a second through-hole TH2, but the first urethane resin layer 310 may further include more through-holes.

[0160] like Figure 8 As shown, a first insulating material layer 111 may be disposed on the buffer layer 101. The first insulating material layer 111 may cover the side surface of the first conductive layer SD1. A portion of the first insulating material layer 111 may be located between the first conductive layer SD1 and the first urethane resin layer 310. A gate layer GT may be disposed on the first insulating material layer 111. A second insulating material layer 112 may be disposed on the first insulating layer 111. The second insulating layer 112 may cover the side surface of the gate layer GT.

[0161] In an embodiment, the first insulating material layer 111 may include, with Figure 3 The first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 are formed simultaneously or together. Figure 3 The first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 comprise multiple layers of the same material. The second insulating material layer 112 can be... Figure 3 The third inorganic insulating layer IL3 is formed simultaneously, or with Figure 3 The third inorganic insulating layer IL3 in the middle contains the same material.

[0162] In this embodiment, the first insulating material layer 111 and the second insulating material layer 112 can be coupled with... Figure 4 The first inorganic insulating layer IL1 is formed simultaneously with, or with Figure 4 The first inorganic insulating layer IL1 in the middle comprises the same material.

[0163] In this embodiment, the first insulating material layer 111 can be with Figure 5 The first inorganic insulating layer IL1 is formed simultaneously with, or with Figure 5 The first inorganic insulating layer IL1 comprises the same material. The second insulating material layer 112 may be compatible with... Figure 5 The second inorganic insulating layer IL2 is formed simultaneously, or with Figure 5 The second inorganic insulating layer IL2 in the middle comprises the same material.

[0164] Figure 9 A display device according to an embodiment is shown that further includes a semiconductor layer Sl in the peripheral region PA that simultaneously contacts the lower surfaces of the first conductive layer SD1 and the gate layer GT. The semiconductor layer Sl may be located between a portion of the first conductive layer SD1 connected to the wiring layer 320 through a first via TH1 and another portion of the first conductive layer SD1 connected to the wiring layer 320 through a second via TH2, and the semiconductor layer Sl may electrically connect these portions of the first conductive layer SD1 to each other.

[0165] like Figure 9 As shown, a first insulating material layer 111 may be disposed on the buffer layer 101. The first insulating material layer 111 may cover the side surface of the first conductive layer SD1. A portion of the first insulating material layer 111 may be located between the semiconductor layer S1 and the first urethane resin layer 310. A gate layer GT may be disposed on the first insulating material layer 111. A second insulating material layer 112 may be disposed on the first insulating material layer 111. The second insulating layer 112 may cover the side surface of the gate layer GT. A portion of the first insulating layer 111 may be located between the semiconductor layer S1 and the first urethane resin layer 310.

[0166] In an embodiment, the first insulating material layer 111 may include, with Figure 3 The first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 are formed simultaneously or together. Figure 3 The first inorganic insulating layer IL1 and the second inorganic insulating layer IL2 comprise multiple layers of the same material. The second insulating material layer 112 can be... Figure 3 The third inorganic insulating layer IL3 is formed simultaneously, or with Figure 3 The third inorganic insulating layer IL3 in the middle contains the same material.

[0167] Figure 10 It is a diagram. Figure 1 A schematic cross-sectional view of a region in an embodiment of the display device, and Figure 11 Based on Figure 10 A cross-sectional view of the display device area of ​​the bent portion 300. For reference, this can be omitted. Figure 10 and Figure 11 The description of the components that are essentially the same as those mentioned above.

[0168] like Figure 10 As shown, one end 300a of the bent portion 300 can be disposed on the upper surface of the pixel circuit layer 110. One end 300a of the bent portion 300 can be in direct contact with the upper surface of the pixel circuit layer 110. The bent portion 300 can be electrically connected to the pixel through the upper surface of the pixel circuit layer 110. For a stable structure, the lower surface of one end 300a of the bent portion 300 can face the pixel circuit layer 110, the upper surface of one end 300a of the bent portion 300 can face the polarization layer 130, and the first adhesive layer PSA1 can be located between one end 300a of the bent portion 300 and the lower surface of the polarization layer 130.

[0169] One end 300a of the bent portion 300 and the polarizing layer 130 can be fixed to each other by a first adhesive layer PSA1. The first adhesive layer PSA1 may include PSA, OCA, or OCR. The first adhesive layer PSA1 can attach one end 300a of the bent portion 300 and the polarizing layer 130 to each other. The first adhesive layer PSA1 can be located between one end 300a of the bent portion 300 and the polarizing layer 130.

[0170] like Figure 11 As shown, the polarization layer 130 may include a second through-slot GR2. The second through-slot GR2 may be located in the peripheral region PA. The second through-slot GR2 may be formed at one edge of the polarization layer 130. The width of the second through-slot GR2 and the width of the bent portion 300 may be the same, such that one end 300a of the bent portion 300 can be inserted into the second through-slot GR2. Because one end 300a of the bent portion 300 can be inserted into the second through-slot GR2, the bent portion 300 and the pixel circuit layer 110 can be electrically connected to each other.

[0171] To electrically connect the bent portion 300 and the pixel circuit layer 110 to each other, the second urethane resin layer 330 of the bent portion 300 may include at least one through-hole. The wiring layer 320 of the bent portion 300 and the pixel circuit layer 110 may be electrically connected to each other through at least one through-hole. For example, the wiring layer 320 may extend through at least one through-hole included in the second urethane resin layer 330, and the wiring layer 320 of the bent portion 300 and the first conductive layer SD1 (or the second conductive layer SD2) of the pixel circuit layer 110 may be in direct contact with each other or electrically connected to each other. Additionally, a portion of the second urethane resin layer 330 may be in direct contact with the pixel circuit layer 110, and depending on the shape of the first conductive layer SD1 of the pixel circuit layer 110 in the peripheral region PA, the second urethane resin layer 330 and the first conductive layer SD1 may be in direct contact with each other. The wiring layer 320 may be in direct contact with the first conductive layer SD1 (or the second conductive layer SD2). Figure 11 The following description focuses on an example in which the first conductive layer SD1 contacts the wiring layer 320 in the peripheral region PA, but the pixel circuit layer 110 may include different conductive layers (such as the second conductive layer SD2) patterned to directly contact the wiring layer 320 in the peripheral region PA.

[0172] For example, the second urethane resin layer 330 may include a third through-hole TH1' and a fourth through-hole TH2'. Although for ease of description only... Figure 11 The third through-hole TH1' and the fourth through-hole TH2' are shown, but the second urethane resin layer 330 may further include more through-holes.

[0173] The peripheral region PA of the pixel circuit layer 110 according to the example embodiment may include a gate layer GT on the substrate 100 and a first conductive layer SD1 on the gate layer GT. The display device according to the embodiment may further include a semiconductor layer S1 in the peripheral region PA that simultaneously contacts the upper surface of the gate layer GT and the first conductive layer SD1. The semiconductor layer S1 may be located between a portion of the first conductive layer SD1 connected to the wiring layer 320 through a third via TH1' and another portion of the first conductive layer SD1 connected to the wiring layer 320 through a fourth via TH2', and the semiconductor layer S1 may electrically connect these portions of the first conductive layer SD1 to each other.

[0174] The polarizing layer 130 can be on the first urethane resin layer 310, and due to the adhesion between the polarizing layer 130 and the first urethane resin layer 310, the above-mentioned... Figure 6 The resin components have a similar sealing effect to RS.

[0175] like Figure 11As shown, the first insulating material layer 111 may be on the buffer layer 101. The first insulating material layer 111 may cover the gate layer GT. The first conductive layer SD1 may be on the first insulating material layer 111. The second insulating layer 112 may be on the first insulating layer 111. The second insulating layer 112 may cover the side surface of the first conductive layer SD1. A portion of the second insulating layer 112 may be between the semiconductor layer S1 and the second urethane resin layer 330.

[0176] In this embodiment, the first insulating material layer 111 can be with Figure 5 The second inorganic insulating layer IL2 is formed simultaneously, or with Figure 5 The second inorganic insulating layer IL2 in [the structure] comprises the same material. For ease of description, it can be seen from [the following text is missing from the original text]. Figure 11 omitted in Figure 5 The first inorganic insulating layer IL1. The second insulating material layer 112 can be with... Figure 5 The third inorganic insulating layer IL3 is formed simultaneously, or with Figure 5 The third inorganic insulating layer IL3 in the middle contains the same material.

[0177] As described above, the display device according to one or more embodiments can have the following effect.

[0178] First, by using urethane resin instead of polyamide material in the bending portion (crystal film), a display device with strong resistance to bending stress can be provided.

[0179] Second, by using, for example Figure 6 The resin component shown has its bent portions firmly attached, and therefore, it can provide a display device that is more resistant to bending stress than conventional display devices.

[0180] Third, such as Figure 8 and Figure 9 As shown, one end of the bent portion can be inserted through a first through slot formed in the substrate, and thus, an electrical connection between the driver chip and the pixel can be easily and stably achieved.

[0181] Fourth, such as Figure 10 As shown, because the position of one end of the attached bending portion can be changed, various structural modifications can be made according to the characteristics of the display device, and a display device with stronger resistance to bending stress than conventional display devices can be provided.

[0182] Fifth, such as Figure 11 As shown, one end of the bent portion can be inserted through a second through slot formed in the polarization layer, and correspondingly, an electrical connection between the driver chip and the pixel can be easily and stably achieved.

[0183] Although certain embodiments have been described, it will be readily apparent to those skilled in the art that various modifications can be made without departing from the spirit and scope of this disclosure. Unless otherwise stated, the description of features or aspects within the embodiments should generally be considered applicable to other similar features or aspects of other embodiments. Accordingly, as will be apparent to those skilled in the art, features or components described in connection with a particular embodiment may be combined with features or components described in connection with other embodiments. Therefore, the foregoing should not be construed as limiting to the specific embodiments set forth herein, but should be understood as intended to be combined with or applied to other embodiments. Thus, the true technical scope of this disclosure should be defined by the technical spirit of the claims.

[0184] According to one or more of the above embodiments, a display device with a thin, elongated bezel can be realized. However, the scope of this disclosure is not limited to the effects described above.

[0185] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope as defined by the claims.

Claims

1. A display device comprising: a substrate including an upper surface and a lower surface; a pixel circuit layer on the upper surface of the substrate; an organic emission layer on the pixel circuit layer; and a bend portion including a wiring layer, a first urethane resin layer, and a second urethane resin layer, the wiring layer being electrically connected to the pixel circuit layer, the first urethane resin layer covering one surface of the wiring layer, and the second urethane resin layer covering the other surface of the wiring layer. One end of the bend portion is in a groove formed in one edge of the substrate.

2. The display device according to claim 1, wherein The first urethane resin layer includes at least one through-hole, and 3. The display device of claim 2, wherein, The wiring layer and the pixel circuit layer are electrically connected to each other through the at least one through-hole of the first urethane resin layer. The first urethane resin layer is in direct contact with the pixel circuit layer.

4. The display device according to claim 3, wherein The substrate includes a display area and a peripheral area, the peripheral area being around the display area.

5. The display device according to claim 2, wherein 6. The display device according to any one of claims 2 to 5, further comprising: a lower structure layer below the substrate. A second end of the bend portion is attached to a lower surface of the lower structure layer.

7. The display device of claim 6, wherein, 8. The display device according to claim 7, further comprising: a driver chip disposed around the second end of the bend portion on the first urethane resin layer.

9. The display device according to claim 6, further comprising: a resin member sealing a gap between the bend portion and the lower structure layer. The resin member is in direct contact with at least a portion of a lower surface of the one end of the bend portion, and in direct contact with at least a portion of a side surface of the lower structure layer.

10. The display device of claim 9, wherein, ​

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