Packaging device for improving switching performance of MOS (Metal Oxide Semiconductor) tube

By adding a Source signal pin to the MOS device and directly connecting it to the source of the chip, the switching loss problem caused by the power line connection is solved, and higher operating efficiency is achieved.

CN224098160UActive Publication Date: 2026-04-07GUANGZHOU SINO-MICRO ELECTRONIC CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-02-06
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

In existing MOS devices, the power line is connected to the source of the chip, which increases switching losses and reduces operating efficiency.

Method used

Design a four-pin packaged device that adds a Source signal pin to directly connect to the chip's source, replacing the power line connection and reducing the impact of stray inductance on switching speed.

Benefits of technology

Significantly reduces switching losses and improves device efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of MOS (Metal Oxide Semiconductor) equipment, in particular to a packaging device for improving the switching performance of an MOS tube. Comprising a plastic package body, the plastic package body is connected with four frame pins, and the four frame pins comprise a Gate pin, a Drain pin, a Source pin and a Source signal pin; and the Source signal pin is used for replacing a power line to be connected with a source electrode of the chip. Through the design of adding one driver source electrode pin, the switching loss can be obviously reduced, and the working efficiency of the device is improved.
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Description

TECHNICAL FIELD

[0001] The utility model relates to MOS equipment technical field, concretely relates to a kind of packaging devices for improving MOS tube switch performance. BACKGROUND

[0002] ‌MOS tube, also known as MOSFET, is a commonly used semiconductor device‌. Its main working principle is to control the current flowing through the channel between the two source and drain by using the control gate voltage, so it is also called field effect transistor. The basic structure of MOS tube includes three electrodes: gate (G), source (S), drain (D). Its working principle is to control the formation and disappearance of the conductive channel between the source and the drain by the gate voltage, thereby controlling the on-off of the current. Specifically, when the gate voltage reaches a certain value, a conductive channel will be formed between the source and the drain, so that the current can flow through; otherwise, the current cannot pass through.

[0003] Like the TO-263-3L device designed in the prior art, the power line needs to be designed to connect to the source of the chip, which will increase the switching loss and the working efficiency of the device is not high. INVENTION CONTENT

[0004] In view of the fact that the current MOS device needs to design a power line to connect to the source of the chip, and the working efficiency is not high, the present application provides a packaging device for improving the switching performance of MOS tube to solve the above problems.

[0005] To achieve the above purpose, the utility model realizes through the following technical scheme:

[0006] The application embodiment discloses a packaging device for improving the switching performance of MOS tube, which comprises a plastic encapsulation body connected with four frame pins, the four frame pins comprising a Gate pin, a Drain pin, a Source pin and a Source signal pin; the Source signal pin is used to replace the power line and connect with the source of the chip.

[0007] Optionally, the four frame pins include a connecting sheet and a bent sheet connected at the end of the connecting sheet, and the bent sheet includes a horizontal bending surface and a vertical bending surface connected at the end of the horizontal bending surface.

[0008] Optionally, the width of the Source signal pin is 1.05mm-1.15mm.

[0009] Optionally, the width of the Gate pin is 1.15mm-1.25mm.

[0010] Optionally, the width of the Source pin is 1.2mm.

[0011] Optionally, the vertical distance of the Gate pin, Source pin and Source signal pin is 4.8mm-5.2mm.

[0012] Optionally, the vertical distance of the Drain pin is 0.8mm-1.2mm.

[0013] Technical effects:

[0014] The application provides a four-pin packaging device, and the TO-263-4L has one more Source signal pole than the 263-3L, which can improve the switching speed and reduce the switching loss, so that the driving signal can be directly connected to the source pole of the chip without passing through the power line, thereby reducing the influence of the stray inductance of the source wiring on the switching speed, and the design can significantly reduce the switching loss and improve the working efficiency of the device. BRIEF DESCRIPTION OF DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the application, the drawings needed to be used in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort on the basis of these drawings.

[0016] Figure 1 Front view of the packaging device for improving the switching performance of the MOS tube according to the application;

[0017] Figure 2 Back view of the packaging device for improving the switching performance of the MOS tube according to the application;

[0018] Figure 3 Side view of the packaging device for improving the switching performance of the MOS tube according to the application;

[0019] Figure 4 Circuit diagram of the packaging device for improving the switching performance of the MOS tube according to the application.

[0020] 1, plastic package; 2, Gate pin; 3, Drain pin; 4, Source pin; 5, Source signal pin. DETAILED DESCRIPTION

[0021] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, technologies, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

[0022] It is to be understood that the terminology "including", when used in the present specification and in the following claims, does not exclude the presence of other features, integers, steps, operations, elements, and / or groups thereof.

[0023] Please refer to Figures 1-4 , such as the original TO-263-3L device needs to design the power line connected to the source of the chip, this design will increase the switching loss, the working efficiency of the device is not high, based on the above problems, the embodiment of the application discloses a kind of package device for improving MOS switch performance, including plastic package 1, four frame pins are connected to the plastic package 1, four The frame pins include: Gate pin 2, Drain pin 3, Source pin 4 and Source signal pin 5, i.e. Figure 4 SR pin in the middle; Source signal pin 5 is used to replace the power line connected to the source of the chip;Four-pin package device by increasing a driver source pin, so that the driving signal can be directly connected to the source of the chip, without passing through the power line, thereby reducing the influence of stray inductance of source wiring on switching speed. This design can significantly reduce switching loss and improve the working efficiency of the device. Specifically, compared with the traditional three-pin package, the switching loss of four-pin package is greatly reduced.

[0024] Four frame pins include connecting pieces and bent pieces connected at the end of the connecting pieces, and the bent pieces include transverse bending surfaces and vertical bending surfaces connected at the end of the transverse bending surfaces.

[0025] The width of the Source signal pin 5 is 1.05mm-1.15mm.

[0026] The width of the Gate pin 2 is 1.15mm-1.25mm.

[0027] The width of the Source pin 4 is 1.2mm.

[0028] The vertical distance between the Gate pin 2, the Source pin 4 and the Source signal pin 5 is 4.8mm-5.2mm.

[0029] The vertical distance of the drain pin 3 is 0.8mm-1.2mm.

[0030] The device elements involved in the above embodiments are all conventional device elements if not specially stated, and the connection mode, control mode involved are all conventional connection mode, control mode if not specially stated.

[0031] The above has made the detailed description to the utility model in combination with the embodiments, but the skilled in the art can understand that, on the premise of not departing from the purpose of the utility model, each parameter in the above embodiment can be changed, forming multiple specific embodiments, all being the common change range of the utility model, which will not be described one by one in detail here.

Claims

1. A packaged device for improving the switching performance of a MOSFET, characterized in that, The device includes a molding compound connected to four frame pins, which are: a Gate pin, a Drain pin, a Source pin, and a Sourcesignal pin; the Sourcesignal pin is used to replace the power line and connect to the source of the chip.

2. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The four frame pins include connecting tabs and bent tabs connected to the ends of the connecting tabs, the bent tabs including a lateral bent surface and a vertical bent surface connected to the ends of the lateral bent surface.

3. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The width of the Source signal pin is 1.05mm-1.15mm.

4. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The width of the Gate pin is 1.15mm-1.25mm.

5. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The width of the Source pin is 1.2 mm.

6. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The vertical distance between the Gate pin, Source pin, and Source signal pin is 4.8mm-5.2mm.

7. The packaged device for improving the switching performance of a MOSFET according to claim 1, characterized in that, The vertical distance between the Drain pins is 0.8mm-1.2mm.