CSP (Chip Scale Package) packaged constant current IC (Integrated Circuit) structure

Abstract

The utility model discloses a CSP (Chip Scale Package)-packaged constant current IC (Integrated Circuit) structure, and relates to the technical field of CSP. Through the arrangement of the solder paste, the substrate and the constant-current IC chip, the constant-current IC chip is fixed by utilizing the substrate through the solder paste, so that when the COB lamp strip is used for operation, a die bonding ejector pin can only abut against the bottom of the substrate without damaging a bare chip, the bare chip is protected from being influenced by any external force by utilizing the coating effect of the vaporific silica gel, and the service life of the chip is prolonged. Therefore, the integrity of the internal structure of the IC chip and the reliability of the whole product are ensured. By means of silica gel on the periphery of each IC chip and the vaporific silica gel layer formed by jointly connecting the silica gel on the periphery of each IC chip, regular separation after cutting is facilitated, the periphery of a cut finished product is covered with the vaporific silica gel layer, and the reliability of the constant-current IC product is effectively improved through the wrapping, shaping and protecting effects of the vaporific silica gel. The hidden danger that an existing constant-current IC is damaged by jacking is effectively avoided under the controllable cost, and therefore the processing performance and the reliability of products are greatly improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to CSP packaging technical field, concretely is a CSP package's constant current IC structure. BACKGROUND

[0002] In the field of COB lamp strip, CSP lamp beads and IC are often used, with the development of market, people have higher requirements to the length of lamp strip, but with the increase of lamp strip length, the voltage will drop due to the internal resistance of FPC soft board used in the lamp strip, so that the brightness of the tail end and the head end of the lamp strip is different, in order to solve this problem, a kind of constant current IC chip is generally used, which can solve the defect of the brightness difference between the head end and the tail end of the lamp strip.

[0003] However, based on the existing constant current IC bare chip, the probe needle is easy to hurt the chip and cause leakage when the lamp strip is mass produced and die bonded, and the chip is easy to be damaged by external force, so that the yield of finished lamp strip is low, the repair rate is high, and the product is unstable. Therefore, the defects of the constant current IC chip in actual use and implementation process need to be corrected and improved, and the professional knowledge and experience are assisted, and after many ideas and test verifications, the design is provided. Therefore, a CSP packaged constant current IC structure is provided to solve the above problems.

[0004] In view of the technical problems of constant current IC chip in actual use and operation, the utility model provides a CSP packaging structure to overcome the low yield, high repair rate and other problems of IC chip in the use process of COB lamp strip under controllable cost. The defects of the process links such as die bonder probe needle hurting chip and external force causing chip damage are solved, the packaging process quality of IC chip is effectively improved, the through rate and product reliability of COB lamp strip product are improved. Utility model content

[0005] The utility model provides a CSP package's constant current IC structure to solve the existing controllable cost under the problem that IC chip is overcome in the use process of COB lamp strip low yield, high repair rate and other problems, solve the defect of process link such as die bonder probe needle hurting chip, external force causes chip damage, effectively improve the packaging process quality of IC chip, to reach the problem of improving the through rate and product reliability of COB lamp strip product.

[0006] The utility model provides following technical scheme: a CSP package's constant current IC structure, including constant current IC chip, the mist silica gel of setting in the four around and top surface of constant current IC chip, the substrate of setting below constant current IC chip and the tin cream of setting below constant current IC chip, still include: the substrate is composed of BT base copper nickel gold plate, the substrate includes top pad positive pole, top pad negative pole, BT base material, bottom pad positive pole and bottom pad negative pole, sets up the mist silica gel of four around and top surface of constant current IC chip, the common connection body of the periphery of each constant current IC chip and mist silica gel forms the even whole piece CSP package.

[0007] As a preferred technical scheme of the utility model, the constant current IC chip pin OUT end and GND end are fixed on the substrate through the tin cream, the top pad positive pole and the top pad negative pole are fixedly connected with the BT base material below, the bottom end of the BT base material is fixedly connected with the bottom pad positive pole and the bottom pad negative pole, and the setting of the tin cream plays a role of fixing the constant current IC chip on the substrate.

[0008] As a preferred technical scheme of the utility model, the thickness of the substrate is about 0.17mm, and the substrate is composed of BT base copper nickel gold plate, so that the thin development of electronic products is ensured, and the role of the effective conduction and heat conduction path through the bottom pad is realized.

[0009] As a preferred technical scheme of the utility model, the constant current IC chip is a double-pin design, the bottom of the constant current IC chip is provided with an OUT end pin and a GND end pin, the OUT end pin is the positive pole of the constant current IC chip, and the GND end pin is the negative pole of the constant current IC chip.

[0010] As a preferred technical scheme of the utility model, a plurality of constant current IC chips are arranged above the substrate, and the plurality of constant current IC chips are arranged in a matrix type, so that the constant current IC chips can be regularly separated during cutting.

[0011] As a preferred technical scheme of the utility model, the OUT end pin is fixedly connected above the top pad positive pole through the printed tin cream, the GND end pin is fixedly connected above the top pad negative pole through the printed tin cream, the setting of the OUT end pin and the GND end pin forms electrical connection with the corresponding bottom pad positive pole and bottom pad negative pole, and ensures that the monomer unit after cutting can realize the same electrical performance as the constant current IC bare chip.

[0012] As a preferred technical scheme of the utility model, the fog-shaped silica gel is arranged around and on the top of the constant current IC chips arranged in a matrix by a mold pressing method, the periphery of each constant current IC chip and the common connecting body of the fog-shaped silica gel form a flat whole CSP package, the setting of the fog-shaped silica gel plays a packaging protection and shaping role for the constant current IC chips, and effectively prevents the constant current IC chips from being damaged due to contact with mechanical external force.

[0013] As a preferred technical scheme of the utility model, the whole CSP is divided into a plurality of single units by cutting, and the plurality of single units are tested, sorted and packaged by a blue film to form a CSP package with all characteristics meeting the electrical characteristics of the constant current IC, so that customers can select and use the CSP package according to the finished product lamp strip scheme.

[0014] Compared with the prior art, the utility model provides a CSP packaged constant current IC structure, which has the following beneficial effects:

[0015] The CSP packaged constant current IC structure is fixed by the substrate through the tin paste, the top pin of the die bonding can only be pressed to the bottom of the substrate when the COB lamp strip is used, the bare chip is not damaged, the bare chip is protected from any external force by the coating effect of the fog-shaped silica gel, and the integrity of the internal structure of the IC chip and the reliability of the whole product are ensured. The fog-shaped silica gel layer composed of the silica gel around each IC chip and the common connecting body is beneficial to regular separation after cutting, the periphery of the finished product after cutting is covered by the fog-shaped silica gel layer, the product reliability of the constant current IC is effectively improved by the coating, shaping and protection effects of the fog-shaped silica gel, the hidden danger of the existing constant current IC being damaged and broken is effectively avoided under controllable cost, and therefore the process performance and product reliability of the product are greatly improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] Fig. 1 It is a schematic diagram of the overall structure of the substrate of the utility model from the top;

[0017] Fig. 2 It is a schematic diagram of the structure of the cutting single unit of the utility model;

[0018] Fig. 3 It is a schematic diagram of the structure of the cutting single unit of the utility model.

[0019] In the drawing: 1, constant current IC chip; 2, fog-shaped silica gel; 3, substrate; 301, top pad positive; 302, top pad negative; 303, BT base material; 304, bottom pad positive; 305, bottom pad negative; 4, tin paste; 5, OUT terminal pin; 6, GND terminal pin. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the utility model will be apparently and completely described in connection with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.

[0021] Please refer to Figs. 1-3 The utility model discloses a CSP package's constant current IC structure, including constant current IC chip 1, set in the mist silica gel 2 of constant current IC chip 1 four around and top surface, the substrate 3 of setting below constant current IC chip 1 and the tin cream 4 of setting below constant current IC chip 1, still include: the substrate 3 is composed of BT base copper nickel gold plate, and the substrate 3 includes top pad positive pole 301, top pad negative pole 302, BT base material 303, bottom pad positive pole 304 and bottom pad negative pole 305, set in the mist silica gel 2 of constant current IC chip 1 four around and top surface, and the common connection body of the periphery of each constant current IC chip 1 and mist silica gel 2 forms the even whole CSP package.

[0022] Specifically, the pin OUT end and the GND end of the constant current IC chip 1 are fixed on the substrate 3 through the tin cream 4, the bottom of the top pad positive pole 301 and the top pad negative pole 302 is fixedly connected with the BT base material 303, and the bottom end of the BT base material 303 is fixedly connected with the bottom pad positive pole 304 and the bottom pad negative pole 305.

[0023] In the embodiment, the substrate 3 fixes the constant current IC chip 1 through the tin cream 4, ensures that the top pin of die bonding can only reach the bottom of the substrate 3 when the COB lamp strip is used, and does not hurt the bare chip, the bare chip is protected from any external force by the coating effect of the mist silica gel 2. The mist silica gel layer composed of the silica gel around each constant current IC chip 1 and the common connection is beneficial to regular separation after cutting, the periphery of the finished product after cutting is covered with the mist silica gel layer, the product reliability of the constant current IC chip 1 is effectively improved through the coating, shaping and protection effects of the mist silica gel 2, and the hidden danger that the existing constant current IC chip 1 is hurt and damaged is effectively avoided under controllable cost.

[0024] Specifically, the thickness of the substrate 3 is about 0.17mm, and the substrate 3 is composed of the BT base copper nickel gold plate.

[0025] In the embodiment, the thickness of the substrate 3 is about 0.17mm, which not only ensures the light and thin development of the electronic product, but also realizes the path of effective conduction and heat conduction through the bottom pad.

[0026] Specifically, the constant current IC chip 1 is a double pin design, the bottom of the constant current IC chip 1 is provided with an OUT end pin 5 and a GND end pin 6, the OUT end pin 5 is the positive electrode of the constant current IC chip 1, and the GND end pin 6 is the negative electrode of the constant current IC chip 1, the OUT end pin 5 is fixedly connected above the top pad positive electrode 301 through the printed tin paste 4, and the GND end pin 6 is fixedly connected above the top pad negative electrode 302 through the printed tin paste 4.

[0027] In the embodiment, the constant current output end OUT end pin 5 of the constant current IC chip 1 is fixedly connected with the top pad positive electrode 301 of the BT substrate 303 through the tin paste 4, the GND end pin 6 of the constant current IC chip 1 is fixedly connected with the top pad negative electrode 302 of the BT substrate 303 through the tin paste 4, and then electrical connection is formed to the corresponding bottom pad positive electrode 304 and bottom pad negative electrode 305 through the positive and negative internal lines, so as to ensure that the cut single unit can realize the same electrical performance as the constant current IC bare chip.

[0028] Specifically, the fog-shaped silica gel 2 is arranged around and on the top of the matrix-arranged constant current IC chips 1 in a mold pressing manner, and the periphery of each constant current IC chip 1 and the common connecting body of the fog-shaped silica gel 2 form a flat whole CSP package.

[0029] In the embodiment, the fog-shaped silica gel 2 is filled and covered on the substrate 3 on which the constant current IC chips 1 are arranged in a matrix manner through a mold pressing manner, and the silica gel around each chip and the common connecting body form a fog-shaped silica gel layer, which uniformly covers the periphery, the bottom gap and the top of the chip, plays a role of packaging, protecting and shaping the constant current IC chip 1, effectively prevents damage caused by mechanical external force contacting the surface of the IC chip, and the mold-pressed fog-shaped silica gel 2 is shaped through high-temperature baking to form a whole CSP package.

[0030] Specifically, a plurality of constant current IC chips 1 are arranged above the substrate 3, the plurality of constant current IC chips 1 are arranged in a matrix manner, the whole CSP is divided into a plurality of single units in a cutting manner, and the plurality of single units are tested, sorted and packaged with blue films to have all characteristics meeting the electrical characteristics of the constant current IC.

[0031] In the embodiment, the plurality of constant current IC chips 1 are arranged in a matrix manner on the substrate 3, so that the single units can be regularly separated during cutting, the whole CSP filled and covered with the fog-shaped silica gel 2 is separated into single units in a cutting manner, and the single units after cutting are tested, sorted and packaged with blue films, so as to ensure the photoelectric parameters and electrical performance of each single unit and facilitate customers to select and use according to the finished lamp strip scheme.

[0032] The working principle and use flow of the utility model: utilize the substrate 3 through the tin paste 4 to fix the constant current IC chip 1, guarantee COB lamp area operation use, the fixed crystal's top needle can only top to the substrate 3 bottom, will not top hurt bare chip, utilize the covering effect of fog-shaped silica gel 2 protection bare chip is not affected by any external force. Utilize each constant current IC chip 1 periphery silica gel and the fog-shaped silica gel layer that common connection is formed, benefit after cutting regular separation, after cutting the finished product four around have fog-shaped silica gel layer cover.

[0033] Summarized above, the CSP packaged constant current IC structure, through the covering and protection of fog-shaped silica gel 2, the product reliability of constant current IC chip 1 is effectively improved, under the controllable cost, effectively avoid the hidden danger of existing constant current IC chip 1 being hurt and damaged, thereby greatly improve the process performance and product reliability of product.

[0034] It should be noted that in this paper, such as the term "including", "including" or any other variant is intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or also includes the elements inherent in such process, method, article or equipment. Without more limitations, the element defined by the statement "including a" does not exclude the existence of another identical element in the process, method, article or equipment including the element.

[0035] Although the embodiments of the utility model have been shown and described, it can be understood by those skilled in the art that various changes, modifications, replacements and variations can be made to these embodiments without departing from the principles and spirits of the utility model, and the scope of the utility model is defined by the appended claims and their equivalents.

Claims

1. A CSP-packaged constant current IC structure, comprising a constant current IC chip (1), a matte silicone coating (2) disposed around and on the top surface of the constant current IC chip (1), a substrate (3) disposed below the constant current IC chip (1), and solder paste (4) disposed below the constant current IC chip (1), characterized in that, Also includes: The substrate (3) is composed of a BT-based copper nickel plating plate, and the substrate (3) includes a top pad positive electrode (301), a top pad negative electrode (302), a BT substrate (303), a bottom pad positive electrode (304), and a bottom pad negative electrode (305).

2. The constant current IC structure in a CSP package according to claim 1, characterized in that: The constant current IC chip (1) pins OUT and GND are fixed on the substrate (3) by solder paste (4). A BT substrate (303) is fixedly connected below the top pad positive electrode (301) and the top pad negative electrode (302). The bottom of the BT substrate (303) is fixedly connected to the bottom pad positive electrode (304) and the bottom pad negative electrode (305).

3. The constant current IC structure in a CSP package according to claim 1, characterized in that: The thickness of the substrate (3) is about 0.17 mm, and the substrate (3) is composed of BT-based copper nickel plating plate.

4. The constant current IC structure in a CSP package according to claim 1, characterized in that: The constant current IC chip (1) has a dual-pin design. The bottom of the constant current IC chip (1) is provided with an OUT pin (5) and a GND pin (6). The OUT pin (5) is the positive terminal of the constant current IC chip (1), and the GND pin (6) is the negative terminal of the constant current IC chip (1).

5. The constant current IC structure in a CSP package according to claim 1, characterized in that: Multiple constant current IC chips (1) are disposed above the substrate (3) and are arranged in a matrix.

6. The constant current IC structure in a CSP package according to claim 4, characterized in that: The OUT pin (5) is fixedly connected above the positive electrode (301) of the top pad by printing solder paste (4), and the GND pin (6) is fixedly connected above the negative electrode (302) of the top pad by printing solder paste (4).

7. The constant current IC structure in a CSP package according to claim 6, characterized in that: The mist silicone (2) is molded and placed around and on the top surface of the matrix-arranged constant current IC chips (1). The periphery of each constant current IC chip (1) and the common connector of the mist silicone (2) form a flat whole CSP package.

8. The constant current IC structure in a CSP package according to claim 7, characterized in that: The entire CSP is divided into several individual units by cutting. These individual units are tested, sorted, and packaged in blue film to form all the characteristics that meet the electrical characteristics of a constant current IC.

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