Hall input overvoltage protection circuit

Abstract

The utility model discloses a Hall input overvoltage protection circuit, which relates to the technical field of overvoltage protection circuits and comprises a first on-off control circuit, a second on-off control circuit and a third on-off control circuit. The first on-off control circuit, the second on-off control circuit and the third on-off control circuit are respectively connected between the first Hall input port, the second Hall input port and the controller chip, and between the third Hall input port and the controller chip. The first on-off control circuit is used for cutting off the electric connection between the first Hall input port and the controller chip when the voltage of the first Hall input port is greater than the threshold voltage; the second on-off control circuit is used for cutting off the electric connection between the second Hall input port and the controller chip when the voltage of the second Hall input port is greater than the threshold voltage; and the third on-off control circuit is used for cutting off the electrical connection between the third Hall input port and the controller chip when the voltage of the third Hall input port is greater than the threshold voltage. The circuit can provide sufficient overvoltage protection.

Description

TECHNICAL FIELD

[0001] The utility model relates to overvoltage protection circuit technical field especially a hall input overvoltage protection circuit. BACKGROUND

[0002] Brushless DC motor adopts hall element detection rotor position, and controller samples existing position through hall input port and then calculates and outputs correct voltage to drive motor. However, hall element is easy to be damaged when temperature is too high, and even its electrical isolation will be damaged in extreme case, thereby making high voltage of motor winding into hall element.

[0003] In the working condition that only hall element is damaged, motor can also adopt hallless control mode to drive rotation of motor, but if controller is damaged under high voltage impact, motor will be unable to be driven. Therefore, it is necessary to design a protection circuit for hall input port of controller to cut off hall input port when there is abnormal high voltage in hall input port, so as to protect normal work of controller. SUMMARY

[0004] The applicant proposes a hall input overvoltage protection circuit method aiming at the above problems and technical requirements.

[0005] The technical scheme of the utility model is as follows:

[0006] A hall input overvoltage protection circuit comprises a first on-off control circuit, a second on-off control circuit and a third on-off control circuit.

[0007] The first on-off control circuit is connected between the first hall input port and the controller chip, the second on-off control circuit is connected between the second hall input port and the controller chip, and the third on-off control circuit is connected between the third hall input port and the controller chip.

[0008] The first on-off control circuit is at least used for cutting off electrical connection between the first hall input port and the controller chip when voltage of the first hall input port is greater than threshold voltage.

[0009] The second on-off control circuit is at least used for cutting off electrical connection between the second hall input port and the controller chip when voltage of the second hall input port is greater than threshold voltage.

[0010] The third on-off control circuit is at least used for cutting off electrical connection between the third hall input port and the controller chip when voltage of the third hall input port is greater than threshold voltage.

[0011] A further technical scheme is that the first on-off control circuit comprises a transistor U1, a transistor U2, a resistor R1, a resistor R2 and a resistor R3.

[0012] The first electrode of the transistor U1 is connected with one end of the resistor R3 and a first Hall input port, and the other end of the resistor R3 is connected with the first electrode of the transistor U2.

[0013] The second electrode of the transistor U1 is connected with one end of the resistor R1, the third electrode of the transistor U1 is connected with the second electrode of the transistor U2 and grounded through the resistor R2, and the third electrode of the transistor U2 is connected with a first signal port of a controller chip.

[0014] A further technical scheme is that the second on-off control circuit comprises a transistor U3, a transistor U4, a resistor R4, a resistor R5 and a resistor R6.

[0015] The first electrode of the transistor U3 is connected with one end of the resistor R6 and a second Hall input port, and the other end of the resistor R6 is connected with the first electrode of the transistor U4.

[0016] The second electrode of the transistor U3 is connected with one end of the resistor R4, the third electrode of the transistor U3 is connected with the second electrode of the transistor U4 and grounded through the resistor R5, and the third electrode of the transistor U4 is connected with a second signal port of the controller chip.

[0017] A further technical scheme is that the first on-off control circuit comprises a transistor U5, a transistor U6, a resistor R7, a resistor R8 and a resistor R9.

[0018] The first electrode of the transistor U5 is connected with one end of the resistor R9 and a third Hall input port, and the other end of the resistor R9 is connected with the first electrode of the transistor U6.

[0019] The second electrode of the transistor U5 is connected with one end of the resistor R7, the third electrode of the transistor U5 is connected with the second electrode of the transistor U6 and grounded through the resistor R8, and the third electrode of the transistor U6 is connected with a third signal port of the controller chip.

[0020] A further technical scheme is that the other end of the resistor R1 is connected with the cathode of a stabilizing diode D1, and the anode of the stabilizing diode D1 is grounded.

[0021] The other end of the resistor R4 is connected with the cathode of a stabilizing diode D2, and the anode of the stabilizing diode D2 is grounded.

[0022] The other end of the resistor R7 is connected with the cathode of the stabilizing diode D3, and the anode of the stabilizing diode D3 is grounded.

[0023] Further, the technical scheme is that the overvoltage alarm circuit comprises a diode D4, a diode D5, a diode D6, a diode D7, a stabilizing diode D8, a triode U7, a resistor R10, a resistor R11 and a resistor R12, wherein,

[0024] One end of the resistor R10 is connected with the power supply voltage VCC, and the other end of the resistor R10 is connected with the anode of the diode D4; the cathodes of the diode D4, the diode D5, the diode D6 and the diode D7 are connected with the first electrode of the triode U7;

[0025] The anode of the diode D5 is connected with the first Hall input port, the anode of the diode D6 is connected with the second Hall input port, and the anode of the diode D7 is connected with the third Hall input port;

[0026] The second electrode of the triode U7 is connected with the cathode of the stabilizing diode D8 through the resistor R11; the anode of the stabilizing diode D8 is connected with one end of the resistor R12 and grounded; the other end of the resistor R12 is connected with the third electrode of the triode U7; and the third electrode of the triode U7 is connected with the fault indication port of the controller chip.

[0027] Further, when the Hall input overvoltage protection circuit comprises the overvoltage alarm circuit, the other end of the resistor R1 is connected with the fault indication port or the setting port of the controller chip;

[0028] The other end of the resistor R4 is connected with the fault indication port or the setting port of the controller chip;

[0029] The other end of the resistor R7 is connected with the fault indication port or the setting port of the controller chip.

[0030] Further, when the Hall input overvoltage protection circuit comprises the overvoltage alarm circuit, the first on-off control circuit is used to cut off the electrical connection between the first Hall input port and the controller chip when the voltage of the first Hall input port, the voltage of the second Hall input port and / or the voltage of the third Hall input port is greater than the threshold voltage;

[0031] The second on-off control circuit is used to cut off the electrical connection between the second Hall input port and the controller chip when the voltage of the first Hall input port, the voltage of the second Hall input port and / or the voltage of the third Hall input port is greater than the threshold voltage;

[0032] The third on-off control circuit is used for cutting off the electrical connection between the third Hall input port and the controller chip when the first Hall input port voltage, the second Hall input port voltage and / or the third Hall input port voltage is greater than the threshold voltage.

[0033] Further, the transistor U1, the transistor U3 and the transistor U5 are PNP type transistors.

[0034] Further, the transistor U1, the transistor U3 and the transistor U5 are NPN type transistors.

[0035] The beneficial technical effects of the utility model are:

[0036] The Hall input overvoltage protection circuit provided by the utility model can cut off the electrical connection between the Hall input port and the controller chip when the Hall signal received by the Hall input port is greater than the threshold voltage, so as to achieve the purpose of protecting the controller chip. Under the protection, even if the Hall signal received by the Hall input port is an abnormal high voltage signal, the controller can still drive the motor to run. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 The figure is the circuit block diagram of the Hall input overvoltage protection circuit provided by the utility model.

[0038] Figure 2 The figure is the circuit principle diagram of the first on-off control circuit provided by the first embodiment of the utility model.

[0039] Figure 3 The figure is the circuit principle diagram of the second on-off control circuit provided by the first embodiment of the utility model.

[0040] Figure 4 The figure is the circuit principle diagram of the third on-off control circuit provided by the first embodiment of the utility model.

[0041] Figure 5 The figure is the circuit principle diagram of the overvoltage alarm circuit provided by the second embodiment of the utility model.

[0042] Figure 6 The figure is the circuit principle diagram of the first on-off control circuit provided by the second embodiment of the utility model.

[0043] Figure 7 The figure is the circuit principle diagram of the second on-off control circuit provided by the second embodiment of the utility model.

[0044] Figure 8 The figure is the circuit principle diagram of the third on-off control circuit provided by the second embodiment of the utility model. DETAILED DESCRIPTION

[0045] The specific embodiments of the utility model will be further described in combination with the drawings.

[0046] The utility model provides a hall input overvoltage protection circuit, including first on -off control circuit, second on -off control circuit and third on -off control circuit,

[0047] First on -off control circuit is connected between first hall input port and controller chip, second on -off control circuit is connected between second hall input port and controller chip, third on -off control circuit is connected between third hall input port and controller chip,

[0048] First on -off control circuit is at least used to cut off the electric connection of first hall input port and controller chip when the voltage of first hall input port is greater than threshold voltage,

[0049] Second on -off control circuit is at least used to cut off the electric connection of second hall input port and controller chip when the voltage of second hall input port is greater than threshold voltage,

[0050] Third on -off control circuit is at least used to cut off the electric connection of third hall input port and controller chip when the voltage of third hall input port is greater than threshold voltage.

[0051] Specifically, a brushless motor generally adopts three hall chips to detect the position of rotor, and the working power supply of the three hall chips is provided by a controller, and the controller generally adopts an integrated chip form, that is, a controller chip.

[0052] Embodiment one

[0053] As Figures 2-4 The first on -off control circuit includes a triode U1, a triode U2, a resistor R1, a resistor R2 and a resistor R3.

[0054] The first electrode of the triode U1 is connected with one end of the resistor R3 and connected with the first hall input port, and the other end of the resistor R3 is connected with the first electrode of the triode U2.

[0055] The second electrode of the triode U1 is connected with one end of the resistor R1, the third electrode of the triode U1 is connected with the second electrode of the triode U2 and grounded through the resistor R2, and the third electrode of the triode U2 is connected with the first signal port of the controller chip.

[0056] The second on-off control circuit comprises the triode U3, the triode U4, the resistor R4, the resistor R5 and the resistor R6.

[0057] The first electrode of the triode U3 is connected with one end of the resistor R6 and the second Hall input port, and the other end of the resistor R6 is connected with the first electrode of the triode U4.

[0058] The second electrode of the triode U3 is connected with one end of the resistor R4, the third electrode of the triode U3 is connected with the second electrode of the triode U4 and grounded through the resistor R5, and the third electrode of the triode U4 is connected with the second signal port of the controller chip.

[0059] The first on-off control circuit comprises the triode U5, the triode U6, the resistor R7, the resistor R8 and the resistor R9.

[0060] The first electrode of the triode U5 is connected with one end of the resistor R9 and the third Hall input port, and the other end of the resistor R9 is connected with the first electrode of the triode U6.

[0061] The second electrode of the triode U5 is connected with one end of the resistor R7, the third electrode of the triode U5 is connected with the second electrode of the triode U6 and grounded through the resistor R8, and the third electrode of the triode U6 is connected with the third signal port of the controller chip.

[0062] The other end of the resistor R1 is connected with the cathode of the stabilizing diode D1, and the anode of the stabilizing diode D1 is grounded; the other end of the resistor R4 is connected with the cathode of the stabilizing diode D2, and the anode of the stabilizing diode D2 is grounded; and the other end of the resistor R7 is connected with the cathode of the stabilizing diode D3, and the anode of the stabilizing diode D3 is grounded.

[0063] In the embodiment one, the triodes U1, U3 and U5 are PNP type triodes, and the triodes U2, U4 and U6 are also PNP type triodes. For the PNP type triode, the first electrode is the emitter, the second electrode is the base, and the third electrode is the collector. Figures 2-4HALL_A, HALL_B, and HALL_C respectively represent the first Hall input port, the second Hall input port, and the third Hall input port. GPIO_SA, GPIO_SB, and GPIO_SC respectively represent the first signal port, the second signal port, and the third signal port of the controller chip. Meanwhile, [the following text appears to be incomplete and requires further context: "by..."] Figures 2-4 As can be seen, the circuit structures of the first on / off control circuit, the second on / off control circuit, and the third on / off control circuit are the same. The working principle of the on / off control circuit will be explained below using the first on / off control circuit as an example:

[0064] When the voltage of the first Hall signal output by the first Hall chip is less than the voltage threshold, that is, when the voltage of the first Hall input port HALL_A is less than the voltage threshold, the Zener diode D1 is cut off, the transistor U1 is cut off, and the transistor U2 is turned on. The first Hall signal input at the first Hall input port HALL_A is normally input to the first signal port GPIO_SA of the controller chip through the transistor U2.

[0065] When the voltage of the first Hall signal output by the first Hall chip is greater than the voltage threshold, that is, when the voltage of the first Hall input port HALL_A is greater than the voltage threshold, the Zener diode D1 is reverse-biased and conducts, the base of transistor U1 is pulled down to ground potential and transistor U1 conducts, the base potential of transistor U2 is pulled up and transistor U2 is cut off, and the first Hall input port HALL_A is disconnected from the first signal port GPIO_SA of the controller chip, thereby ensuring that the controller chip is not damaged by excessive voltage.

[0066] Example 2

[0067] To enable the recording of overvoltage conditions, this utility model provides a more preferred embodiment, namely Embodiment Two. The difference between Embodiment Two and Embodiment One is that Embodiment Two includes an overvoltage alarm circuit, such as... Figure 5 As shown, the overvoltage alarm circuit includes diodes D4, D5, D6, and D7, a Zener diode D8, a transistor U7, resistors R10, R11, and R12.

[0068] One end of the resistor R10 is connected to the power supply voltage VCC, and the other end of the resistor R10 is connected to the anode of the diode D4. The cathodes of the diodes D4, D5, D6 and D7 are connected to the first electrode of the transistor U7.

[0069] The anode of diode D5 is connected to the first Hall input port, the anode of diode D6 is connected to the second Hall input port, and the anode of diode D7 is connected to the third Hall input port.

[0070] The second electrode of transistor U7 is connected to the cathode of Zener diode D8 via resistor R11. The anode of Zener diode D8 is connected to one end of resistor R12 and grounded. The other end of resistor R12 is connected to the third electrode of transistor U7. The third electrode of transistor U7 is connected to the fault indication port of the controller chip. Diodes D4, D5, D6, and D7 serve to prevent reverse current.

[0071] like Figures 6-8 As shown, the difference between Embodiment 2 and Embodiment 1 lies in that the other end of resistor R1 is connected to the fault indication port of the controller chip, the other end of resistor R4 is connected to the fault indication port of the controller chip, and the other end of resistor R7 is connected to the fault indication port of the controller chip. Furthermore, transistors U1, U3, and U5 are NPN transistors. For NPN transistors, the first electrode is the collector, the second electrode is the base, and the third electrode is the emitter. Figures 5-8 The fault indication port mentioned above is represented by GPIO_ALM.

[0072] In Embodiment 2, the first on / off control circuit is used to disconnect the electrical connection between the first Hall input port and the controller chip when the voltage at the first Hall input port, the voltage at the second Hall input port, and / or the voltage at the third Hall input port are greater than the threshold voltage.

[0073] The second on / off control circuit is used to disconnect the electrical connection between the second Hall input port and the controller chip when the voltage at the first Hall input port, the voltage at the second Hall input port, and / or the voltage at the third Hall input port are greater than the threshold voltage.

[0074] The third on / off control circuit is used to disconnect the electrical connection between the third Hall input port and the controller chip when the voltage of the first Hall input port, the voltage of the second Hall input port, and / or the voltage of the third Hall input port are greater than the threshold voltage.

[0075] Specifically, when the voltage of the first Hall input port, the voltage of the second Hall input port, and / or the voltage of the third Hall input port are greater than the threshold voltage, the overvoltage alarm circuit generates a high-level overvoltage alarm signal, making the fault indication port GPIO_ALM high, thereby controlling the first on / off control circuit, the second on / off control circuit, and the third on / off control circuit to cut off the electrical connection between the corresponding Hall input port and the controller chip.

[0076] The working principle of the overvoltage alarm circuit is as follows: when the voltage of the first, second and / or third Hall input port HALL_A, HALL_B and HALL_C is higher than the voltage threshold, the zener diode D8 is reversely conducted, the base potential of the triode U7 is pulled down to the ground potential, the triode U7 is turned on, and the fault indication port GPIO_ALM is in high level. When the controller detects that the fault indication port GPIO_ALM is in high level, the controller fault indication port GPIO_ALM is modified from input mode to output mode and always outputs high level, so that the first, second and third Hall input ports are always disconnected with the controller chip until the intervention repair;

[0077] On the contrary, when the voltage of the first, second and third Hall input port HALL_A, HALL_B and HALL_C is lower than the voltage threshold, the triode U7 is cut off, and the fault indication port GPIO_ALM is in low level.

[0078] In the second embodiment, the circuit structures of the first, second and third on-off control circuits are the same, and the working principle of the on-off control circuit according to the level state of the fault indication port GPIO_ALM is described below by taking the first on-off control circuit as an example:

[0079] When the fault indication port GPIO_ALM is in high level, the triode U1 is turned on, the base potential of the triode U2 is pulled up, so that the triode U2 is cut off, the first Hall input port HALL_A is disconnected with the first signal port GPIO_SA of the controller chip, so as to ensure that the overvoltage will not damage the controller chip. On the contrary, when the fault indication port GPIO_ALM is in low level, the triode U1 is cut off, the triode U2 is turned on, and the signal of the first Hall input port HALL_A is normally input to the first signal port GPIO_SA of the controller chip.

[0080] Embodiment three

[0081] In view of the fact that the voltage between the base and the emitter of the triode and the voltage of the fault indication port of the controller chip cannot be too high, the difference between the third embodiment and the second embodiment of the utility model lies in that the other end of the resistor R1 is connected with the setting port GPIO_SET of the controller chip, the other end of the resistor R4 is connected with the setting port GPIO_SET of the controller chip, and the other end of the resistor R7 is connected with the setting port GPIO_SET of the controller chip. When the controller chip detects that the fault indication port GPIO_ALM is at high level, the controller chip makes the setting port GPIO_SET always output high level, and makes the first, second and third Hall input ports disconnected with the controller chip. On the contrary, when the fault indication port GPIO_ALM is at low level, the controller chip makes the setting port GPIO_SET output low level.

[0082] In the third embodiment, the circuit structures of the first on-off control circuit, the second on-off control circuit and the third on-off control circuit are the same, and the working principle of the on-off control circuit working according to the level state of the setting port GPIO_SET will be described below by taking the first on-off control circuit as an example.

[0083] When the setting port GPIO_SET is at high level, the triode U1 is turned on, the base potential of the triode U2 is pulled up, the triode U2 is cut off, the first Hall input port HALL_A is disconnected with the first signal port GPIO_SA of the controller chip, so that the excessively high voltage cannot damage the controller chip. On the contrary, when the setting port GPIO_SET is at low level, the triode U1 is cut off, the triode U2 is turned on, and the signal of the first Hall input port HALL_A is normally input to the first signal port GPIO_SA of the controller chip.

[0084] In the description of the present specification, the terms "first", "second", "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Those skilled in the art should understand that the above-mentioned embodiments are only for the purpose of clearly illustrating the present disclosure, and do not limit the scope of the present disclosure. Other changes or modifications can be made on the basis of the above disclosure, and these changes or modifications are still within the scope of the present disclosure.

Claims

1. A Hall input overvoltage protection circuit, characterized by, The first on-off control circuit, the second on-off control circuit and the third on-off control circuit are connected between the first, second and third Hall input ports and the controller chip respectively. The first on-off control circuit is used for cutting off the electrical connection between the first Hall input port and the controller chip when the voltage of the first Hall input port is greater than a threshold voltage. The second on-off control circuit is used for cutting off the electrical connection between the second Hall input port and the controller chip when the voltage of the second Hall input port is greater than a threshold voltage. The third on-off control circuit is used for cutting off the electrical connection between the third Hall input port and the controller chip when the voltage of the third Hall input port is greater than a threshold voltage. The first on-off control circuit comprises a transistor U1, a transistor U2, a resistor R1, a resistor R2 and a resistor R3.

2. The Hall input overvoltage protection circuit of claim 1, wherein, The first electrode of the transistor U1 is connected with one end of the resistor R3 and the first Hall input port, and the other end of the resistor R3 is connected with the first electrode of the transistor U2. The second electrode of the transistor U1 is connected with one end of the resistor R1, the third electrode of the transistor U1 is connected with the second electrode of the transistor U2 and grounded through the resistor R2, and the third electrode of the transistor U2 is connected with the first signal port of the controller chip. The second on-off control circuit comprises a transistor U3, a transistor U4, a resistor R4, a resistor R5 and a resistor R6.

3. The Hall input overvoltage protection circuit of claim 2, wherein, The first electrode of the transistor U3 is connected with one end of the resistor R6 and the second Hall input port, and the other end of the resistor R6 is connected with the first electrode of the transistor U4. The second electrode of the transistor U3 is connected with one end of the resistor R4, the third electrode of the transistor U3 is connected with the second electrode of the transistor U4 and grounded through the resistor R5, and the third electrode of the transistor U4 is connected with the second signal port of the controller chip. The third on-off control circuit comprises a transistor U5, a transistor U6, a resistor R7, a resistor R8 and a resistor R9.

4. The Hall input overvoltage protection circuit of claim 3, wherein, The first electrode of the transistor U5 is connected with one end of the resistor R9 and the third Hall input port, and the other end of the resistor R9 is connected with the first electrode of the transistor U6. The second electrode of the transistor U5 is connected with one end of the resistor R7, the third electrode of the transistor U5 is connected with the second electrode of the transistor U6 and grounded through the resistor R8, and the third electrode of the transistor U6 is connected with the third signal port of the controller chip. The other end of the resistor R1 is connected with the cathode of a stabilizing diode D1, and the anode of the stabilizing diode D1 is grounded.

5. The Hall input overvoltage protection circuit of claim 4, wherein, The other end of the resistor R4 is connected with the cathode of a stabilizing diode D2, and the anode of the stabilizing diode D2 is grounded. The other end of the resistor R7 is connected with the cathode of a stabilizing diode D3, and the anode of the stabilizing diode D3 is grounded. ​ 6. The Hall input overvoltage protection circuit of claim 4, wherein, The overvoltage alarm circuit comprises a diode D4, a diode D5, a diode D6, a diode D7, a voltage stabilizing diode D8, a triode U7, a resistor R10, a resistor R11 and a resistor R12, wherein, One end of the resistor R10 is connected to a power supply voltage VCC, and the other end of the resistor R10 is connected to an anode of the diode D4; cathodes of the diode D4, the diode D5, the diode D6 and the diode D7 are connected to a first electrode of the triode U7; An anode of the diode D5 is connected to a first Hall input port, an anode of the diode D6 is connected to a second Hall input port, and an anode of the diode D7 is connected to a third Hall input port; A second electrode of the triode U7 is connected to a cathode of the voltage stabilizing diode D8 through the resistor R11; an anode of the voltage stabilizing diode D8 is connected to one end of the resistor R12 and grounded; the other end of the resistor R12 is connected to a third electrode of the triode U7; and the third electrode of the triode U7 is connected to a fault indication port of a controller chip.

7. The Hall input overvoltage protection circuit of claim 6, wherein, When the Hall input overvoltage protection circuit comprises the overvoltage alarm circuit, the other end of the resistor R1 is connected to the fault indication port or the setting port of the controller chip; The other end of the resistor R4 is connected to the fault indication port or the setting port of the controller chip. The other end of the resistor R7 is connected to the fault indication port or the setting port of the controller chip.

8. The Hall input overvoltage protection circuit of claim 6, wherein, When the Hall input overvoltage protection circuit comprises the overvoltage alarm circuit, the first on-off control circuit is configured to cut off the electrical connection between the first Hall input port and the controller chip when a voltage of the first Hall input port, a voltage of the second Hall input port and / or a voltage of the third Hall input port is greater than a threshold voltage; The second on-off control circuit is configured to cut off the electrical connection between the second Hall input port and the controller chip when the voltage of the first Hall input port, the voltage of the second Hall input port and / or the voltage of the third Hall input port is greater than the threshold voltage; The third on-off control circuit is configured to cut off the electrical connection between the third Hall input port and the controller chip when the voltage of the first Hall input port, the voltage of the second Hall input port and / or the voltage of the third Hall input port is greater than the threshold voltage.

9. The Hall input overvoltage protection circuit of claim 5, wherein, The triode U1, the triode U3 and the triode U5 are PNP type triodes.

10. The Hall input overvoltage protection circuit of claim 7, wherein, The triode U1, the triode U3 and the triode U5 are NPN type triodes.

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