Low-loss high-end ideal diode
By using a circuit composed of PMOS and NMOS or NPN transistors in the high-side load switch, combined with comparator control, the problems of high voltage drop and quiescent current loss in the high-side load switch are solved, achieving low loss and anti-backflow effects, which is suitable for IoT NB-IoT applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JIAHE COUNTY YUEJIA ELECTRONIC TECHNOLOGY CO LTD
- Filing Date
- 2025-04-21
- Publication Date
- 2026-04-10
AI Technical Summary
In existing technologies, diode and transistor solutions have large voltage drops and static current losses, resulting in high circuit losses and failing to meet the low-loss requirements of voltage-sensitive circuits. This is especially true in high-end load switching applications, where existing devices are expensive and have reverse current issues.
The high-side load switch is composed of PMOS transistors and NMOS transistors or NPN transistors. Combined with a comparator, the conduction and cutoff of the PMOS transistors are controlled by comparing the voltage of the input power supply and the output power supply to prevent reverse current. A hysteresis comparator is used to improve the anti-interference capability and reduce the static current loss.
It achieves low-loss backflow prevention, low static current loss, simple and low-cost circuit, and extends the working time of the device, making it suitable for IoT NB-IoT applications.
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Figure CN224111153U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to diode technical field, concretely is a kind of low-loss high-end ideal diode. BACKGROUND
[0002] Diode has unidirectional conduction characteristic, has the function of preventing reverse flow, obtains more and more application, especially Schottky diode string into power supply has smaller voltage drop, is more and more welcomed by designer. Since the voltage drop of Schottky diode is still greater than MOS tube voltage drop, for some voltage-sensitive circuit, more inclined to use MOS tube with low impedance characteristics, improve the reliability of product. Now there are many USB power switches (distribution switches), with the function of preventing reverse flow, such as MP62055 chip. Because when external equipment is connected to the USB port of computer, equipment cannot reverse flow into the VBus of computer, otherwise it will burn computer. Current Oring circuit is applied to many occasions, the role is to ensure that each single power supply is independent of each other, does not appear reverse flow phenomenon, the most common application is in current-sharing circuit, meets different power requirements.
[0003] Therefore, an ideal diode is needed, an ideal diode with ultra-low loss, further reduces the voltage drop, and has the function of preventing reverse flow and protecting the front stage, so as to minimize the loss and prolong the battery working time.
[0004] In addition, the most similar technical implementation scheme of the present application is as follows, but there are certain deficiencies:
[0005] Diode scheme: diode has unidirectional conductivity, so it is a natural Oring circuit, the most basic Oring circuit is to add a diode at the output. Diode is used to be connected in series on power supply, and the circuit is simple, and its defect is that diode has a voltage drop of about 0.6V, and the voltage drop will increase in proportion to the input current. With the increase of current, the voltage drop will also increase, such as using Schottky diode to replace it can reduce power, but the power loss is relatively large: taking Schottky diode SS54 as an example, the voltage drops corresponding to current 0.1A, 1A, 10A and 20A are 0.3V, 0.4V, 0.85V and 1.4V respectively, and the corresponding losses are 0.03W, 0.4W, 8.5W and 28W respectively, which means that the greater the current, the greater the loss. The disadvantage of Schottky diode is still the voltage drop, which is converted into current loss, and the static current loss is at least milliamperes.
[0006] MCU+PMOS tube scheme: the circuit features need an additional auxiliary high voltage, microcontroller (MCU), using the two-way AD of MCU to collect the voltage of PMOS tube drain (drain) and source (source), compare the voltage of the two, and then control the conduction and cut-off of PMOS tube, the disadvantage is that the working current loss is at least milliamperes, the current loss is very large, and an additional auxiliary high voltage and MCU are needed, the cost of the scheme is high.
[0007] Double NPN pair tube + NMOS tube scheme: the circuit features need an additional auxiliary high voltage, using two NPN tubes of the same manufacturer and the same batch, so that the two collector voltages are basically equal, or preferably two NPN triode pairs packaged together, so that they are almost equal, so that the appropriate switching and anti-inversion function can be ensured, the disadvantage is that the bias resistance of the triode is kiloohms, and the static working current loss is at least milliamperes, the current loss is very large, and an additional auxiliary high voltage is needed.
[0008] Double PNP pair tube + PMOS tube scheme: select two PNP triode devices packaged together, which can ensure that the two collectors are almost equal, so that the appropriate switching and anti-inversion function can be ensured, the disadvantage is that the bias resistance of the triode is kiloohms, and the static working current loss is at least milliamperes, the current loss is very large.
[0009] Ideal diode scheme: use chip LTC4413, Linear Technology (Linear Technology) introduces double-channel ideal diode LTC4413, which is specially designed for reducing heat, pressure drop, and board area and prolonging battery life. The device is very suitable for applications that require ideal diode "or" function to achieve load sharing or automatic switching between two input power supplies. LTC4413 has a low forward voltage of 80mV and 210mV at 500mA and 2A, respectively, and a leakage current of only 1uA, which is a great improvement over discrete diode "or" solutions. LTC4413 contains two 100mOhm P-channel MOSFETs. The maximum forward current of each MOSFET is limited to a constant 2.6A, and the internal thermal limiting circuit can protect the device in the event of a failure. Disadvantages: output current is as high as 1A, static current is less than 40uA, and there is a reverse inversion current of less than 1uA flowing from the output OUT to the input IN; 9uA drain open circuit STAT pin indicates the conduction state of the selected channel, and can be used to drive external P-channel MOSFET to control the third standby power supply; LTC4413 is expensive, and the price of 1000 pieces is 2.15 dollars per piece.
[0010] According to the control power polarity, it is divided into High Side (high end, high side, low side) load switch, Low Side (low end, low side, low side) load switch, respectively similar to control the live line, zero line of 220V mains. High side load switch: it is connected or disconnected through the control of external enable signal (battery or adapter) to the specific load. Compared with low side load switch, high side load switch "flows out" current to the load, while low side load switch connects or disconnects the load to the negative pole, so it "sucks in" current from the load.
[0011] In the field of vehicle-mounted, high side load switch has a wider application than low side load switch, the main reasons are short circuit protection and system cost, the probability of circuit short circuit (Short Circuit, SC) to ground is higher than that of short circuit to power supply, so using high side load switch has a higher probability of reducing short circuit problems than low side load switch.
[0012] The combination form of high side load switch mainly includes: PMOS main pipe+NPN auxiliary pipe, PMOS main pipe+NMOS auxiliary pipe, etc.
[0013] The high side load switch composed of PMOS main pipe and NPN auxiliary pipe, the main pipe uses PMOS pipe instead of PNP pipe, and the conduction voltage drop is smaller than that of PNP pipe, which can be applied to medium current occasions, and the conduction current of general power PMOS pipe can reach several amperes, therefore, a low-loss high-end ideal diode is proposed to solve the above problems. The utility model discloses a low-loss high-end ideal diode, and the low-loss high-end ideal diode is used to solve the problems in the background art.
[0014] The utility model discloses a low-loss high-end ideal diode, and the low-loss high-end ideal diode is used to solve the problems in the background art.
[0015] In order to achieve the above object, the utility model provides the following technical scheme: a low-loss high-end ideal diode, comprising a high side load switch and a comparator, the high side load switch and the comparator constitute an integral circuit, the high side load switch is composed of a main pipe and an auxiliary pipe, the main pipe is a PMOS pipe, and the auxiliary pipe is an NMOS pipe or an NPN pipe.
[0016] Preferably, the comparator compares the size of the input power supply and the output power supply, and then judges the conduction and cut-off of the PMOS main pipe of the high side load switch.
[0017] Preferably, the comparator is a Schmitt trigger.
[0018] Compared with the prior art, the utility model has the advantages that: the circuit has the function of preventing reverse flow, can protect the front stage circuit, has lower loss, static current loss is small, uses high -end load switch and comparator, the circuit is simple, the cost is very low, the practicality is strong, compared with traditional power diode or triode control current loss milliampere level, static current loss is small, and there is no reverse flow current, the circuit reduces the static loss of equipment, prolongs the working time of battery, equipment maintenance cost, loss reduces greatly, be applicable to thing networking NB - IoT ultra - low loss ideal diode circuit application of pipe, the circuit is very simple and has very low cost advantage. BRIEF DESCRIPTION OF DRAWINGS
[0019] Figure 1 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NMOS pipe;
[0020] Figure 2 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NPN pipe;
[0021] Figure 3 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NMOS pipe; Figure 1 Forward bias simulation;
[0022] Figure 4 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NMOS pipe; Figure 1 Reverse bias simulation;
[0023] Figure 5 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NMOS pipe; Figure 2 Forward bias simulation;
[0024] Figure 6 It is the low loss high end ideal diode principle block diagram that the utility model auxiliary pipe is NMOS pipe; Figure 2 Reverse bias simulation. DETAILED DESCRIPTION
[0025] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model. EMBODIMENT
[0026] Refer to Figure 1 , 2For the first embodiment of the utility model, this embodiment provides a kind of low-loss high-end ideal diode, including high-end load switch and comparator, high-end load switch and comparator constitute integral circuit, high-end load switch is made of main tube and auxiliary tube, main tube is PMOS tube V1, auxiliary tube is NMOS tube V2, the gate of PMOS tube V1, source resistance R1 is connected to the drain D of NMOS tube V2 or the collector C of NPN tube by R2 connection PMOS tube's gate, resistance value R1 generally is 10xR2;The same phase end of the comparator is connected into resistance R5 and connects input power supply VCC, opposite phase end is connected into resistance R4 and connects output power supply Vout, the output end of comparator is connected with the auxiliary tube of high-end load switch (the gate G of NMOS tube or the base B of NPN), and the output end of comparator is open drain output and needs external pull-up resistance R3.
[0027] When input voltage VCC is not less than output voltage Vout, comparator output high level Vout=VCC-V F , NMOS tube V2 is turned on, PMOS tube V1 is turned on, and Vout≈VCC;Conversely, when input voltage VCC is less than output voltage Vout, comparator output low level is about 0V, NMOS tube V2 is cut off, PMOS tube V1 is cut off, prevent Vout current from pouring to VCC, and protect VCC power supply front circuit.
[0028] Specifically, the comparator compares the size of the input power supply and the output power supply, and then judges the conduction and cut-off of the PMOS main tube of the high-end load switch, to prevent the output power from pouring into the input power, and to protect the input power supply front circuit.
[0029] Specifically, the comparator is a Schmitt trigger, which has a priority hysteresis loop transmission characteristic. The threshold voltage of this comparator changes rapidly with the change of output voltage, and the anti-interference ability is improved. The hysteresis comparator has hysteresis characteristic, i.e. inertia, so it has certain anti-interference ability. The stronger the anti-interference ability is, the worse the sensitivity is. The hysteresis comparator circuit has two threshold voltages: the threshold voltage VT1 at which the output voltage Vout jumps when the input voltage VCC gradually increases, and the threshold voltage VT2 at which the output voltage Vout jumps when the input voltage VCC gradually decreases. VT1 ≠ VT2, and the circuit has hysteresis characteristic. The same as single-limit comparator is: when input voltage changes in a single direction, output voltage Vout only jumps once.
[0030] PMOS tube V1 can use PMOS tubes with different conduction current sizes. For high-power power supply control, PMOS tube can select conduction resistance R DS(ON) Between drain and source, through large-current power tube device, through large current, small voltage drop, i.e. very low forward voltage, which can be approximated as an ideal diode. Embodiment
[0031] In the circuit of embodiment 1 Figure 1 , replace NMOS V2 with NPN, and connect resistor R6 between the output of the comparator and the base of NPN V2, as shown in Figure 2 , and the rest remains unchanged. The difference between the two implementations is that this embodiment uses NPN, which is a current device, and the loss is larger than NMOS, so the total loss of this embodiment is larger than that of embodiment 1.
[0032] Simulation test:
[0033] According to Figure 1 , Figure 2 circuit diagram, use National Instruments' simulation software Multisim (version V14.0) for simulation test, the model of the comparator selected is LMC7211AIM5, rail-to-rail op-amp, and the output stage uses push-pull amplification to achieve approximate full swing; the PMOS selected is ON Semiconductor, model NVTFS5124PLTAG, minimum on-state threshold voltage V TP(MIN) =-1.5V, maximum V TP(MAX) =-2.5V, no typical value V TP is given, on-state current up to -6A, on-state resistance R DS(ON) =0.26Ω (V GS =-10V), R DS(ON) =0.38Ω (V GS =-4.5V). The NMOS selected is NXP, model 2N7002E, minimum on-state voltage V TN(MIN) =1V, maximum V TN(MAX) =2.8V, no typical value V TN is given, on-state current I D 10A / 30V, on-state resistance R DS(ON) ≤0.03Ω (V GS =10V), R DS(ON) ≤0.05Ω (V GS =4.5V). Load resistance RL=10Ω, specific simulation test as follows.
[0034] Simulation of embodiment 1
[0035] Low-loss high-end ideal diode simulation with NMOS as auxiliary tube.
[0036] DC power supply forward bias simulation test: VCC = 12V (switch J1 closed), when the forward conduction, PMOS tube V1 output voltage Vout = 11.7V (digital multimeter voltage block test for 11.697V), comparator output is high (Vo = 11.7V), NMOS V2 conduction, PMOS V1 conduction voltage drop is 12V-11.7V = 0.3V, lower than the conduction voltage drop V F , the positive output current of power supply 1.17A, corresponding to the conduction impedance R DS(ON) = 0.3V / 1.17A = 0.256Ω, little difference with Datasheet data; high-end load switch and comparator circuit loss current is about 11.6uA (test point PR9) + 10.1uA (test point PR8) = 21.7uA, loss P = 12V x 21.7uA = 0.26mW, as shown in Figure 3 .
[0037] DC power supply reverse bias simulation test: switch J1 closed, switch J2 is also closed, that is, Vout = 13V > VCC = 12V, comparator output is low (Vo = 131mV, test point PR4), NMOS V2 cutoff, PMOS V1 cutoff, reverse current is 0A (test point PR5, can be ignored), can be considered no current backflow occurs; high-end load switch and comparator circuit loss current is about 2.93nA (test point PR9) + 139uA (test point PR8) ≈ 139uA, loss P = 12V x 139uA = 1.668mW, as shown in Figure 4 .
[0038] Example 1 simulation
[0039] Auxiliary pipe for NPN tube constitutes a low loss high-end ideal diode forward bias simulation.
[0040] DC power supply forward bias simulation test: VCC = 12V (switch J1 closed), when the forward conduction, PMOS tube V1 output voltage Vout = 11.7V (digital multimeter voltage block test for 11.697V), comparator output is high (Vo = 11.7V), NPN V2 conduction, PMOS V1 conduction voltage drop is 12V-11.7V = 0.3V, lower than the conduction voltage drop V F , the positive output current of power supply 1.17A, corresponding to the conduction impedance R DS(ON) = 0.3V / 1.17A = 0.256Ω, little difference with Datasheet data; high-end load switch and comparator circuit loss current is about 1.1mA (test point PR9) + 9.46uA (test point PR8) = 1.110mA, loss P = 12V x 1.110mA = 1.332mW, as shown inFigure 5 As shown, the forward bias simulation loss is greater than embodiment one.
[0041] DC power supply reverse bias simulation test: after switch J1 is closed, switch J2 is also closed, that is, Vout=13V>VCC=12V, the comparator output is low (Vo=131mV, test point PR4), NPN tube V2 is cut off, PMOS tube V1 is cut off, and the reverse current is 0A (test point PR5), and no current backflow phenomenon occurs; the loss current of the high-end load switch and the comparator circuit is about 16.8pA (test point PR9)+139μA (test point PR8)≈139μA, and the loss P=12V×139μA=1.668mW, as shown in Figure 6 As shown, the reverse bias simulation loss is the same as embodiment one.
[0042] Although the embodiments of the present application have been shown and described, it can be understood by those skilled in the art that various changes, modifications, replacements and modifications can be made to these embodiments without departing from the principles and spirits of the present application, and the scope of the present application is defined by the appended claims and their equivalents.
Claims
1. A low-loss high-side ideal diode comprising a high-side load switch and a comparator, characterized by: The high-end load switch and the comparator constitute an integral circuit, the high-end load switch is composed of a main tube and an auxiliary tube, the main tube is a PMOS tube, and the auxiliary tube is an NMOS tube or an NPN tube.
2. A low-loss high-side ideal diode according to claim 1, characterized in that: The comparator compares the sizes of the input power supply and the output power supply, and then judges the conduction and cutoff of the PMOS main tube of the high-end load switch.
3. A low-loss high-side ideal diode according to claim 1, characterized in that: The comparator is a Schmitt trigger.