Broadband comb spectrum correction source

Abstract

The utility model provides a broadband comb spectrum correction source, which relates to the field of comb spectrum correction sources, and adopts the main technical scheme that the broadband comb spectrum correction source comprises a power divider, a comb spectrum generation module, a temperature control module, a power supply, an FPGA (Field Programmable Gate Array), a pulse wave generation module, a radio frequency switch and a frequency conversion module, the power divider is used for receiving an input signal; the input end of the comb spectrum generation module is connected with the output end of the power divider; the input end of the temperature control module is connected with the output end of the power divider; the power supply is used for providing stable voltage; the input end of the FPGA is connected with the output end of the power supply; the input end of the pulse wave generation module is connected with the output end of the power divider and the output end of the FPGA; when the requirements of amplitude consistency and phase consistency of each channel of the receiver are met, the output amplitude and phase of the correction signal are adaptively adjusted by measuring the size of the output signal, so that the output signal does not generate phase mismatch.

Description

Technical Field

[0001] This utility model relates to the field of comb spectrum correction sources, and in particular to a broadband comb spectrum correction source. Background Technology

[0002] The direction-finding accuracy of a multi-channel interferometer direction-finding system is related to the phase difference between the output signals of the multi-channel receiver. It places strict requirements on the amplitude and phase consistency of each channel of the direction-finding receiver. Therefore, the direction-finding system needs to correct phase mismatch using a calibration signal source. In calibration source circuits operating in the 40MHz-8000MHz frequency band, amplitude fluctuations in the comb spectrum caused by cascading multiple RF filters can make the system's frequency response characteristics uneven. Increased frequencies can easily induce feedback, reducing the system's gain. Therefore, the amplitude fluctuation problem of the comb spectrum caused by cascading multiple RF filters is a factor that cannot be ignored in the design of the calibration source. Utility Model Content

[0003] The purpose of this invention is to provide a wideband comb spectrum correction source that achieves the goal of not causing phase mismatch while ensuring the amplitude and phase consistency of each channel of the receiver.

[0004] This utility model is achieved through the following technical solution:

[0005] A broadband comb spectrum correction source includes: a power divider, a comb spectrum generation module, a temperature control module, a power supply, an FPGA, a pulse wave generation module, an RF switch, and a frequency conversion module. The power divider receives input signals. The input terminal of the comb spectrum generation module is connected to the output terminal of the power divider. The input terminal of the temperature control module is connected to the output terminal of the power divider. The power supply provides a stable voltage. The input terminal of the FPGA is connected to the output terminal of the power supply. The input terminals of the pulse wave generation module are connected to the output terminals of both the power divider and the FPGA. The input terminals of the RF switch are connected to the output terminals of the comb spectrum generation module, the temperature control module, and the pulse wave generation module. The input terminals of the frequency conversion module are connected to the output terminals of both the RF switch and the FPGA. The output terminal of the frequency conversion module transmits signals with a clock frequency of 40MHz-8000MHz.

[0006] Optionally, the comb spectrum generation module includes a first amplification unit, a second amplification unit, and a third amplification unit;

[0007] The first amplification unit includes an IF5 amplifier, a phase detector, a loop filter, a voltage-controlled oscillator, a P1 power divider, and a counter;

[0008] The input of the IF5 amplifier is used to receive the input signal;

[0009] The output of the IF5 amplifier is connected to the input of the phase detector;

[0010] The outputs of the phase detectors are connected to the inputs of the loop filter and the FPGA.

[0011] The output of the loop filter is connected to the input of the voltage-controlled oscillator.

[0012] The output of the voltage-controlled oscillator is connected to the input of the P1 power divider.

[0013] The output terminals of the P1 power divider are connected to the input terminals of the phase detector and the counter.

[0014] The input terminal of the first amplification unit is connected to the output terminal of the power divider.

[0015] The output terminal of the first amplification unit is connected to the input terminal of the second amplification unit, the output terminal of the second amplification unit is connected to the input terminal of the third amplification unit, and the output terminal of the third amplification unit is connected to the input terminal of the radio frequency switch.

[0016] Optionally, the second amplification unit includes a first-stage filter and an IF3 amplifier;

[0017] The input of the first-stage filter is connected to the output of the counter;

[0018] The output of the first-stage filter is connected to the input of the IF3 amplifier;

[0019] The output of the IF3 amplifier is connected to the input of the third amplification unit.

[0020] Optionally, the third amplification unit includes a secondary filter and an IF4 amplifier;

[0021] The input terminal of the second-stage filter is connected to the output terminal of the IF3 amplifier;

[0022] The output of the second-stage filter is connected to the input of the IF4 amplifier;

[0023] The output of the IF4 amplifier is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

[0024] Optionally, the pulse wave generation module includes a fourth amplification unit and a pulse wave generation unit;

[0025] The fourth amplification unit includes a T1 attenuator and an IF6 amplifier;

[0026] The input terminal of the T1 attenuator is used to receive the input signal;

[0027] The output of attenuator T1 is connected to the input of amplifier IF6;

[0028] The input terminal of the fourth amplification unit is connected to the output terminal of the power divider;

[0029] The output terminal of the fourth amplification unit is connected to the input terminal of the pulse wave generation unit, and the output terminal of the pulse wave generation unit is connected to the input terminal of the radio frequency switch.

[0030] Optionally, the pulse wave generation unit includes a phase-locked loop, a T2 attenuator, an IF7 amplifier, a surface acoustic wave filter, and a switch;

[0031] The input terminal of the phase-locked loop is connected to the output terminal of the IF6 amplifier;

[0032] The output of the phase-locked loop is connected to the input of the T2 attenuator;

[0033] The output of the T2 attenuator is connected to the input of the IF7 amplifier;

[0034] The output of the IF7 amplifier is connected to the input of the surface acoustic wave filter;

[0035] The output of the surface acoustic wave filter and the output of the FPGA are both connected to one end of the switch.

[0036] The outputs of the FPGA are all connected to the input of the phase-locked loop and the other end of the switch;

[0037] The other end of the switch is used to transmit an output clock signal of 40MHz-8000MHz.

[0038] Optionally, the temperature control module includes a temperature sensor;

[0039] The input terminal of the temperature sensor is connected to the FPGA;

[0040] The output of the temperature sensor is connected to the input of the radio frequency switch.

[0041] Optionally, the frequency conversion module includes a first-stage frequency conversion unit, a second-stage frequency conversion unit, and a radio frequency unit;

[0042] The first-stage frequency conversion unit includes a bandpass filter, an IF2 amplifier, an IF2 filter, and an L02 mixer;

[0043] The input terminal of the bandpass filter is used to receive the input clock;

[0044] The output of the bandpass filter is connected to the input of the IF2 amplifier.

[0045] The output of the IF2 amplifier is connected to the input of the IF2 filter;

[0046] The output of the IF2 filter is connected to the input of the L02 mixer;

[0047] The input terminal of the first-stage frequency converter unit is connected to the input terminal of the radio frequency switch;

[0048] The output terminal of the first-stage frequency converter is connected to the input terminal of the second-stage frequency converter, and the output terminal of the second-stage frequency converter is connected to the input terminal of the radio frequency unit.

[0049] Optionally, the second-stage frequency conversion unit includes an IF1 filter, an IF1 amplifier, and an L01 mixer;

[0050] The input of the IF1 filter is connected to the output of the L02 mixer;

[0051] The output of the IF1 filter is connected to the input of the IF1 amplifier;

[0052] The output of amplifier IF1 is connected to the input of mixer L01;

[0053] The output of the L01 mixer is connected to the input of the RF unit.

[0054] Optionally, the radio frequency unit includes a radio frequency amplifier, a radio frequency filter, and a radio frequency attenuator;

[0055] The input of the RF amplifier is connected to the output of the L01 mixer;

[0056] The output of the RF amplifier is connected to the input of the RF filter;

[0057] The output of the RF filter is connected to the input of the RF attenuator.

[0058] The output of the RF attenuator is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

[0059] Compared with the prior art, this utility model has the following advantages and beneficial effects:

[0060] 1. The output terminal of the FPGA of this utility model is connected to the comb generation module, and the power divider is connected to the comb generation module, which will cause the broadband comb spectrum correction source to generate a comb spectrum; the output terminal of the FPGA is connected to the input terminal of the pulse wave generation module, and the output terminal of the power divider is connected to the input terminal of the pulse wave generation module, which will cause the broadband comb spectrum correction source to generate a broadband pulse wave; the output signals with comb spectrum and broadband pulse wave can measure the error of many frequency points in the broadband filter band, thus meeting the needs of broadband correction.

[0061] 2. In this utility model, the output of the broadband comb spectrum correction source is connected to the input of the comb generation module and the pulse wave generation module, generating a comb spectrum and a broadband pulse wave. The output of the comb generation module, the output of the temperature control module, and the output of the pulse wave generation module are all connected to the input of the RF switch. The output of the RF switch is connected to the input of the frequency conversion module. The output of the frequency conversion module emits an output signal. By measuring the magnitude of the output signal, the output amplitude and phase of the correction signal can be adaptively adjusted to ensure amplitude and phase consistency, making the measurement inconsistency error results more accurate and the correction effect better. Attached Figure Description

[0062] To more clearly illustrate the technical solutions of the exemplary embodiments of this utility model, the drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of this utility model and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0063] Figure 1 This is a block diagram of the FPGA main control module of this utility model.

[0064] Figure 2 This is a module diagram of the dressing table of this utility model.

[0065] Figure 3 This is a diagram of the pulse wave generation module of this utility model.

[0066] Figure 4 This is a diagram of the frequency converter module of this utility model.

[0067] Figure 5 This is a timing diagram for the status query data return of this utility model.

[0068] Figure 6 This is a timing diagram showing the return of temperature query data for this utility model.

[0069] The attached diagram shows the markings and corresponding component names:

[0070] 100-Power divider; 200-Comb spectrum generation module; 300-Temperature control module; 400-Power supply; 500-FPGA; 600-Pulse wave generation module; 700-RF switch; 800-Frequency conversion module. Detailed Implementation

[0071] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of this utility model are only used to explain this utility model and are not intended to limit this utility model.

[0072] Example: A broadband comb-spectrum correction source, such as Figures 1 to 4 As shown, the system includes: a power divider 100, a comb spectrum generation module 200, a temperature control module 300, a power supply 400, an FPGA 500, a pulse wave generation module 600, an RF switch 700, and a frequency conversion module 800. The power divider 100 is used to receive input signals; the input terminal of the comb spectrum generation module 200 is connected to the output terminal of the power divider 100; the input terminal of the temperature control module 300 is connected to the output terminal of the power divider 100; the power supply 400 is used to provide a stable voltage; and the input terminal of the FPGA 500 is connected to the output terminal of the power supply 400. The input terminals of the pulse wave generation module 600 are all connected to the output terminals of the power divider 100 and the FPGA 500; the input terminals of the RF switch 700 are all connected to the output terminals of the comb spectrum generation module 200, the temperature control module 300, and the pulse wave generation module 600; the input terminals of the frequency conversion module 800 are all connected to the output terminals of the RF switch 500 and the FPGA 500, and the output terminal of the frequency conversion module 600 is used to transmit signals with a clock frequency of 40MHz-8000MHz.

[0073] In this embodiment, as Figure 2 As shown, the comb spectrum generation module 200 includes a first amplification unit, a second amplification unit, and a third amplification unit;

[0074] The first amplification unit includes an IF5 amplifier, a phase detector, a loop filter, a voltage-controlled oscillator, a P1 power divider, and a counter;

[0075] The input of the IF5 amplifier is used to receive the input signal;

[0076] The output of the IF5 amplifier is connected to the input of the phase detector;

[0077] The outputs of the phase detectors are connected to the inputs of the loop filter and the FPGA500.

[0078] The output of the loop filter is connected to the input of the voltage-controlled oscillator.

[0079] The output of the voltage-controlled oscillator is connected to the input of the P1 power divider.

[0080] The output terminals of the P1 power divider are connected to the input terminals of the phase detector and the counter.

[0081] The input terminal of the first amplification unit is connected to the output terminal of the power divider 100.

[0082] The output terminal of the first amplification unit is connected to the input terminal of the second amplification unit, the output terminal of the second amplification unit is connected to the input terminal of the third amplification unit, and the output terminal of the third amplification unit is connected to the input terminal of the radio frequency switch 700.

[0083] In this embodiment, as Figure 2 As shown, the second amplification unit includes a first-stage filter and an IF3 amplifier;

[0084] The input of the first-stage filter is connected to the output of the counter;

[0085] The output of the first-stage filter is connected to the input of the IF3 amplifier;

[0086] The output of the IF3 amplifier is connected to the input of the third amplification unit.

[0087] In this embodiment, as Figure 2 As shown, the third amplification unit includes a two-stage filter and an IF4 amplifier;

[0088] The input terminal of the second-stage filter is connected to the output terminal of the IF3 amplifier;

[0089] The output of the second-stage filter is connected to the input of the IF4 amplifier;

[0090] The output of the IF4 amplifier is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

[0091] In this embodiment, as Figure 3 As shown, the pulse wave generation module 600 includes a fourth amplification unit and a pulse wave generation unit;

[0092] The fourth amplification unit includes a T1 attenuator and an IF6 amplifier;

[0093] The input terminal of the T1 attenuator is used to receive the input signal;

[0094] The output of attenuator T1 is connected to the input of amplifier IF6;

[0095] The input terminal of the fourth amplification unit is connected to the output terminal of the power divider 100;

[0096] The output terminal of the fourth amplification unit is connected to the input terminal of the pulse wave generation unit, and the output terminal of the pulse wave generation unit is connected to the input terminal of the radio frequency switch 700.

[0097] In this embodiment, as Figure 3As shown, the pulse wave generation unit includes a phase-locked loop, a T2 attenuator, an IF7 amplifier, a surface acoustic wave filter, and a switch;

[0098] The input terminal of the phase-locked loop is connected to the output terminal of the IF6 amplifier;

[0099] The output of the phase-locked loop is connected to the input of the T2 attenuator;

[0100] The output of the T2 attenuator is connected to the input of the IF7 amplifier;

[0101] The output of the IF7 amplifier is connected to the input of the surface acoustic wave filter;

[0102] The output terminals of the surface acoustic wave filter and the FPGA500 are both connected to one end of the switch.

[0103] The outputs of the FPGA500 are all connected to the input of the phase-locked loop and the other end of the switch;

[0104] The other end of the switch is used to transmit an output clock signal of 40MHz-8000MHz.

[0105] In this embodiment, the temperature control module 300 includes a temperature sensor;

[0106] The input terminal of the temperature sensor is connected to the FPGA500;

[0107] The output of the temperature sensor is connected to the input of the radio frequency switch 700.

[0108] In this embodiment, as Figure 4 As shown, the frequency conversion module 800 includes a first-stage frequency conversion unit, a second-stage frequency conversion unit, and a radio frequency unit;

[0109] The first-stage frequency conversion unit includes a bandpass filter, an IF2 amplifier, an IF2 filter, and an L02 mixer;

[0110] The input terminal of the bandpass filter is used to receive the input clock;

[0111] The output of the bandpass filter is connected to the input of the IF2 amplifier.

[0112] The output of the IF2 amplifier is connected to the input of the IF2 filter;

[0113] The output of the IF2 filter is connected to the input of the L02 mixer;

[0114] The input terminal of the first-stage frequency converter unit is connected to the input terminal of the radio frequency switch 700;

[0115] The output terminal of the first-stage frequency converter is connected to the input terminal of the second-stage frequency converter, and the output terminal of the second-stage frequency converter is connected to the input terminal of the radio frequency unit.

[0116] In this embodiment, as Figure 4 As shown, the second-stage frequency conversion unit includes an IF1 filter, an IF1 amplifier, and an L01 mixer;

[0117] The input of the IF1 filter is connected to the output of the L02 mixer;

[0118] The output of the IF1 filter is connected to the input of the IF1 amplifier;

[0119] The output of amplifier IF1 is connected to the input of mixer L01;

[0120] The output of the L01 mixer is connected to the input of the RF unit.

[0121] In this embodiment, as Figure 4 As shown, the radio frequency unit includes a radio frequency amplifier, a radio frequency filter, and a radio frequency attenuator;

[0122] The input of the RF amplifier is connected to the output of the L01 mixer;

[0123] The output of the RF amplifier is connected to the input of the RF filter;

[0124] The output of the RF filter is connected to the input of the RF attenuator.

[0125] The output of the RF attenuator is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

[0126] This embodiment provides a broadband comb-spectrum correction source, the working principle of which is as follows:

[0127] The FPGA control module communicates with the communication host, i.e., the external control computer, to generate various control signals. It controls the phase detector and counter in the comb spectrum generation module to ensure the generation of a usable comb spectrum; it controls the phase-locked loop chip and switch in the pulse wave generation module to ensure the generated pulse wave; and it controls the RF switch and programmable attenuator in the calibration source mixer-converter output module to select the required RF link and ensure appropriate link gain. The externally applied DC voltage is fed into the FPGA after passing through a voltage regulator chip. The control signals generated by the FPGA are all sent to the various control pins of other modules after passing through a power supply electromagnetic compatibility filter. The FPGA model is XC7VX690T-2FF1158I.

[0128] In the comb spectrum generation module, an external 40MHz clock signal is input, amplified, and then enters the phase detector of the phase-locked loop (PLL). The PLL outputs an envelope pulse signal, which is then passed through a counter and filtered and amplified in two stages to output a 40MHz-8000MHz comb spectrum signal. The phase detector and counter are controlled by FPGA control signals. The comb spectrum generation module mainly generates a 40MHz-8000MHz comb spectrum. The generated comb spectrum signal is selected by an RF switch and sent to the subsequent mixer-converter output module for frequency conversion. In this implementation scheme, the IF3 and IF4 amplifiers are both HMC476MP86; the phase detector and counter are both ADF4106; and the voltage-controlled oscillator is ROS-3146-119+.

[0129] In the pulse wave generation module, the input 40MHz clock signal is amplified by an attenuator and then enters the integrated phase-locked loop (PLL) chip. The output of the PLL chip is attenuated, amplified, and filtered before entering the switch. Control signals generated by the FPGA control the PLL chip and the switch, thereby generating a pulse wave signal of 40MHz-8000MHz. The main function of the pulse wave generation module is to generate a pulse wave of 40MHz-8000MHz. The generated pulse wave is selected by the RF switch and then sent to the subsequent mixer-converter output module for frequency conversion. In the pulse wave generation module, the IF6 and IF7 amplifiers are HMC476MP86; the PLL is SI4133-GT; the surface acoustic wave filter is 140015L; the switch is HMC550; and the T1 and T2 attenuators are HMC540LP3.

[0130] The temperature control module includes a temperature sensor, which is connected to the FPGA. The temperature sensor is a DS18B20.

[0131] In the frequency conversion module, the IF1 amplifier and IF2 amplifier are both TQP3M9028, the L01 mixer and L02 mixer are both BALF-NRG-02D3, the IF1 filter and IF2 filter are both BFHK-8501+; the RF filter is SMD3500, the RF amplifier is ACPM-5007-TR1, the RF attenuator is PAT50A, and the bandpass filter is YIG81617. The working principle of the correction source is as follows: the input clock is 40MHz as the excitation input of the correction source, and its carrier center frequency is 40MHz. This signal is first filtered and shaped by an LC filter with a center frequency of 40MHz and a bandwidth of 40MHz to obtain a comb spectrum excitation signal with a bandwidth of 40MHz. The shaped comb spectrum signal passes through the IF2 amplifier and IF2 filter in sequence, and is up-converted to the second intermediate frequency of 5.6GHz by the IF2 mixer. To compensate for the frequency conversion loss caused by the mixer, the signal needs to be amplified by the IF1 amplifier and then filtered out for out-of-band harmonics by the IF1 filter. Finally, the signal is converted to 40-8000MHz RF output by the IF1 mixer, and the output amplitude is amplified by the 40-8000MHz broadband amplifier to meet the specifications. The comb spectrum is then sent to the direction-finding antenna for amplitude and phase correction.

[0132] The calibration module control address code is 5 in the three-channel receiving component (5 bits). That is, when the control address code A4A3A2A1A0 in the data frame is 5, the calibration module responds to this instruction. When the control address code A4A3A2A1A0 in the data frame is b111111 (broadcast address), the calibration module will only respond to setting instructions and not query instructions.

[0133] Tuning frequency control command: The effective range of the tuning frequency of the calibration source module is 40MHz to 8000MHz, with a resolution of 100kHz. The control command code CMD is b10000 (5 bits), and the effective range of the control data FREQ (25 bits) is 40.000×1000 to 8000.000×1000, corresponding to binary numbers divisible by 100 from 00000000001001110001000000 (40×1000) to 0011110100001001000000000 (8000×1000). The tuning frequency control data frame is shown in Table 1.

[0134] Table 1 Tuning Frequency Control Data Frame

[0135]

[0136] Attenuation control command:

[0137] The attenuation instruction code CMD for the calibration source module is b10011 (5 bits), with an attenuation range of 0dB to 40dB and a step size of 10dB. That is, the valid control data ATT is: 0, 10, 20, 30, 40. The attenuation control data frame is shown in Table 2.

[0138] Table 2 Attenuation control data frames

[0139]

[0140] Calibration switch control commands:

[0141] The calibration source module switch command code CMD is b10010 (5 bits). When the calibration source module is on, the switch control code (3 bits) B2B1B0 = b111; when the calibration source module is off, the switch control code B2B1B0 = b000. The switch control data frame is shown in Table 3.

[0142] Table 3 Switch Control Data Frames

[0143]

[0144] All parameter setting instructions:

[0145] The calibration source module's parameter setting commands allow for the simultaneous setting of tuning frequency, attenuation, on / off status, and mode status. The control command code CMD is b01111 (5 bits), and the control data DATA (37 bits) is defined as follows: tuning frequency 25 bits (B36~B12), attenuation 6 bits (B11~B6), on / off status 3 bits (B5B4B3), and reserved 3 bits (B2B1B0:000). If any control parameter is invalid, all data will be discarded. The complete parameter control data frame is shown in Table 4.

[0146] Table 4 All Parameter Control Data Frames

[0147]

[0148] Status query command:

[0149] The calibration source module status query instruction code (CMD) is b10111, and the status query instruction data frame is shown in Table 5. The timing diagram for the status query data return is as follows: Figure 5 As shown in the diagram. After receiving the instruction, the module outputs the MISO signal on the rising edge of the SCK signal. At this time, the external SPI master device acquires data on the falling edge of the clock signal. The returned data is 37 bits in total, specifically defined as follows: 25 bits for tuning frequency (B36~B12), 6 bits for attenuation (B11~B6), 3 bits for switch status (B5B4B3), and 3 reserved bits (B2B1B0:000). The returned data format is shown in Table 6.

[0150] Table 5 Status Query Command Data Frame

[0151]

[0152] Table 6 Returns Data Format

[0153]

[0154] Temperature query command:

[0155] The source model temperature query command code (CMD) is b11001. The temperature query command data frame is shown in Table 26, and the timing diagram of the temperature query data is as follows. Figure 6 As shown. After receiving the instruction, the calibration source module outputs the MISO signal on the rising edge of SCK. At this time, the external SPI master device collects data on the falling edge of the clock signal. The returned data is 14 bits long, with B13 being the highest bit (sign bit). A B13 value of 1 indicates a negative temperature value, and a B13 value of 0 indicates a positive temperature value. B13..B0 represents the temperature value. When the temperature is positive, the test temperature T = (B13…B0) / 32 (in °C); when the temperature is negative, the test temperature T = (B13…B0 - 16384) / 32 (in °C). For example, if the returned temperature value B13B12…B0 = b00101000000000 (B13…B0 corresponds to the decimal data 2560), then T = 2560 / 32 = 80 °C; if the returned temperature value B13B12…B0 = b11110000100000 (B13…B0 corresponds to the decimal data 15392), then T = (15392 - 16384) / 32 = -31 °C.

[0156] Table 7 Temperature Query Command Data Frame

[0157]

[0158] This embodiment provides a broadband comb spectrum correction source, which has at least the following advantages: Connecting the output of the FPGA to the comb generation module and the power divider to the comb generation module will cause the broadband comb spectrum correction source to generate a comb spectrum; connecting the output of the FPGA to the input of the pulse wave generation module and the output of the power divider to the input of the pulse wave generation module will cause the broadband comb spectrum correction source to generate a broadband pulse wave; the output signals with comb spectrum and broadband pulse wave can measure the error at many frequency points within the broadband filter band, meeting the needs of broadband correction. The output of the FPGA is connected to the input of the comb generation module and the input of the pulse wave generation module, generating a comb spectrum and a broadband pulse wave. The outputs of the comb generation module, the temperature control module, and the pulse wave generation module are all connected to the input of the RF switch. The output of the RF switch is connected to the input of the frequency converter module. The output of the frequency converter module transmits an output signal. By measuring the magnitude of the output signal, the output amplitude and phase of the correction signal can be adaptively adjusted, ensuring amplitude and phase consistency, making the measurement inconsistency error results more accurate and the correction effect better.

[0159] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above description is only a specific embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A broadband comb spectrum correction source, characterized by, include: A power divider (100) is used to receive input signals; A comb spectrum generation module (200) is provided, the input of which is connected to the output of a power divider (100). Temperature control module (300), the input terminal of which is connected to the output terminal of power divider (100); A power supply (400) is used to provide a stable voltage; FPGA (500), the input terminal of which is connected to the output terminal of power supply (400); A pulse wave generation module (600) is provided, the input terminals of which are connected to the output terminals of the power divider (100) and the FPGA (500); Radio frequency switch (700), the input terminals of which are all connected to the output terminals of the comb spectrum generation module (200), the output terminal of the temperature control module (300) and the output terminal of the pulse wave generation module (600); The frequency conversion module (800) has its input terminals connected to the output terminals of the radio frequency switch (700) and the FPGA (500). The output terminals of the frequency conversion module (800) are used to transmit signals with a clock frequency of 40MHz-8000MHz.

2. The broadband comb spectrum correction source of claim 1, wherein, The comb spectrum generation module (200) includes a first amplification unit, a second amplification unit, and a third amplification unit; The first amplification unit includes an IF5 amplifier, a phase detector, a loop filter, a voltage-controlled oscillator, a P1 power divider, and a counter; The input of the IF5 amplifier is used to receive the input signal; The output of the IF5 amplifier is connected to the input of the phase detector; The outputs of the phase detectors are connected to the inputs of the loop filter and the inputs of the FPGA (500). The output of the loop filter is connected to the input of the voltage-controlled oscillator. The output of the voltage-controlled oscillator is connected to the input of the P1 power divider. The output terminals of the P1 power divider are connected to the input terminals of the phase detector and the counter. The input terminal of the first amplification unit is connected to the output terminal of the power divider (100); The output terminal of the first amplification unit is connected to the input terminal of the second amplification unit, the output terminal of the second amplification unit is connected to the input terminal of the third amplification unit, and the output terminal of the third amplification unit is connected to the input terminal of the radio frequency switch (700).

3. The wideband comb spectrum correction source of claim 2, wherein, The second amplification unit includes a first-stage filter and an IF3 amplifier; The input of the first-stage filter is connected to the output of the counter; The output of the first-stage filter is connected to the input of the IF3 amplifier; The output of the IF3 amplifier is connected to the input of the third amplification unit.

4. The wideband comb spectrum correction source of claim 3, wherein, The third amplification unit includes a secondary filter and an IF4 amplifier; The input terminal of the second-stage filter is connected to the output terminal of the IF3 amplifier; The output of the second-stage filter is connected to the input of the IF4 amplifier; The output of the IF4 amplifier is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

5. The broadband comb spectrum correction source of claim 1, wherein, The pulse wave generation module (600) includes a fourth amplification unit and a pulse wave generation unit; The fourth amplification unit includes a T1 attenuator and an IF6 amplifier; The input terminal of the T1 attenuator is used to receive the input signal; The output of attenuator T1 is connected to the input of amplifier IF6; The input terminal of the fourth amplification unit is connected to the output terminal of the power divider (100); The output terminal of the fourth amplification unit is connected to the input terminal of the pulse wave generation unit, and the output terminal of the pulse wave generation unit is connected to the input terminal of the radio frequency switch (700).

6. The broadband comb-spectrum correction source according to claim 5, characterized in that, The pulse wave generation unit includes a phase-locked loop, a T2 attenuator, an IF7 amplifier, a surface acoustic wave filter, and a switch; The input terminal of the phase-locked loop is connected to the output terminal of the IF6 amplifier; The output of the phase-locked loop is connected to the input of the T2 attenuator; The output of the T2 attenuator is connected to the input of the IF7 amplifier; The output of the IF7 amplifier is connected to the input of the surface acoustic wave filter; The output terminals of the surface acoustic wave filter and the FPGA (500) are both connected to one end of the switch; The outputs of the FPGA (500) are all connected to the input of the phase-locked loop and the other end of the switch; The other end of the switch is used to transmit an output clock signal of 40MHz-8000MHz.

7. The broadband comb spectrum correction source of claim 1, wherein, The temperature control module (300) includes a temperature sensor; The input terminal of the temperature sensor is connected to the FPGA (500); The output of the temperature sensor is connected to the input of the radio frequency switch (700).

8. The broadband comb spectrum correction source of claim 1, wherein, The frequency conversion module (800) includes a first-stage frequency conversion unit, a second-stage frequency conversion unit, and a radio frequency unit; The first-stage frequency conversion unit includes a bandpass filter, an IF2 amplifier, an IF2 filter, and an L02 mixer; The input terminal of the bandpass filter is used to receive the input clock; The output of the bandpass filter is connected to the input of the IF2 amplifier. The output of the IF2 amplifier is connected to the input of the IF2 filter; The output of the IF2 filter is connected to the input of the L02 mixer; The input terminal of the first-stage frequency converter unit is connected to the input terminal of the radio frequency switch (700); The output terminal of the first-stage frequency converter is connected to the input terminal of the second-stage frequency converter, and the output terminal of the second-stage frequency converter is connected to the input terminal of the radio frequency unit.

9. The wideband comb spectrum correction source of claim 8, wherein, The second-stage frequency conversion unit includes an IF1 filter, an IF1 amplifier, and an L01 mixer; The input of the IF1 filter is connected to the output of the L02 mixer; The output of the IF1 filter is connected to the input of the IF1 amplifier; The output of amplifier IF1 is connected to the input of mixer L01; The output of the L01 mixer is connected to the input of the RF unit.

10. The wideband comb spectrum correction source of claim 9, wherein, The radio frequency unit includes a radio frequency amplifier, a radio frequency filter, and a radio frequency attenuator; The input of the RF amplifier is connected to the output of the L01 mixer; The output of the RF amplifier is connected to the input of the RF filter; The output of the RF filter is connected to the input of the RF attenuator. The output of the RF attenuator is used to transmit signals with an output clock frequency of 40MHz-8000MHz.

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