Optical packaging module and wafer group structure thereof
By integrating electronic integrated circuits and photonic integrated circuits into optoelectronic integrated photonic chips, and forming grooves and conductive vias on the chip surface, the problems of signal delay and heat generation in existing technologies are solved, thereby improving signal transmission speed and accuracy and meeting the miniaturization requirements of electronic products.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SILICONWARE PRECISION IND CO LTD
- Filing Date
- 2025-04-24
- Publication Date
- 2026-04-17
AI Technical Summary
In existing co-packaged optical devices, the electrical connection between electronic chips and photonic chips requires multiple circuit layers, resulting in message delay and excessively long signal transmission paths, causing signal loss and heat generation. Furthermore, the device size is too large, which is not conducive to the miniaturization of electronic products.
Electronic integrated circuit components and photonic integrated circuit components are integrated into an optoelectronic integrated photonic chip, and grooves are formed on the chip surface to connect optical components. The optical components are supported by heat sinks, and direct electrical connection is achieved through conductive vias, reducing signal delay and heat generation.
It improves signal transmission speed and accuracy, reduces signal loss, and lowers the overall size of the device, making it suitable for the needs of future high-speed computing and data-intensive applications.
Smart Images
Figure CN224137493U_ABST
Abstract
Description
Technical Field
[0001] This application relates to a semiconductor packaging structure, and more particularly to an optical packaging module and its wafer assembly structure. Background Technology
[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multifunctionality and high performance. The application of fifth-generation (5G) communication technology has expanded to various fields such as the Internet of Things (IoT), Industrial Internet of Things (IIoT), cloud computing, artificial intelligence (AI), autonomous vehicles, and medical care. As applications expand, a massive amount of data needs to be efficiently transmitted, processed, and stored. The demand for data transmission, in particular, is surging, leading industries to replace electricity with light as the data transmission medium to improve transmission capacity, efficiency, and distance, while reducing energy consumption. Against this backdrop, co-packaged optical devices have become a future trend in semiconductor and packaging technologies.
[0003] Please see Figure 1 This is a cross-sectional schematic diagram of an existing co-packaged optical device 1. It mainly consists of an optical engine 11 mounted on a circuit board 10. The optical engine 11 includes an electronic chip 112 formed in a package structure 111 and a photonic chip 113 mounted on the package structure 111. One end of the photonic chip 113 is connected to an optical fiber 14, and a shelf 15 is provided below the junction of the photonic chip 113 and the optical fiber 14 to allow optical signals to be transmitted to the optical engine 11 for communication. At the same time, a switching chip 12 needs to be mounted on the circuit board 10 to be used in the terminal product. The switching chip 12 is first mounted on a substrate 13 and then mounted on the circuit board 10 through the substrate 13.
[0004] However, in the aforementioned co-packaged optical devices, since the electronic chip is embedded in the packaging structure, its electrical connection with the photonic chip requires multiple circuit layers. Therefore, for future high-speed computing and data-intensive applications that require the transmission of a large amount of information, there will be message delays, and the transmission of signals between long lines will generate a lot of heat. Furthermore, the photonic chip and the conversion chip must transmit signals through the circuits in the circuit board and substrate, which not only makes the overall size of the device too large and thick, which is not conducive to the miniaturization of electronic products, but also makes the signal transmission path too long, which is prone to signal loss and causes problems in the application of end products.
[0005] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Utility Model Content
[0006] In view of the various deficiencies of the prior art, this application provides a chip assembly structure, including: an optoelectronic integrated photonic chip, comprising electronic integrated circuit elements and photonic integrated circuit elements; electronic elements disposed on the optoelectronic integrated photonic chip; and optical elements disposed on the optoelectronic integrated photonic chip.
[0007] This application also provides an optical packaging module, including: a carrier structure; and a chip assembly structure disposed on and electrically connected to the carrier structure, comprising: an optoelectronic integrated photonic chip, including electronic integrated circuit elements and photonic integrated circuit elements; electronic elements disposed on the optoelectronic integrated photonic chip; and optical elements disposed on the optoelectronic integrated photonic chip.
[0008] This application also provides a method for manufacturing an optical packaging module, comprising: providing a chip assembly structure including an optoelectronic integrated photonic chip and electronic components disposed on the optoelectronic integrated photonic chip; attaching and electrically connecting the chip assembly structure to a carrier structure; and disposing optical components on the optoelectronic integrated photonic chip.
[0009] The aforementioned optical packaging module and its wafer assembly structure and manufacturing method also include a heat sink on the support structure for mounting the optical element.
[0010] The aforementioned optical packaging module and its wafer assembly structure and manufacturing method also include placing the carrier structure and electrically connecting it to a circuit board.
[0011] In the aforementioned optical packaging module and its wafer assembly structure and manufacturing method, the supporting structure is a substrate, an interposer, a circuit structure, or a packaging unit.
[0012] In the aforementioned optical packaging module and its wafer assembly structure and manufacturing method, the optoelectronic integrated photonic wafer has multiple conductive through holes that connect its surface.
[0013] In the aforementioned optical packaging module and its wafer assembly structure and manufacturing method, the optoelectronic integrated photonic wafer forms a groove for connecting the optical element.
[0014] In the aforementioned optical packaging module and its wafer assembly structure and manufacturing method, the electronic component is a high-bandwidth memory.
[0015] In the aforementioned optical packaging module and its wafer assembly structure and manufacturing method, the optical element is a lens structure.
[0016] As can be seen from the above, the optical packaging module and its chip assembly structure of this application mainly integrate electronic integrated circuit elements and photonic integrated circuit elements into a chip assembly (optoelectronic integrated photonic chip), which can directly perform signal conversion and transmission, thereby avoiding the signal delay and large amount of heat generated by the transmission of signals over long lines in the existing structure. In addition, the surface of the optoelectronic integrated photonic chip has grooves for optical elements to be connected to the grooves, and the optical elements are supported by heat sinks to stabilize them, which can effectively increase the accuracy of the optical signal and effectively reduce alignment loss. Furthermore, conductive vias are formed in the optoelectronic integrated photonic chip, and electronic elements are electrically connected to the conductive vias. In addition to being electrically connected to the optoelectronic integrated photonic chip, they can also be electrically connected to the underlying support structure to increase the signal transmission speed. Attached Figure Description
[0017] Figure 1 This is a cross-sectional schematic diagram of an existing co-packaged optical device.
[0018] Figures 2A to 2E This is a cross-sectional schematic diagram illustrating the fabrication method of the optical packaging module and its wafer assembly structure according to this application.
[0019] Explanation of reference numerals in the attached figures
[0020] 1. Co-packaged optical devices
[0021] 10 Circuit Boards
[0022] 11 Optical Engine
[0023] 111 Package Structure
[0024] 112 Electronic Chips
[0025] 113 Photonic Chip
[0026] 12 conversion chips
[0027] 13 substrate
[0028] 14 optical fibers
[0029] 15 brackets
[0030] 2a Chipset Structure
[0031] 2b Optical Packaging Module
[0032] 20 Optoelectronic Integrated Photonic Chips
[0033] 20a First side
[0034] 20b Second side
[0035] 200 grooves
[0036] 201 Conductive Through-hole
[0037] 202 Conductive bump
[0038] 21 Electronic Components
[0039] 22 Load-bearing structure
[0040] 22a First Surface
[0041] 22b Second Surface
[0042] 23 Heat sink
[0043] 24 Conductive elements
[0044] 25 Optical Components
[0045] 26. Circuit board. Detailed Implementation
[0046] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.
[0047] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," "third," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.
[0048] Please see Figures 2A to 2E This is a cross-sectional schematic diagram of the manufacturing method of the optical packaging module and its wafer assembly structure of this application.
[0049] like Figure 2A As shown, an optoelectronic integrated photonic chip (EPIC) 20 is provided, wherein at least one groove 200 is formed on the optoelectronic integrated photonic chip 20, and at least one electronic component 21 is disposed on the optoelectronic integrated photonic chip 20 and electrically connected to the optoelectronic integrated photonic chip 20.
[0050] In this embodiment, the optoelectronic integrated photonic chip 20 includes electronic integrated circuit elements (EIC) and photonic integrated circuit elements (PIC), and can directly perform signal conversion and transmission to avoid the problems of signal delay and large amount of heat generation caused by the transmission of signals between long lines in the existing structure. It has a first side 20a and a second side 20b, and forms a plurality of conductive vias 201 (e.g., conductive silicon vias) connecting the first side 20a and the second side 20b.
[0051] The groove 200 can be formed on the first side 20a of the optoelectronic integrated photonic chip 20 by means of laser cutting or cutting tool. A plurality of conductive bumps 202 are provided on the second side 20b of the optoelectronic integrated photonic chip 20.
[0052] In this embodiment, the electronic component 21 is, for example, a high bandwidth memory (HBM), which can be connected to the first side 20a of the optoelectronic integrated photonic chip 20 through multiple conductive elements and electrically connected to the optoelectronic integrated photonic chip 20. A filling layer covering the multiple conductive elements can be formed between the electronic component 21 and the optoelectronic integrated photonic chip 20.
[0053] The electronic component 21 can be directly electrically connected to the optoelectronic integrated photonic chip 20 (which includes electronic integrated circuit components and photonic integrated circuit components) through the multiple conductive through-holes 201 to improve signal transmission speed.
[0054] like Figure 2B As shown, the optoelectronic integrated photonic chip 20 is attached to and electrically connected to a carrier structure 22 via a plurality of conductive bumps 202. The carrier structure has opposing first surfaces 22a and second surfaces 22b, such that the optoelectronic integrated photonic chip 20 is attached to the first surface 22a. The carrier structure 22 may be, for example, a substrate, an interposer, a circuit structure, or a packaging unit.
[0055] like Figure 2C As shown, a heat sink 23 is disposed on the first surface 22a of the support structure 22, and a plurality of conductive elements 24 are disposed on the second surface 22b of the support structure 22. The heat sink 23 may be arranged in a ring around the optoelectronic integrated photonic chip 20, and the plurality of conductive elements 24 may be, for example, solder balls.
[0056] like Figure 2DAs shown, an optical element 25 is disposed on the first side 20a of the optoelectronic integrated photonic chip 20 and connected to the recess 200. In this embodiment, the optical element 25 can also be placed on the heat sink 23 to stabilize the optical element 25 through the support of the heat sink 23, which can effectively increase the accuracy of the optical signal and effectively reduce alignment loss. For example, the optical signal provided by the subsequent laser and / or optical fiber can be effectively introduced into the optoelectronic integrated photonic chip 20 through the optical element 25. The optical element 25 is, for example, a lens structure.
[0057] It should be understood that in other embodiments, the electronic component 21 and the optical component 25 may be disposed on the first side 20a of the optoelectronic integrated photonic chip 20 first, and then the optoelectronic integrated photonic chip 20 may be attached to the support structure 22, and the support structure 22 may be provided with a heat sink 23 so that the optical component 25 may be placed on the heat sink 23 at the same time.
[0058] like Figure 2E As shown, the supporting structure 22 can then be connected to a circuit board 26 via the plurality of conductive elements 24.
[0059] Through the aforementioned manufacturing method, this application discloses a chip assembly structure 2a, which includes an optoelectronic integrated photonic chip 20, electronic components 21 disposed on the optoelectronic integrated photonic chip 20, and optical components 25 disposed on the optoelectronic integrated photonic chip 20.
[0060] The optoelectronic integrated photonic chip 20 includes electronic integrated circuit elements and photonic integrated circuit elements. It has a first side 20a and a second side 20b opposite to each other, and forms a plurality of conductive through holes 201 connecting the first side 20a and the second side 20b. A groove 200 is formed on the first side.
[0061] The electronic component 21 is, for example, a high bandwidth memory (HBM) and can be directly electrically connected to the optoelectronic integrated photonic chip 20 through the plurality of conductive vias 201.
[0062] The optical element 25 is, for example, a lens structure, which is disposed on the first side 20a of the optoelectronic integrated photonic chip 20 and connected to the groove 200.
[0063] This application also discloses an optical packaging module 2b, which includes a carrier structure 22 and a wafer assembly structure 2a disposed on the carrier structure 22.
[0064] The support structure 22 is, for example, a substrate, an interposer, a circuit structure or a packaging unit, and the support structure 22 is provided with a heat sink 23 so that the optical element 25 can be placed on the heat sink 23 at the same time.
[0065] The optical packaging module 2b also includes a circuit board 26 for mounting the carrier structure 22.
[0066] In summary, the optical packaging module and its chip assembly structure of this application mainly integrate electronic integrated circuit elements and photonic integrated circuit elements into a chip assembly (optoelectronic integrated photonic chip), which can directly perform signal conversion and transmission, thereby avoiding the signal delay and large amount of heat generation problems caused by the transmission of signals over long lines in existing structures. In addition, a groove is formed on the surface of the optoelectronic integrated photonic chip for optical elements to be connected to the groove, and the optical elements are supported by heat sinks to stabilize them, which can effectively increase the accuracy of the optical signal and effectively reduce alignment loss. Furthermore, conductive vias are formed in the optoelectronic integrated photonic chip, and electronic elements are electrically connected to the conductive vias. In addition to being electrically connected to the optoelectronic integrated photonic chip, they can also be electrically connected to the underlying support structure to increase the signal transmission speed.
[0067] In addition, the optical packaging module and its chip assembly structure technology are highly feasible to implement and can be manufactured using existing semiconductor packaging equipment. There is no need to develop special processes or purchase special equipment, which can reduce product production costs.
[0068] The above embodiments are used to illustrate the principles and effects of this application, and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.
Claims
1. A wafer stack structure, comprising: include: Optoelectronic integrated photonic chips include electronic integrated circuit elements and photonic integrated circuit elements; Electronic components are disposed on the optoelectronic integrated photonic chip; and Optical components are mounted on the optoelectronic integrated photonic chip.
2. The wafer stack structure of claim 1, wherein, The optoelectronic integrated photonic chip has multiple conductive vias connecting its surface.
3. The wafer assembly structure as described in claim 1, characterized in that, The optoelectronic integrated photonic chip forms a groove for connecting the optical element.
4. The wafer stack structure of claim 1, wherein, This electronic component is a high-bandwidth memory.
5. The wafer stack structure of claim 1, wherein, The optical element has a lens structure.
6. An optical package module, characterized by comprising: include: Load-bearing structure; as well as A wafer assembly structure, disposed on and electrically connected to the carrier structure, comprising: Optoelectronic integrated photonic chips include electronic integrated circuit elements and photonic integrated circuit elements; Electronic components are disposed on the optoelectronic integrated photonic chip; and Optical components are mounted on the optoelectronic integrated photonic chip.
7. The optical packaging module as described in claim 6, characterized in that... The optical packaging module also includes a heat sink disposed on the support structure for mounting the optical element.
8. The optical packaging module as described in claim 6, characterized in that... The optical packaging module also includes a circuit board for mounting the carrier structure.
9. The optical packaging module as described in claim 6, characterized in that, The supporting structure can be a substrate, an interposer, a circuit structure, or a packaging unit.
10. The optical packaging module as described in claim 6, characterized in that, The optoelectronic integrated photonic chip has multiple conductive vias connecting its surface.
11. The optical packaging module as described in claim 6, characterized in that, The optoelectronic integrated photonic chip forms a groove for connecting the optical element.
12. The optical packaging module as described in claim 6, characterized in that, This electronic component is a high-bandwidth memory.
13. The optical packaging module as described in claim 6, characterized in that, The optical element has a lens structure.