Optical packaging module and photonic wafer thereof

Abstract

An optical package module and a photonic wafer thereof wherein the optical package module comprises a bearing structure, a photonic wafer disposed on the bearing structure, and a filling layer filled between the bearing structure and the photonic wafer, and the photonic wafer comprises a wafer body and a plurality of stoppers formed on two opposite sides of the wafer body, and the overflow distance of the filling layer is shortened through the plurality of stop dogs.

Description

Technical Field

[0001] This application relates to a semiconductor packaging structure, and more particularly to an optical packaging module and its photonic chip. Background Technology

[0002] With the booming development of the electronics industry, electronic products are gradually moving towards multifunctionality and high performance. The application of fifth-generation (5G) communication technology has expanded to various fields such as the Internet of Things (IoT), Industrial Internet of Things (IIoT), cloud computing, artificial intelligence (AI), autonomous vehicles, and medical care. As applications expand, a massive amount of data needs to be efficiently transmitted, processed, and stored. The demand for data transmission, in particular, is surging, leading industries to replace electricity with light as the data transmission medium to improve transmission capacity, efficiency, and distance, while reducing energy consumption. Against this backdrop, co-packaged optical devices have become a future trend in semiconductor and packaging technologies.

[0003] Please see Figure 1A This is a cross-sectional schematic diagram of an existing co-packaged optical device 1. It mainly consists of an optical engine 11 mounted on a circuit board 10. The optical engine 11 includes an electronic chip 112 formed in a package structure 111 and a photonic chip 113 mounted on the package structure 111. One end of the photonic chip 113 is connected to an optical fiber 14, and a shelf 15 is provided below the junction of the photonic chip 113 and the optical fiber 14 to allow optical signals to be transmitted to the optical engine 11 for communication. At the same time, a switching chip 12 needs to be mounted on the circuit board 10 to be used in the terminal product. The switching chip 12 is first mounted on a substrate 13 and then mounted on the circuit board 10 through the substrate 13.

[0004] However, when the photonic chip 113 in the aforementioned co-packaged optical device is placed in the packaging structure 111, the gap between the two needs to be filled with adhesive 114 to protect the electrical contacts, such as Figure 1BAs shown in the partial bottom view, the adhesive 114 slightly overflows the edge of the package structure 111 and extends to the surface of the photonic chip 113. Because the bottom structure of the photonic chip 113 has grooves on both sides of the central region (formed by wafer fabrication and dicing), the adhesive 114 cannot continue to extend forward in the central region of the chip due to the limitation of the package structure edge. However, because the bottom structure of the photonic chip 113 has grooves on both sides, the adhesive 114 continues to extend forward along the grooves, causing contamination of the waveguide area in front of the photonic chip 113. This results in the inability to connect subsequent fiber optic components, leading to a decrease in product yield.

[0005] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Utility Model Content

[0006] In view of the various deficiencies of the prior art, this application provides an optical packaging module, including: a carrier structure; a photonic chip disposed on the carrier structure, wherein the photonic chip includes a chip body and a plurality of blocks formed on opposite sides of the chip body; and a filling layer filling the space between the carrier structure and the photonic chip.

[0007] This application also provides a photonic chip, comprising: a chip body; and a plurality of blocks formed on opposite sides of the chip body.

[0008] This application also provides a method for manufacturing a photonic wafer, comprising: providing a semiconductor substrate having a plurality of functional regions arranged in an array and a connection region located between the plurality of functional regions, and forming a wafer body in each of the functional regions; forming a plurality of blocks on opposite sides of the wafer body; and slicing along the periphery of each wafer body to obtain a plurality of photonic wafers.

[0009] In the aforementioned optical packaging module and its photonic chip and manufacturing method, the photonic chip is attached to the carrier structure via multiple conductive bumps. The filler layer covers the multiple conductive bumps. The carrier structure can be a substrate, an interposer, a circuit structure, or a packaging unit.

[0010] In the aforementioned optical packaging module and its photonic wafer and manufacturing method, trench regions are formed on opposite sides of the wafer body so that the plurality of blocks are located in the trench regions. A waveguide region is formed on the front side of the wafer body. The side of the photonic wafer having the waveguide region protrudes beyond the edge of the support structure.

[0011] In the aforementioned optical packaging module and its photonic wafer and manufacturing method, the plurality of blocks are formed on the connection area of ​​the semiconductor substrate by a patterning process and are opposite to both sides of the wafer body.

[0012] As can be seen from the above, the aforementioned optical packaging module and its photonic chip of this application mainly have multiple blocks formed on the opposite two sides (trench area) of the photonic chip. When the photonic chip is subsequently placed on the carrier structure and a filling layer is set between the photonic chip and the carrier structure, the multiple blocks lengthen the distance from the filling layer to the waveguide area (allowing the filling layer to detour), shorten the overflow distance of the filling layer, and prevent the filling layer from overflowing into the waveguide area of ​​the photonic chip and causing waveguide area contamination, thereby improving the product yield. Attached Figure Description

[0013] Figure 1A This is a cross-sectional schematic diagram of an existing co-packaged optical device.

[0014] Figure 1B This is a partial bottom view of an existing co-packaged optical device.

[0015] Figures 2A to 2C This is a schematic diagram illustrating the fabrication method of the photonic chip of this application.

[0016] Figure 3A and Figure 3B This is a planar and cross-sectional schematic diagram of the optical packaging module of this application.

[0017] Explanation of reference numerals in the attached figures

[0018] 1. Co-packaged optical devices

[0019] 10 Circuit Boards

[0020] 11. Photoelectric Engine

[0021] 111 Package Structure

[0022] 112 Electronic Chips

[0023] 113 Photonic Chip

[0024] 114 Base Rubber

[0025] 12 conversion chips

[0026] 13 substrate

[0027] 14 optical fibers

[0028] 15 brackets

[0029] 20 Chip Body

[0030] 20a photonic chip

[0031] 200 Semiconductor substrate

[0032] 200a Action Zone

[0033] 200b Connection Area

[0034] 201 Waveguide Region

[0035] 202 Trench Area

[0036] 21 stop blocks

[0037] 22 Conductive bumps

[0038] 3 Optical Packaging Module

[0039] 30 Load-bearing structure

[0040] 31 Fill layer

[0041] 32 Conductive elements

[0042] 33 Circuit board. Detailed Implementation

[0043] The following specific embodiments illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification.

[0044] It should be understood that the structures, proportions, sizes, etc., depicted in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the scope of this application. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of this application, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," "third," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this application. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this application's implementation.

[0045] Please see Figures 2A to 2C This is a schematic diagram of the fabrication method of the photonic chip of this application.

[0046] like Figure 2A As shown, a semiconductor substrate 200 (e.g., a wafer, a silicon substrate, or a glass substrate) is provided, which defines a plurality of functional regions 200a arranged in an array and a connection region 200b located between the plurality of functional regions, and a wafer body 20 is formed in each of the functional regions 200a.

[0047] Next, a plurality of blocks 21 are formed on opposite sides (left and right) of the wafer body 20. In this embodiment, the plurality of blocks 21 are, for example, polyimide (PI) or photoresist, and are formed on the connection region 200b of the semiconductor substrate 200 by a patterning process and opposite to the two sides of the wafer body 20.

[0048] like Figure 2B As shown, the wafer body 20 is then diced around its periphery (i.e., the connection area 200b) to obtain multiple photonic wafers 20a (e.g., ...). Figure 2C (See the schematic diagram shown).

[0049] The photonic chip 20a includes a chip body 20 and a plurality of blocks 21 formed on opposite sides of the chip body 20.

[0050] In addition, a waveguide region 201 is formed on the front side of the chip body 20, and a trench region 202 is formed on the opposite sides, with the plurality of blocks 21 located in the trench region 202.

[0051] Please see Figure 3A and Figure 3B This is a planar and cross-sectional schematic diagram of the optical packaging module of this application.

[0052] like Figure 3A As shown, the photonic chip 20a is subsequently placed on a carrier structure 30 with one surface via a plurality of conductive bumps 22 and electrically connected to the carrier structure 30. The side of the photonic chip 20a having a waveguide region 201 protrudes beyond the edge of the carrier structure 30. The carrier structure 30 may be, for example, a substrate, an interposer, a circuit structure, or a packaging unit.

[0053] Next, a filling layer 31 is formed between the photonic chip 20a and the carrier structure 30, and the filling layer 31 covers the plurality of conductive bumps 22 to obtain an optical packaging module 3.

[0054] The optical packaging module 3 includes a carrier structure 30, a photonic chip 20a disposed on the carrier structure 30, and a filler layer 31 filling the space between the carrier structure 30 and the photonic chip 20a.

[0055] The photonic chip 20a includes a chip body 20 and a plurality of baffles 21 formed on opposite sides of the chip body 20. The design of the plurality of baffles 21 can prevent the filling layer 31 from overflowing into the waveguide region 201 of the photonic chip 20a and causing contamination of the waveguide region 201.

[0056] like Figure 3B As shown, the supporting structure 30 can be further placed on a circuit board 33 via a plurality of conductive elements 32 and electrically connected to the circuit board 33.

[0057] In summary, the optical packaging module and its photonic chip of this application mainly have multiple baffles formed on the opposite two sides (trench region) of the photonic chip. When the photonic chip is subsequently placed on the carrier structure and a filler layer is set between the photonic chip and the carrier structure, the multiple baffles lengthen the distance from the filler layer to the waveguide region (allowing the filler layer to detour), shorten the overflow distance of the filler layer, and prevent the filler layer from overflowing into the waveguide region of the photonic chip and causing waveguide region contamination, thereby improving product yield.

[0058] In addition, the optical packaging module and its photonic chip technology are highly feasible to implement and can be manufactured using existing semiconductor packaging equipment. There is no need to develop special processes or purchase special equipment, which can reduce product production costs.

[0059] The above embodiments are used to illustrate the principles and effects of this application, and are not intended to limit this application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be as set forth in the claims.

Claims

1. An optical package module, characterized by comprising: include: Load-bearing structure; A photonic chip is disposed on the support structure and includes a chip body and a plurality of blocks formed on opposite sides of the chip body; as well as A filling layer is placed between the support structure and the photonic chip.

2. The optical package module of claim 1, wherein, The photonic chip is attached to the support structure via multiple conductive bumps.

3. The optical packaging module as described in claim 2, characterized in that, The filler layer covers the multiple conductive bumps.

4. The optical packaging module as described in claim 1, characterized in that, The supporting structure can be a substrate, an interposer, a circuit structure, or a packaging unit.

5. The optical packaging module as described in claim 1, characterized in that, The wafer body has trench areas formed on opposite sides so that the multiple blocks are located in the trench areas.

6. The optical package module of claim 1, wherein the optical package module is configured to be mounted on a printed circuit board (PCB). A waveguide region is formed on the front side of the chip body.

7. The optical packaging module as described in claim 6, characterized in that, The photonic wafer has one side of the waveguide region that protrudes beyond the edge of the support structure.

8. A photonic wafer, characterized by include: Chip body; as well as Multiple blocks are formed on opposite sides of the wafer body.

9. The photonic chip of claim 8, wherein, The wafer body has trench areas formed on opposite sides so that the multiple blocks are located in the trench areas.

10. The photonic chip of claim 8, wherein, A waveguide region is formed on the front side of the chip body.

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