Vehicle-mounted chip test circuit
By designing an on-board chip test circuit that includes high-voltage and low-voltage test units, the problem of low chip testing efficiency in existing technologies is solved, enabling simultaneous testing of multiple chips and improving testing efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HEXIN SEMICON TECH (SUZHOU) CO LTD
- Filing Date
- 2025-04-27
- Publication Date
- 2026-04-21
AI Technical Summary
In existing technologies, chip testing efficiency is low, and it is difficult to test multiple chips simultaneously.
An on-board chip test circuit was designed, which includes high-voltage and low-voltage test units. Combined with a circuit board and a tester, it can test four chips under test simultaneously. It utilizes a hybrid high-voltage, voltage output, digital and analog test module, and uses the INA819IDR voltage amplifier chip and AP7365-33YG-13LDO module.
It enables simultaneous testing of four chips under test, significantly improving testing efficiency.
Smart Images

Figure CN224152608U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to an automotive chip test circuit, and more particularly to an automotive chip test circuit packaged based on the STS8200 test platform. Background Technology
[0002] Integrated circuits (ICs) are small in size and powerful in function, making them an indispensable electronic component in information equipment. To ensure proper functioning, chips must undergo rigorous testing before leaving the factory. A common testing method involves inputting known test signals into the chip's circuitry and then obtaining the feedback signal to determine if the chip is functioning correctly. However, typical chip testing only allows for single-chip testing, resulting in relatively low efficiency.
[0003] In view of the above-mentioned shortcomings, the designer actively researched and innovated in order to create a new type of automotive chip test circuit with greater industrial application value. Utility Model Content
[0004] To solve the above-mentioned technical problems, the purpose of this utility model is to provide an on-board chip testing circuit.
[0005] To achieve the above objectives, the present invention adopts the following technical solution:
[0006] An on-board chip testing circuit includes a circuit board and a testing machine. A chip under test is connected to the circuit board. The output terminal of the chip under test is connected to the input terminal of a high-voltage testing unit, and the output terminal of the high-voltage testing unit is connected to the input terminal of the testing machine. The output terminal of the chip under test is connected to the input terminal of a low-voltage testing unit, and the output terminal of the low-voltage testing unit is connected to the input terminal of the testing machine.
[0007] Preferably, in the vehicle-mounted chip test circuit, the high-voltage test unit includes a hybrid high-voltage test module, a voltage output test module, a digital test module, and an analog test module. The output terminal of the hybrid high-voltage test module is connected to the high-voltage power supply test input terminal of the test machine, the output terminal of the voltage output test module is connected to the input terminal of the test machine, and the output terminals of the digital test module and the analog test module are connected to the analog-to-digital test input terminal of the test machine.
[0008] Preferably, in the vehicle-mounted chip test circuit, a voltage amplifier chip, model INA819IDR, is connected between the hybrid high-voltage test module and the tester.
[0009] Preferably, in the aforementioned automotive chip test circuit, the low-voltage test unit includes a low-voltage hybrid voltage module, a low-voltage control module, and an EN enable module. The output terminal of the low-voltage hybrid voltage module is connected to the low-voltage power supply test input terminal of the test machine, the input terminal of the low-voltage control module is connected to the control signal input terminal of the test machine, and the output terminal of the EN enable module is connected to the input terminal of the test machine.
[0010] Preferably, in the aforementioned vehicle-mounted chip testing circuit, an LDO module is connected between the low-voltage hybrid voltage module and the testing machine.
[0011] Preferably, in the vehicle-mounted chip testing circuit, the circuit board has interfaces for four chips under test, and these are independent individual components.
[0012] By means of the above solution, this utility model has at least the following advantages:
[0013] This invention enables simultaneous testing of four chips under test, effectively improving work efficiency.
[0014] The above description is only an overview of the technical solution of this utility model. In order to better understand the technical means of this utility model and to implement it in accordance with the contents of the specification, the preferred embodiments of this utility model are described in detail below with reference to the accompanying drawings. Attached Figure Description
[0015] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 This is a schematic diagram of the principle of this utility model;
[0017] Figure 2 This is the actual circuit diagram of the hybrid high-voltage test module of this utility model;
[0018] Figure 3 This is the actual circuit diagram of the voltage output test module of this utility model;
[0019] Figure 4 This is the actual circuit diagram of the digital test module and the analog test module of this utility model;
[0020] Figure 5 This is the actual circuit diagram of the low-voltage test unit of this utility model;
[0021] Figure 6This is the actual circuit diagram of the INA819IDR of this utility model. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0023] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0024] Example
[0025] like Figures 1 to 6 As shown, an on-board chip testing circuit includes a circuit board 1 and a testing machine 3. A chip under test 2 is connected to the circuit board 1. The output terminal of the chip under test 2 is connected to the input terminal of a high-voltage testing unit 4. The output terminal of the high-voltage testing unit 4 is connected to the input terminal of the testing machine 3. The output terminal of the chip under test 2 is connected to the input terminal of a low-voltage testing unit 5. The output terminal of the low-voltage testing unit 5 is connected to the input terminal of the testing machine 3.
[0026] The high-voltage testing unit 4 of this invention includes a hybrid high-voltage testing module 41, a voltage output testing module 42, a digital testing module 43, and an analog testing module 44. The output terminal of the hybrid high-voltage testing module 41 is connected to the high-voltage power supply test input terminal of the testing machine 3. The output terminal of the voltage output testing module 42 is connected to the input terminal of the testing machine 3. The output terminals of the digital testing module 43 and the analog testing module 44 are connected to the analog-to-digital test input terminal of the testing machine 3. A voltage amplifier chip, model INA819IDR, is connected between the hybrid high-voltage testing module 41 and the testing machine 3.
[0027] The low-voltage test unit 5 of this invention includes a low-voltage hybrid voltage module 51, a low-voltage control module 52, and an EN enable module 53. The output terminal of the low-voltage hybrid voltage module 51 is connected to the low-voltage power supply test input terminal of the test machine 3. The input terminal of the low-voltage control module 52 is connected to the control signal input terminal of the test machine 3. The output terminal of the EN enable module 53 is connected to the input terminal of the test machine 3. An LDO module 54 is connected between the low-voltage hybrid voltage module 51 and the test machine 3. The LDO module is model AP7365-33YG-13.
[0028] The circuit board 1 described in this invention has interfaces for four chips under test (DUTs), and these interfaces are independently configured. This allows for simultaneous testing of multiple DUTs (EWP9701), effectively improving work efficiency.
[0029] The working principle of this utility model is as follows:
[0030] In practice, the chip is placed in the slot of the circuit board and powered on. The tester tests the chip through different functional modules on the circuit board, and displays the final result after the test is completed.
[0031] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0032] In the description of this application, it should be noted that the terms "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product is in use. They are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0033] Furthermore, terms such as "horizontal" and "vertical" do not imply that components must be absolutely horizontal or vertical, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.
[0034] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0035] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.
Claims
1. A vehicle-mounted chip testing circuit, comprising a circuit board (1) and a testing machine (3), a chip (2) to be tested being connected to the circuit board (1), characterized in that: The output terminal of the chip under test (2) is connected to the input terminal of the high voltage test unit (4), the output terminal of the high voltage test unit (4) is connected to the input terminal of the test machine (3), the output terminal of the chip under test (2) is connected to the input terminal of the low voltage test unit (5), and the output terminal of the low voltage test unit (5) is connected to the input terminal of the test machine (3).
2. The on-board chip test circuit according to claim 1, characterized in that: The high-voltage test unit (4) includes a hybrid high-voltage test module (41), a voltage output test module (42), a digital test module (43), and an analog test module (44). The output terminal of the hybrid high-voltage test module (41) is connected to the high-voltage power supply test input terminal of the test machine (3). The output terminal of the voltage output test module (42) is connected to the input terminal of the test machine (3). The output terminals of the digital test module (43) and the analog test module (44) are connected to the analog-to-digital test input terminal of the test machine (3).
3. The on-board chip test circuit according to claim 2, characterized in that: A voltage amplifier chip, model INA819IDR, is connected between the hybrid high voltage test module (41) and the test machine (3).
4. The on-board chip testing circuit according to claim 1, characterized in that: The low-voltage test unit (5) includes a low-voltage hybrid voltage module (51), a low-voltage control module (52), and an EN enable module (53). The output terminal of the low-voltage hybrid voltage module (51) is connected to the low-voltage power supply test input terminal of the test machine (3). The input terminal of the low-voltage control module (52) is connected to the control signal input terminal of the test machine (3). The output terminal of the EN enable module (53) is connected to the input terminal of the test machine (3).
5. The on-board chip test circuit according to claim 4, characterized in that: An LDO module (54) is connected between the low-voltage hybrid voltage module (51) and the tester (3).
6. The on-board chip test circuit according to claim 1, characterized by: The circuit board (1) has four interfaces for the chips under test, and they are set up independently.