Input turn-off detection circuit and DC-DC power supply module aging test device
By using an input shutdown detection circuit to detect and isolate short-circuit faults in the DC-DC power module aging test system in real time, the problem of the entire module failing to age and being damaged due to short-circuited modules is solved, improving testing efficiency and fault location speed, and reducing production costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- MURATA MFG CO LTD
- Filing Date
- 2025-04-30
- Publication Date
- 2026-04-21
AI Technical Summary
In existing DC-DC power module aging test systems, short circuits in individual modules can prevent the entire layer of modules from aging properly. Furthermore, continuous power supply to short-circuited modules may cause thermal damage, making it difficult to quickly locate the cause of the fault and affecting production efficiency and product quality.
An input shutdown detection circuit is adopted, which consists of a first voltage divider unit, a second voltage divider unit, and a transistor to detect and isolate input short circuit faults in real time. The unit under test is connected one-to-one with the input shutdown detection circuit to ensure that the short-circuited module does not affect the aging of other modules.
It enables real-time detection and isolation of short-circuited modules, preventing fault propagation and module damage, improving aging test efficiency, reducing production costs, and quickly locating faulty modules.
Smart Images
Figure CN224152623U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of DC-DC power module aging test technology, and in particular to an input shutdown detection circuit and a DC-DC power module aging test device. Background Technology
[0002] In the production and R&D of DC-DC power modules, aging tests are required in both R&D laboratories and production plants to detect and identify potential defects in various DC power modules in advance. Existing aging test systems generally employ a layered aging approach, with each layer powered by a single DC input power supply for multiple modules. For example, a 240-channel aging test system might be divided into six layers, with 40 modules in each layer using a single DC input power supply as the common input for aging. However, such aging test systems suffer from the following problems: If a power module fails during aging, exhibiting an input short circuit, the input voltage of the entire layer's DC input power supply will be pulled low, preventing the entire layer from aging properly. Furthermore, when a module's input is continuously in a short-circuit state or in a low-impedance state, the large current can easily cause thermal damage, resulting in the power module burning out or turning black. This hinders failure analysis, makes it difficult to accurately identify the cause of the failure, and severely impacts production efficiency and product quality.
[0003] Figure 4 This is a circuit diagram illustrating a prior art DC-DC power module aging test system. (Example) Figure 4 As shown, in the existing DC-DC power module aging test system, the DC input source VIN_DC_SOURCE is directly supplied to each module power supply UUT1...UUTN as the input source VIN_UUT through a diode D1. In the existing DC-DC power module aging test system, if a UUT (Unit Under Test) module input is short-circuited during the aging process, it will lower the input voltage of the DC input source VIN_DC_SOURCE, thus causing the entire layer of UUT modules to fail to age.
[0004] In other words, in the existing DC-DC power module aging test system, there are problems such as individual modules short-circuiting, which can cause the entire layer of modules to fail to age properly, the short-circuited modules being further damaged due to continuous power supply, and faulty modules being difficult to locate quickly. Utility Model Content
[0005] This invention addresses the aforementioned problems in the prior art, aiming to provide an input shutdown detection circuit and a DC-DC power module aging test device incorporating this circuit. This prevents fault propagation and module damage caused by continuous power supply to a short-circuited module. Furthermore, in some preferred embodiments, this invention avoids the problem of an entire module layer failing to age properly due to short circuits in individual modules, enabling rapid identification of faulty modules.
[0006] To address the aforementioned problems, one aspect of this utility model relates to an input shutdown detection circuit, which includes an input terminal and an output terminal. The input shutdown detection circuit further comprises: a first voltage divider unit connected between the input terminal and ground, including a first resistor (R1) and a second resistor (R2) connected in series from the input terminal; a third resistor (R3), one end of which is connected to the input terminal, and the other end of which is connected to ground via a Zener diode (D2); and a first transistor (Q1), connected between the node of the third resistor (R3) and the Zener diode (D2) and the output terminal, and the first transistor (Q1) is controlled... The first resistor (R1) and the second resistor (R2) are connected at the node; the second voltage divider unit, one end of which is connected to the input terminal and the other end of which is connected to ground via the second transistor (Q2), includes a fourth resistor (R4) and a fifth resistor (R5) connected in series from the input terminal; and a third transistor (Q3) connected between the input terminal and the output terminal, with the control electrode of the third transistor (Q3) connected to the node of the fourth resistor (R4) and the fifth resistor (R5), and the control electrode of the second transistor (Q2) connected to the node of the third resistor (R3) and the Zener diode (D2).
[0007] Furthermore, according to the input shutdown detection circuit of this utility model, the input shutdown detection circuit preferably also includes a diode (D3), which is connected between the first transistor (Q1) and the output terminal.
[0008] Furthermore, according to the input shutdown detection circuit of this utility model, the diode (D3) is preferably a light-emitting diode.
[0009] Furthermore, according to the input shutdown detection circuit of this utility model, it is preferred that the voltage across the first resistor (R1) is 1 / 6 to 5 / 6 of the input source voltage, and the voltage across the fourth resistor (R4) is 1 / 6 to 5 / 6 of the input source voltage.
[0010] Furthermore, according to the input shutdown detection circuit of this utility model, it is preferred that the voltage division ratio of the first resistor (R1) and the second resistor (R2) is 1:1, and the voltage division ratio of the fourth resistor (R4) and the fifth resistor (R5) is 1:1.
[0011] Furthermore, according to the input shutdown detection circuit of this utility model, the resistance value of the third resistor (R3) is preferably 20kΩ to 100kΩ.
[0012] Furthermore, according to the input shutdown detection circuit of this utility model, the first transistor (Q1) is preferably a transistor, the second transistor (Q2) is an N-channel field-effect transistor, and the third transistor (Q3) is a P-channel field-effect transistor.
[0013] Furthermore, according to the input shutdown detection circuit of this utility model, the threshold voltage of the first transistor (Q1) is preferably 0.7V to 5V, the GS threshold voltage of the second transistor (Q2) is 5V to 30V, and the GS threshold voltage of the third transistor (Q3) is -30V to -5V.
[0014] The DC-DC power module aging test device according to one aspect of this utility model is characterized by comprising: an input shutdown detection circuit of this utility model; an input source connected to the input terminal of the input shutdown detection circuit via a diode (D1); and a unit under test connected to the output terminal of the input shutdown detection circuit.
[0015] Furthermore, according to the DC-DC power module aging test device of this utility model, it is preferable that each given unit under test is connected to one of the input shutdown detection circuits.
[0016] Effects of the utility model
[0017] According to this invention, the tested unit (DUT) experiencing an input short-circuit fault can be detected and isolated in real time, preventing the fault from spreading and damaging the module due to continuous power supply to the short-circuited module. Furthermore, in some preferred embodiments, this invention can prevent the entire layer of modules from failing to age properly due to short circuits in individual modules, enabling rapid location of faulty modules. This improves the efficiency of aging tests and reduces production costs. Attached Figure Description
[0018] The above-mentioned objects, advantages, and features of this invention will become more apparent from the following detailed description of the preferred embodiments, with reference to the accompanying drawings, in which:
[0019] Figure 1 This is a schematic diagram showing the circuit structure of the input shutdown detection circuit of this utility model.
[0020] Figure 2 This is a schematic diagram illustrating the circuit structure of a DC-DC power module aging test device according to an embodiment of the present invention.
[0021] Figure 3This is a schematic diagram illustrating the circuit structure of a DC-DC power module aging test device according to another embodiment of the present invention.
[0022] Figure 4 This is a circuit diagram illustrating a prior art DC-DC power module aging test system.
[0023] Explanation of reference numerals in the attached figures
[0024] R1: First resistor
[0025] R2: Second resistor
[0026] R3: Third resistor
[0027] D2: Zener diode
[0028] Q1: First transistor
[0029] Q2: Second transistor
[0030] Q3: Third transistor
[0031] R4: Fourth resistor
[0032] R5: Fifth resistor
[0033] D3: Diode. Detailed Implementation
[0034] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments and examples described herein are merely illustrative of the relevant utility model and not intended to limit the utility model. Furthermore, it should be noted that, for ease of description, only the parts relevant to the utility model are shown in the drawings. Additionally, there are instances where the same symbols are used for the same elements and repeated descriptions are omitted. Moreover, there are instances where repeated descriptions are omitted for elements with the same or corresponding functions or structures.
[0035] Figure 1 This is a schematic diagram illustrating the circuit structure of the input shutdown detection circuit of this utility model. For example... Figure 1 As shown, the input shutdown detection circuit 100 has an input terminal and an output terminal. The input terminal of the input shutdown detection circuit 100 is connected to the input source VIN_DC_SOURCE via diode D1, and the output terminal of the input shutdown detection circuit 100 is connected to the unit under test UUT1.
[0036] like Figure 1As shown, the input shutdown detection circuit 100 of this embodiment includes a first resistor R1 and a second resistor R2 connected in series between the input terminal and ground. The first resistor R1 and the second resistor R2 connected in series constitute the first voltage divider unit of this invention. Furthermore, the input shutdown detection circuit 100 of this embodiment includes a third resistor R3, one end of which is connected to the input terminal, and the other end of which is connected to ground via a Zener diode D2. Furthermore, the input shutdown detection circuit 100 of this embodiment includes a first transistor Q1, which is connected between the node of the third resistor R3 and the Zener diode D2 and the output terminal, and the control electrode of the first transistor (Q1) is connected to the node of the first resistor R1 and the second resistor R2. Furthermore, the input shutdown detection circuit 100 of this embodiment includes a second voltage divider unit comprising a fourth resistor R4 and a fifth resistor R5 connected in series from the input terminal, one end of which is connected to the input terminal, and the other end of which is connected to ground via a second transistor Q2. In this embodiment, one end of the second voltage divider unit is the end of the fourth resistor R4 that is not connected to the fifth resistor R5, and the other end of the second voltage divider unit is the end of the fifth resistor R5 that is not connected to the fourth resistor R4. The control electrode of the second transistor Q2 is connected to the node of the third resistor R3 and the Zener diode D2. Furthermore, the input shutdown detection circuit 100 of this embodiment includes a third transistor Q3 connected between the input terminal and the output terminal. The control electrode of the third transistor Q3 is connected to the node of the fourth resistor R4 and the fifth resistor R5.
[0037] In addition, such as Figure 1 As shown, in some preferred embodiments, the input shutdown detection circuit 100 of this embodiment further includes a diode D3 connected between the first transistor Q1 and the output terminal.
[0038] Next, taking the aging test of the unit under test UUT1 as an example, we will explain the working principle of the input shutdown detection circuit 100 in this embodiment.
[0039] In the input shutdown detection circuit 100 of this embodiment, under normal operating conditions, the input source VIN_DC_SOURCE, after passing through diode D1, third resistor R3, and Zener diode D2, generates a forward voltage between the gate G and source S of the second transistor Q2. When this voltage reaches the gate-source threshold voltage (GS) of the second transistor Q2, the second transistor Q2 turns on, thereby generating a GS threshold voltage between the gate G and source S of the third transistor Q3, causing the third transistor Q3 to turn on. At this time, the input source VIN_DC_SOURCE can supply power to the unit under test (UUT1) through the turned-on third transistor Q3, allowing it to enter the normal aging test state.
[0040] If a short circuit occurs at the input of the unit under test (UUT1) during the aging process, the voltage at the emitter (E) of the first transistor Q1 is pulled low, creating a conduction voltage between the base (B) and emitter (E) of Q1, turning it on. After Q1 turns on, it pulls down the gate (G) voltage of the second transistor Q2. Since the conduction of Q2 depends on a suitable voltage difference between its gate (G) and source (S), the low gate voltage prevents the voltage between G and S from maintaining the required threshold for conduction, causing Q2 to turn off. Furthermore, the turn-off of Q2 prevents the gate-source (GS) threshold voltage of the third transistor Q3 from maintaining above the conduction threshold, thus also turning off Q3. This successfully disconnects the input source VIN_DC_SOURCE from the short-circuited UUT1, preventing further damage to the module caused by UUT1 remaining in a short-circuit state during aging.
[0041] In this embodiment, by adding the input shutdown detection circuit 100 of this invention between the input source VIN_DC_SOURCE and the unit under test UUT1, the unit under test UUT1 that has an input short circuit fault can be detected and isolated in real time, which can avoid the problem of fault propagation and module damage caused by the continuous power supply of the short-circuited module.
[0042] Figure 2 This is a schematic diagram illustrating the circuit structure of a DC-DC power module aging test device according to an embodiment of the present invention.
[0043] In this embodiment, multiple units under test can be connected to a single input shutdown detection circuit. Figure 2 The diagram illustrates an embodiment where four units under test (UUT1, UUT2, UUT3, and UUT4) are connected to an input shutdown detection circuit. Of course, there is no particular limitation on the number of units under test connected to an input shutdown detection circuit. Accordingly, when an input short circuit occurs in a unit under test, the power supply can be cut off promptly, preventing the unit under test from burning out or becoming blackened due to prolonged short circuits. This protects the module from further damage and facilitates accurate failure analysis of the faulty module.
[0044] Figure 3 This is a schematic diagram illustrating the circuit structure of a DC-DC power module aging test device according to another embodiment of the present invention.
[0045] like Figure 3As shown, taking a 240-channel aging system as an example, an input shutdown detection circuit can be connected to the input terminals of every four units under test (DUTs). The input terminals of these four DUTs are then connected in parallel to the output terminal of the same input shutdown detection circuit. This ensures that even if an individual DUT experiences an input short circuit during the aging process, only the four modules associated with that location will stop aging, allowing the other normal modules to continue aging. This improves production aging efficiency and enables efficient short-circuit detection and precise module protection.
[0046] Here, the connection of every four units under test (DUTs) to one input shutdown detection circuit is merely an example. There is no particular limitation on the number of DUTs connected to a single input shutdown detection circuit, as long as each given DUT is connected to one input shutdown detection circuit. For example, in a 240-channel aging system, the connection could also be every two DUTs, three DUTs, six DUTs, eight DUTs, and so on.
[0047] In this invention, by connecting an input shutdown detection circuit to each given unit under test, a short circuit in the input of one individual unit under test will not affect the normal aging of other modules in the entire layer, greatly improving the overall efficiency of aging testing and reducing the overall test interruption time caused by local faults. Furthermore, by connecting an input shutdown detection circuit to each given unit under test, the shutdown range is narrowed, facilitating rapid location of faulty modules and shortening troubleshooting time. This effectively detects and handles short-circuit faults while ensuring the normal aging of most modules. Compared with existing technologies, this significantly improves the efficiency of aging testing in the production process and reduces production costs.
[0048] Furthermore, in this utility model, in Figures 1 to 3 The diagram shows an input shutdown detection circuit 100 equipped with diode D3. By connecting diode D3 between the first transistor Q1 and the output terminal, reverse current can be prevented, and damage to the first transistor Q1 due to excessively high reverse voltage applied between the base B and emitter E of the first transistor Q1 can be prevented. Therefore, in this invention, diode D3 can also be referred to as a "reverse protection diode".
[0049] Furthermore, in this invention, diode D3 can also be a light-emitting diode (LED). Accordingly, by having diode D3 emit light when an input short circuit occurs in an individual tested unit, a module input short circuit can be indicated.
[0050] Furthermore, in this invention, the diode D3 connected between the first transistor Q1 and the output terminal is not necessarily required. If the voltage from the input source VIN_DC_SOURCE, through the voltage divider of the first resistor R1, applies a relatively small reverse conduction voltage to the first transistor Q1, thus not damaging the first transistor Q1, then the diode D3 may be omitted.
[0051] Furthermore, in this invention, by connecting diode D1 between the input source VIN_DC_SOURCE and the input terminal of the input shutdown detection circuit 100, current backflow can be prevented, avoiding damage to the input source VIN_DC_SOURCE or other circuit components due to abnormal current backflow, thus ensuring the stability and safety of the entire circuit.
[0052] Furthermore, in this invention, the voltage in the circuit can be further stabilized by setting a Zener diode D2, and the Zener diode D2 also has unidirectional conduction characteristics, thus avoiding the impact of voltage fluctuations or reverse current on the second transistor Q2.
[0053] Furthermore, in this invention, the voltage provided by the input source VIN_DC_SOURCE can be from 12V to 60V, such as 24V, 48V, etc. To ensure that the first transistor Q1, the second transistor Q2, and the third transistor Q3 can operate under appropriate voltage and current conditions, the resistance value of the first resistor R1 can be from 20kΩ to 100kΩ, the resistance value of the second resistor R2 can be from 20kΩ to 100kΩ, the resistance value of the third resistor R3 can be from 20kΩ to 100kΩ, the resistance value of the fourth resistor R4 can be from 20kΩ to 100kΩ, the resistance value of the fifth resistor R5 can be from 30kΩ to 100kΩ, and so on.
[0054] Furthermore, in this invention, when the input source voltage VIN_DC_SOURCE is set to Vin_DC, the voltage range of the first resistor R1 and the second resistor R2 can be from 1 / 6*Vin_DC to 5 / 6*Vin_DC, the voltage range of the fourth resistor R4 can be from 1 / 6*Vin_DC to 5 / 6*Vin_DC, and the voltage range of the fifth resistor R5 can be from 3 / 13*Vin_DC to 5 / 6*Vin_DC. That is, the voltage across the first resistor R1 can be from 1 / 6 to 5 / 6 of the input source voltage, and the voltage across the fourth resistor (R4) can be from 1 / 6 to 5 / 6 of the input source voltage. Accordingly, it can handle input voltages from 12V to 60V and provide suitable turn-on voltages for the first transistor Q1 and the third transistor Q1.
[0055] Furthermore, in this invention, the voltage division ratio of the first resistor R1 and the second resistor R2 is preferably 1:1, thereby facilitating the setting of the turn-on voltage for the first transistor Q1. Additionally, the voltage division ratio of the fourth resistor R4 and the fifth resistor R5 is preferably 1:1, thereby facilitating the setting of the turn-on voltage for the third transistor Q3.
[0056] Furthermore, in this invention, by setting the resistance value of the third resistor R3 to 20kΩ to 100kΩ, the current flowing into the second transistor Q2 can be adjusted, and the turn-on voltage of the second transistor Q2 can be easily set.
[0057] Furthermore, in this invention, there is no particular limitation on the types of the first transistor Q1, the second transistor Q2, and the third transistor Q3. For example, junction field-effect transistors (FETs) such as junction FETs (JFETs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) can be used, as well as other types of FETs.
[0058] In some preferred embodiments, the first transistor Q1 is preferably a bipolar transistor, the second transistor Q2 is preferably an N-channel MOSFET, and the third transistor Q3 is preferably a P-channel MOSFET. This effectively reduces power loss in the circuit, improves circuit efficiency, meets the power supply requirements for the unit under test, and enables a rapid response when a module input short circuit occurs.
[0059] Furthermore, in some preferred embodiments, the threshold voltage of the first transistor Q1 is preferably 0.7V to 5V, the gate-source threshold voltage of the second transistor Q2 is preferably 5V to 30V, and the gate-source threshold voltage of the third transistor Q3 is preferably -30V to -5V. Accordingly, it is possible to handle input voltages from 12V to 60V.
[0060] In addition, in this invention, besides using diodes for reverse current protection, MOSFETs or load switches can also be used to achieve the function of preventing reverse current.
[0061] While the present invention has been described above with reference to preferred embodiments, those skilled in the art will understand that various modifications, substitutions, and alterations can be made to the present invention without departing from its spirit and scope. Therefore, the present invention should not be limited by the above embodiments, but rather by the appended claims and their equivalents.
Claims
1. An input shutdown detection circuit, comprising an input terminal and an output terminal, characterized in that, The input shutdown detection circuit also includes: The first voltage divider unit is connected between the input terminal and ground, and includes a first resistor (R1) and a second resistor (R2) connected in series from the input terminal. The third resistor (R3) is connected at one end to the input terminal and at the other end to ground via a Zener diode (D2); The first transistor (Q1) is connected between the node of the third resistor (R3) and the Zener diode (D2) and the output terminal, and the control electrode of the first transistor (Q1) is connected to the node of the first resistor (R1) and the second resistor (R2). The second voltage divider unit, with one end connected to the input terminal and the other end connected to ground via the second transistor (Q2), includes a fourth resistor (R4) and a fifth resistor (R5) connected in series from the input terminal; and The third transistor (Q3) is connected between the input terminal and the output terminal, and the control electrode of the third transistor (Q3) is connected to the node of the fourth resistor (R4) and the fifth resistor (R5). The control electrode of the second transistor (Q2) is connected to the node of the third resistor (R3) and the Zener diode (D2).
2. The input shutdown detection circuit according to claim 1, characterized in that, The input shutdown detection circuit also includes a diode (D3), which is connected between the first transistor (Q1) and the output terminal.
3. The input shutdown detection circuit according to claim 2, characterized in that, The diode (D3) is a light-emitting diode.
4. The input shutdown detection circuit according to any one of claims 1 to 3, characterized in that, The voltage across the first resistor (R1) is 1 / 6 to 5 / 6 of the input source voltage. The voltage across the fourth resistor (R4) is 1 / 6 to 5 / 6 of the input source voltage.
5. The input shutdown detection circuit according to any one of claims 1 to 3, characterized in that, The voltage division ratio between the first resistor (R1) and the second resistor (R2) is 1:
1. The voltage division ratio of the fourth resistor (R4) and the fifth resistor (R5) is 1:
1.
6. The input shutdown detection circuit according to any one of claims 1 to 3, characterized in that, The resistance value of the third resistor (R3) is from 20kΩ to 100kΩ.
7. The input shutdown detection circuit according to any one of claims 1 to 3, characterized in that, The first transistor (Q1) is a bipolar transistor. The second transistor (Q2) is an N-channel field-effect transistor. The third transistor (Q3) is a P-channel field-effect transistor.
8. The input shutdown detection circuit according to claim 7, characterized in that, The threshold voltage of the first transistor (Q1) is 0.7V to 5V. The gate-source threshold voltage of the second transistor (Q2) is 5V to 30V. The GS threshold voltage of the third transistor (Q3) is -30V to -5V.
9. A DC-DC power module burn-in test apparatus, characterized by, have: The input shutdown detection circuit according to any one of claims 1 to 8; The input source is connected to the input terminal of the input shutdown detection circuit via a diode (D1); and The unit under test is connected to the output terminal of the input shutdown detection circuit.
10. The DC-DC power module aging test apparatus according to claim 9, characterized in that, Each of the given test units is connected to one of the input shutdown detection circuits.