Current source circuit, chip and electronic equipment
By setting resistive elements in the current path of the current mirror unit, the problem of traditional self-biased current sources being susceptible to noise interference is solved, thereby improving the accuracy and stability of the current output.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- ZHUHAI ISMARTWARE TECH CO LTD
- Filing Date
- 2025-06-20
- Publication Date
- 2026-04-21
AI Technical Summary
Traditional self-biased current sources are susceptible to input voltage noise, which leads to a decrease in output current accuracy.
A resistive element is placed in the current path of the current mirror unit to increase the impedance of the current path, thereby attenuating the amplitude of the noise current and reducing its modulation effect on the output current.
It improves the accuracy of current output and ensures the stability and precision of the current source circuit in high-frequency noise environments.
Smart Images
Figure CN224152909U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of analog circuit design technology, and in particular relates to a current source circuit, chip and electronic device. Background Technology
[0002] In analog integrated circuit design, self-biased current sources serve as core modules providing reference current. Under ideal operating conditions, they can achieve a constant current output independent of the power supply voltage, providing accurate raw current for single or multiple subsequent circuit modules. Their performance directly affects the accuracy and stability of the subsequent circuits. However, traditional self-biased current sources are susceptible to noise interference from the input voltage, leading to a decrease in output current accuracy. Utility Model Content
[0003] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a current source circuit, chip, and electronic device, in which resistive elements can attenuate the amplitude of noise current in the current path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0004] In a first aspect, this application provides a current source circuit, characterized in that it includes:
[0005] The current mirror unit includes:
[0006] The first and second switching transistors are connected in series between the input voltage node and the ground node;
[0007] A third and a fourth switch are connected in series between the input voltage node and the ground node. The driving terminal of the third switch is electrically connected to the driving terminal of the first switch, and the driving terminal of the second switch is electrically connected to the driving terminal of the fourth switch.
[0008] A first resistive element is disposed in a first current path between the first switching transistor and the second switching transistor; and / or,
[0009] The second resistive element is disposed in the second current path between the third and fourth switching transistors.
[0010] According to the current source circuit of this application, a resistive element is set on the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation on the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current on the current path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0011] According to one embodiment of this application, the resistance values of the first resistive element and the second resistive element are equal.
[0012] According to one embodiment of this application, the resistance values of the first resistive element and the second resistive element satisfy the following formula:
[0013]
[0014] Where R1 is the resistance of the first resistive element, R2 is the resistance of the second resistive element, Vin is the input voltage, V1 is the voltage drop of the first switching transistor, V2 is the voltage drop of the second switching transistor, and Ib is the desired output current.
[0015] According to one embodiment of this application, the current source circuit further includes:
[0016] The fifth switch is located in the current path between the first and second switches, and the operating voltage of the fifth switch is greater than that of the first switch.
[0017] The sixth switch is located in the current path between the third and fourth switches, and the operating voltage of the sixth switch is greater than that of the fourth switch.
[0018] According to one embodiment of this application, the current source circuit further includes:
[0019] The seventh switch is located in the current path between the fifth and second switches. The operating voltage of the fifth switch is greater than that of the second switch.
[0020] The eighth switch is located in the current path between the third and sixth switches, and its operating voltage is greater than that of the third switch.
[0021] According to one embodiment of this application, the first and third switching transistors are P-type MOS transistors, and the second and fourth switching transistors are N-type MOS transistors.
[0022] According to one embodiment of this application, the width-to-length ratio of the first switching transistor and the second switching transistor is the same.
[0023] According to one embodiment of this application, both the first resistive element and the second resistive element are resistors.
[0024] Secondly, this application provides a chip that includes the aforementioned current source circuit.
[0025] According to the chip of this application, a resistive element is set in the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation in the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current in the current path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0026] Thirdly, this application provides an electronic device that includes the aforementioned current source circuit.
[0027] According to the electronic device of this application, a resistive element is provided in the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation in the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current in the current path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0028] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description
[0029] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0030] Figure 1 It is a topology diagram of a current source circuit in related technologies;
[0031] Figure 2 It is a noise waveform diagram of the current source circuit in the relevant technology during operation;
[0032] Figure 3 This is one of the topologies of the current source circuit provided in the embodiments of this application;
[0033] Figure 4 This is the second topology diagram of the current source circuit provided in the embodiments of this application;
[0034] Figure 5 This is the third topology diagram of the current source circuit provided in the embodiments of this application.
[0035] Figure label:
[0036] Input voltage node Vin, ground node GND, first to eighth switching transistors Q1~Q8, first to second resistive components Ra1~Ra2, first to second P-type MOSFETs MP1~MP2, first to second N-type MOSFETs MN1~MN2, parasitic capacitance Cg, and resistance R. Detailed Implementation
[0037] The embodiments of this application are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.
[0038] In the following description, a "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "coupled to" or "connected to" another element, or when an element / circuit is said to be "coupled at" or "connected at" two nodes, it can be directly coupled to or connected to the other element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there are no intermediate elements between them.
[0039] In the description, the terms "first," "second," etc., are used to distinguish similar objects, not to describe a specific order or sequence. It should be understood that such numerical descriptors can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class, not limited in number; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0040] Furthermore, the use of terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicates that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0041] Figure 1 The topology of a current source circuit in the related art is shown. (Refer to...) Figure 1 A traditional current source circuit includes a first P-type MOSFET MP1 and a first N-type MOSFET MN1 connected in series between the input voltage node Vin and the ground node GND, and a second P-type MOSFET MP2 and a second N-type MOSFET MN2 connected in series between the input voltage node Vin and the ground node GND. The gate of the second P-type MOSFET MP2 is electrically connected to the gate of the first P-type MOSFET MP1 and the drain of the second P-type MOSFET MP2, respectively. The gate of the first N-type MOSFET MN1 is electrically connected to the gate of the second N-type MOSFET MN2 and the drain of the first N-type MOSFET MN1, respectively. To determine a unique output current value, a resistor is also connected to the drain of the second N-type MOSFET MN2. The specific working principle of this circuit is based on mature technologies and will not be elaborated here.
[0042] Figure 2 A noise waveform diagram from a related art is shown. (Refer to...) Figure 2 The gates of the first N-type MOSFET MN1 and the second N-type MOSFET MN2 have parasitic capacitances Cg to ground. The input voltage noise is a periodic ringing ripple noise (as shown in curve 1), which couples to the parasitic capacitance Cg through the current path between the first P-type MOSFET MP1 and the first N-type MOSFET MN1, and the current path between the second P-type MOSFET MP2 and the second N-type MOSFET MN2, continuously raising the voltage of the parasitic capacitance Cg (the voltage change of the parasitic capacitance Cg is shown in curve 2). When the charging and discharging of the parasitic capacitance Cg reaches equilibrium, the voltage value of the parasitic capacitance Cg will be higher than expected. This will cause the current output value of the current source circuit to be higher than the expected current value, which will lead to a decrease in the accuracy of the output current.
[0043] Figure 3 A topology diagram of a current source circuit provided in an embodiment of this application is shown. (Refer to...) Figure 3 One embodiment of this application provides a current source circuit, characterized by including a current mirror unit, a first resistive element, and / or a second resistive element. The current mirror unit includes: a first switch Q1 and a second switch Q2 connected in series between the input voltage node Vin and the ground node GND; a third switch Q3 and a fourth switch Q4 connected in series between the input voltage node Vin and the ground node GND, wherein the driving terminal of the third switch Q3 is electrically connected to the driving terminal of the first switch Q1, and the driving terminal of the second switch Q2 is electrically connected to the driving terminal of the fourth switch Q4; a first resistive element Ra1 is disposed in a first current path between the first switch Q1 and the second switch Q2; and a second resistive element Ra2 is disposed in a second current path between the third switch Q3 and the fourth switch Q4.
[0044] The current mirror unit adopts a two-stage series switching transistor architecture. The first terminal of the first switching transistor Q1 is electrically connected to the input voltage node Vin, the second terminal of the first switching transistor Q1 is connected to the first terminal of the second switching transistor Q2, and the second terminal of the second switching transistor Q2 is connected to the ground node GND, forming a current path. The first terminal of the third switching transistor Q3 is electrically connected to the input voltage node Vin, the second terminal of the third switching transistor Q3 is connected to the first terminal of the fourth switching transistor Q4, and the second terminal of the fourth switching transistor Q4 is connected to the ground node GND, forming another parallel current path.
[0045] In some embodiments, the first terminal of the second switch Q2 is connected to the driving terminal of the second switch Q2 to form a diode connection, and the second terminal of the third switch Q3 is connected to the driving terminal of the third switch Q3 to form a diode connection. The current at the second terminal of the third switch Q3 is fed back to the driving terminal of the first switch Q1 through its own driving terminal, forming a current mirror loop on one side; the current at the first terminal of the second switch Q2 is fed back to the driving terminal of the fourth switch Q4 through its own driving terminal, forming a current mirror loop on the other side. The two loops are coupled through a common source and common gate structure to form a complete self-biased system.
[0046] The specific principles by which the current mirror unit generates and replicates current are based on relatively mature technologies, and will not be elaborated here.
[0047] It should be noted that the specific type of each switching transistor can be selected according to the actual application scenario, and there is no limitation here. For example, each switching transistor can be a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated-Gate Bipolar Transistor), etc.
[0048] It is understandable that when the switching transistor is a MOSFET, the aforementioned driving terminal of the switching transistor refers to the gate of the switching transistor; when the switching transistor is an IGBT, the aforementioned driving terminal of the switching transistor refers to the base of the switching transistor. The following explanation uses a MOSFET (hereinafter referred to as a MOS transistor) as an example.
[0049] Resistive components are electronic components in a circuit that primarily exhibit resistive characteristics. Their core function is to dissipate electrical energy by impeding the flow of current. The specific type of resistive component can be selected based on the actual application scenario and is not limited here. For example, a resistive component can be a resistor or a digital potentiometer.
[0050] In some embodiments, a first resistive element Ra1 is separately provided on the first current path between the first switch Q1 and the second switch Q2.
[0051] When noise occurs in the input voltage, transient current fluctuations will appear in the first and second current paths. The parasitic capacitance of the switching transistor to ground will generate voltage spikes through charging and discharging. This voltage will couple to the drive terminal of the switching transistor, interfering with the matching accuracy of the current mirror. By setting a first resistive element Ra1 in the first current path, the first resistive element Ra1 limits the charging and discharging current of the parasitic capacitance through its impedance characteristics, significantly extending the RC time constant, thus attenuating the voltage fluctuation amplitude on the parasitic capacitance, ensuring the stability of the current mirror gate control voltage, and thereby improving the accuracy of the output current of the current source circuit.
[0052] In other embodiments, a second resistive element Ra2 is separately provided on the second current path between the third switch Q3 and the fourth switch Q4.
[0053] A second resistive element Ra2 is set in the second current path. The second resistive element Ra2 limits the charging and discharging current of the parasitic capacitor through its impedance characteristics, significantly prolongs the RC time constant, reduces the voltage fluctuation amplitude on the parasitic capacitor, ensures the stability of the current mirror gate control voltage, and thus improves the accuracy of the output current of the current source circuit.
[0054] In other embodiments, the first end of the first resistive element Ra1 is electrically connected to the second end of the first switch Q1, the second end of the first resistive element Ra1 is electrically connected to the first end of the second switch Q2; the first end of the second resistive element Ra2 is electrically connected to the second end of the third switch Q3, and the second end of the second resistive element Ra2 is electrically connected to the first end of the fourth switch Q4.
[0055] The first resistive element Ra1 and the second resistive element Ra2 act on the first current path and the second current path respectively, forming a two-stage current attenuation network. This attenuates the current in the first current path and the second current path, reduces the modulation effect of high-frequency noise on the output current, slows down the amplitude of current fluctuations, improves the noise suppression capability of the current source circuit, and thus improves the current output accuracy.
[0056] According to the current source circuit of this application, a resistive element is set on the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation on the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current on the branch, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0057] In some embodiments, the resistance values of the first resistive element Ra1 and the second resistive element Ra2 are equal.
[0058] The noise generated by the input voltage produces in-phase current fluctuations in both branches. The first resistive element Ra1 and the second resistive element Ra2 adopt an equal-value matching design, which can eliminate the current ratio error caused by impedance mismatch and ensure that transient current fluctuations are suppressed at the same amplitude in both paths, thereby maximizing the current suppression capability and further improving the current output accuracy.
[0059] In some embodiments, the resistance values of the first resistive element Ra1 and the second resistive element Ra2 satisfy the following formula:
[0060]
[0061] Where R1 is the resistance of the first resistive element Ra1, R2 is the resistance of the second resistive element Ra2, Vin is the input voltage, V1 is the voltage drop of the first switching transistor Q1, V2 is the voltage drop of the second switching transistor Q2, and Ib is the desired output current.
[0062] It is understandable that the larger the resistance values of the first resistive element Ra1 and the second resistive element Ra2, the stronger their ability to attenuate transient current fluctuations. However, considering that if the resistance values of the first resistive element Ra1 and the second resistive element Ra2 are too large, the current in the first current path and the second current path will become too small and unable to reach the expected output current value, it is necessary to limit the resistance values of the first resistive element Ra1 and the second resistive element Ra2.
[0063] For ease of fabrication and calculation, the first switch Q1 and the third switch Q3 are usually selected to be the same type, as are the second switch Q2 and the fourth switch Q4. Therefore, the on-state voltage drops of the first switch Q1 and the third switch Q3 are the same, and the on-state voltage drops of the second switch Q2 and the fourth switch Q4 are the same. When considering the selection of the first resistive element Ra1 and the second resistive element Ra2, according to Ohm's law, the resistance value of the resistive element is chosen to be the ratio of the input voltage minus the on-state voltage drops of the first switch Q1 and the second switch Q2 to the desired output current. This ensures that the current in the first current path and the second current path meets the desired output current value.
[0064] Figure 4 A topology diagram of a current source circuit provided in an embodiment of this application is shown. (Refer to...) Figure 4 In some embodiments, the current source circuit further includes a fifth switch Q5 and a sixth switch Q6. The fifth switch Q5 is disposed in the current path between the first switch Q1 and the second switch Q2, and the operating voltage of the fifth switch Q5 is greater than the operating voltage of the first switch Q1; the sixth switch Q6 is disposed in the current path between the third switch Q3 and the fourth switch Q4, and the operating voltage of the sixth switch Q6 is greater than the operating voltage of the fourth switch Q4.
[0065] It should be noted that the switching transistors in the aforementioned current source circuits are typically low-voltage devices with thin gate oxide layers and low source-drain junction breakdown voltages. When the input voltage is much higher than the rated voltage of these switching transistors, directly connecting them in series between the input voltage node Vin and the ground node GND may cause the switching transistors to break down, resulting in permanent damage. Even if the switching transistors do not break down, the gate oxide layer may degrade or break down due to the excessive voltage.
[0066] The drain of the second switch Q2 is connected to the gate of the second switch Q2, forming a diode connection. The drain of the third switch Q3 is connected to the gate of the third switch Q3, also forming a diode connection. The voltages across the second switch Q2 and the third switch Q3 are usually clamped to a value less than or equal to their operating voltages. Therefore, the second switch Q2 and the third switch Q3 are usually not broken down.
[0067] A high-voltage resistant fifth switch Q5 is installed in the current path between the first switch Q1 and the second switch Q2. The fifth switch Q5 bears most of the voltage difference between the input high voltage and low voltage circuits. The gate bias of the fifth switch Q5 is fixed, which effectively clamps its source voltage. The clamped voltage can protect the first switch Q1 connected in series with it, ensuring that the first switch Q1 only bears safe voltage stress that meets its rated value.
[0068] A high-voltage-resistant sixth switch Q6 is installed in the current path between the third switch Q3 and the fourth switch Q4. The sixth switch Q6 bears most of the voltage difference between the input high voltage and low voltage circuits. The gate bias of the sixth switch Q6 is fixed, which effectively clamps its source voltage. The clamped voltage can protect the fourth switch Q4 connected in series with it, ensuring that the fourth switch Q4 only bears safe voltage stress that meets its rated value.
[0069] In this embodiment, a fifth switch Q5 and a sixth switch Q6 with high voltage resistance are added to the current source circuit. This ensures that under high voltage conditions, the first switch Q1 and the fourth switch Q4 only bear safe voltage stress that meets their rated values. Furthermore, effective electrical isolation can be achieved through the high voltage switches, preventing high voltage from being directly coupled to the control lines of the first switch Q1 and the fourth switch Q4. This allows the current source circuit to operate safely and reliably under high voltage power.
[0070] Figure 5 A topology diagram of a current source circuit provided in an embodiment of this application is shown. (Refer to...) Figure 5In some embodiments, the current source circuit further includes a seventh switch Q7 and an eighth switch Q8. The seventh switch Q7 is disposed in the current path between the fifth switch Q5 and the second switch Q2, and the operating voltage of the fifth switch Q5 is greater than the operating voltage of the second switch Q2; the eighth switch Q8 is disposed in the current path between the third switch Q3 and the sixth switch Q6, and the operating voltage of the eighth switch Q8 is greater than the operating voltage of the third switch Q3.
[0071] Understandably, in the current mirror unit, the first switch Q1 and the second switch Q2 are usually of different types. For example, if the first switch Q1 is a P-type MOSFET, the second switch Q2 is an N-type MOSFET. Similarly, the third switch Q3 and the fourth switch Q4 are usually of different types; if the third switch Q3 is a P-type MOSFET, the fourth switch Q4 is an N-type MOSFET. A fifth switch Q5, which is a P-type MOSFET, is added to the current path between the first switch Q1 and the second switch Q2. A sixth switch Q6, which is an N-type MOSFET, is added to the current path between the third switch Q3 and the fourth switch Q4. In other words, the two current paths are asymmetrical.
[0072] In this embodiment, a seventh switch Q7 is placed in the current path between the fifth switch Q5 and the second switch Q2. The seventh switch Q7 is a different type of switch than the fifth switch Q5. Similarly, the eighth switch Q8 is a different type of switch than the sixth switch Q6. This achieves a complete mirror image of the two current paths in terms of topology and device type, and the voltage stress on one circuit path is shared by the two high-voltage transistors, significantly reducing the electric field strength borne by a single device.
[0073] Devices of the same type can be placed close together, and layout matching technology can significantly reduce random mismatches caused by process variations. By influencing the current in the same way in both current paths, the error is canceled out in the output current, improving the accuracy of the current output.
[0074] In some embodiments, the first switch Q1 and the third switch Q3 are P-type MOSFETs, and the second switch Q2 and the fourth switch Q4 are N-type MOSFETs.
[0075] The source of the first switch Q1 is electrically connected to the input voltage node Vin, the drain of the first switch Q1 is electrically connected to the drain of the second switch Q2, and the source of the second switch Q2 is electrically connected to the ground node GND; the source of the third switch Q3 is electrically connected to the input voltage node Vin, the drain of the third switch Q3 is electrically connected to the drain of the fourth switch Q4, and the source of the fourth switch Q4 is electrically connected to the ground node GND.
[0076] P-type MOSFETs are fabricated in an N-well. To ensure reverse bias of the source-substrate PN junction, the substrate of the P-type MOSFET must be connected to the highest potential in the circuit, typically VDD. N-type MOSFETs are fabricated on a P-type substrate. To ensure reverse bias of the source-substrate PN junction, the substrate of the N-type MOSFET must be connected to the lowest potential in the circuit, typically GND. Placing the P-type MOSFET near VDD above and the N-type MOSFET near GND below naturally satisfies their respective substrate connection requirements.
[0077] In some embodiments, the width-to-length ratio of the first switch Q1 and the second switch Q2 is the same.
[0078] The drain current of a MOSFET is proportional to its width-to-length ratio. When the width-to-length ratios of the first switch Q1 and the second switch Q2 are the same, their drain currents are theoretically equal if the gate-source voltages are the same. This eliminates current errors caused by device size mismatch, significantly improving the accuracy of the output current of the current source circuit. Furthermore, it eliminates the need to design different compensation circuits or adjust the dimensions of the first switch Q1 and the second switch Q2, simplifying layout and parasitic parameter matching, and reducing design iteration costs.
[0079] In some embodiments, both the first resistive element Ra1 and the second resistive element Ra2 are resistors.
[0080] Fixed resistors are used as resistive components. When selecting resistors, only basic parameters such as resistance, power and accuracy need to be considered. There is no need to consider complex characteristics such as temperature coefficient or response time. Moreover, the highly standardized product system provides a wealth of ready-made options, which greatly simplifies the design process. At the same time, the mature manufacturing process and large-scale production effect of resistors make their unit cost significantly lower than that of complex components such as potentiometers and thermistors. Especially in mass applications, it can greatly reduce the overall circuit cost.
[0081] One embodiment of this application provides a chip that includes the aforementioned current source circuit.
[0082] The specific structure and working principle of the current source circuit can be referred to the aforementioned embodiments, and will not be repeated here.
[0083] According to the chip of this application, a resistive element is set in the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation in the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current in the circuit path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0084] One embodiment of this application provides an electronic device that includes the aforementioned current source circuit.
[0085] The specific structure and working principle of the current source circuit can be referred to the aforementioned embodiments, and will not be repeated here.
[0086] According to the electronic device of this application, a resistive element is provided in the current path between the switching transistors in the current mirror unit to increase the impedance of the current path, that is, to introduce resistive attenuation in the noise conduction path. When high-frequency noise in the input voltage is transmitted to the circuit, the resistive element can attenuate the amplitude of the noise current in the circuit path, reduce its modulation effect on the output current, and thus improve the current output accuracy.
[0087] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.
Claims
1. A current source circuit, characterized by, The current mirror unit comprises: a first switch tube and a second switch tube connected in series between an input voltage node and a ground node; a third switch tube and a fourth switch tube connected in series between the input voltage node and the ground node, a driving end of the third switch tube being electrically connected to a driving end of the first switch tube, and a driving end of the second switch tube being electrically connected to a driving end of the fourth switch tube; a first resistive element arranged in a first current path between the first switch tube and the second switch tube; and / or a second resistive element arranged in a second current path between the third switch tube and the fourth switch tube. The first resistive element and the second resistive element have equal resistance values.
2. The current source circuit of claim 1, wherein, The resistance values of the first resistive element and the second resistive element satisfy the following formula:
3. The current source circuit of claim 2, wherein, wherein R1 is the resistance value of the first resistive element, R2 is the resistance value of the second resistive element, Vin is the input voltage, V1 is the voltage drop of the first switch tube, V2 is the voltage drop of the second switch tube, and Ib is the expected output current. The current source circuit further comprises:
4. The current source circuit of any one of claims 1-3, wherein, a fifth switch tube arranged in a current path between the first switch tube and the second switch tube, the fifth switch tube having a working voltage greater than that of the first switch tube; a sixth switch tube arranged in a current path between the third switch tube and the fourth switch tube, the sixth switch tube having a working voltage greater than that of the fourth switch tube. The current source circuit further comprises:
5. The current source circuit of claim 4, wherein, a seventh switch tube arranged in a current path between the fifth switch tube and the second switch tube, the seventh switch tube having a working voltage greater than that of the second switch tube; an eighth switch tube arranged in a current path between the third switch tube and the sixth switch tube, the eighth switch tube having a working voltage greater than that of the third switch tube. The first switch tube and the third switch tube are P-type MOS tubes, and the second switch tube and the fourth switch tube are N-type MOS tubes.
6. The current source circuit of any one of claims 1-3, wherein, The first switch tube and the second switch tube have the same width-length ratio.
7. The current source circuit of claim 6, wherein, The first resistive element and the second resistive element are both resistors.
8. The current source circuit of any one of claims 1-3, wherein, The current source circuit according to any one of claims 1-8.
9. A chip, characterized by The current source circuit according to any one of claims 1-8.
10. An electronic device, comprising: