Optical fiber fusion splicing circuit

Abstract

The utility model discloses an optical fiber welding circuit, which relates to the technical field of optical fibers, and comprises a power supply, a control module, a voltage doubling module, a current sampling module, a first electrode needle and a second electrode needle, and the control module comprises a control unit and a voltage output unit; when an arc current signal received by the feedback end of an error amplifier in the control unit is increased, the voltage of the output end of the error amplifier is reduced, and when the voltage of the output end of the error amplifier is reduced, the PWM duty ratio output by the duty ratio output end of the control unit is reduced. When the arc current signal received by the feedback end of the error amplifier of the control module is increased, the voltage of the output end of the error amplifier is increased, and when the voltage of the output end of the error amplifier is increased, the PWM duty ratio output by the duty ratio output end of the control unit is increased. According to the utility model, the technical problem of unstable optical fiber welding is solved.

Description

Technical Field

[0001] This utility model relates to the field of optical fiber technology, and in particular to an optical fiber fusion splicing circuit. Background Technology

[0002] In fiber optic communication engineering construction, fiber optic fusion splicers achieve fiber splicing through plasma arc heating, and the stability of the arc affects the quality of the fiber optic splice. However, arc stability is easily affected by the output voltage of the fiber optic fusion splicer. For example, when encountering power grid fluctuations or changes in ambient temperature, the output voltage of the fiber optic fusion splicer will be unstable, leading to arc instability and consequently, fiber optic splicing instability. Therefore, the technical problem of unstable fiber optic fusion splicing currently exists. Utility Model Content

[0003] The main purpose of this invention is to provide an optical fiber fusion splicing circuit, which aims to solve the technical problem of unstable optical fiber fusion splicing.

[0004] To achieve the above objectives, this utility model proposes an optical fiber fusion splicing circuit, comprising: a power supply, a control module, a voltage multiplier module, a current sampling module, a first electrode needle, and a second electrode needle; the control module includes a control unit and a voltage output unit.

[0005] The power supply is connected to the power input terminal of the control unit, the duty cycle output terminal of the control unit is connected to the input terminal of the voltage output unit, the output terminal of the voltage output unit is connected to the input terminal of the voltage multiplier module, the output terminal of the voltage multiplier module is connected to the first electrode needle and the second electrode needle, the second electrode needle is connected to the current sampling module, and the current sampling module is connected to the feedback terminal of the error amplifier in the control unit.

[0006] The current sampling module is used to detect the arc current signal of the second electrode needle and send the arc current signal to the feedback terminal of the error amplifier.

[0007] When the arc current signal received at the feedback terminal of the error amplifier increases, the voltage at the output terminal of the error amplifier decreases. When the voltage at the output terminal of the error amplifier decreases, the PWM (Pulse Width Modulation) duty cycle of the duty cycle output terminal of the control unit decreases.

[0008] When the arc current signal received at the feedback terminal of the error amplifier of the control module increases, the voltage at the output terminal of the error amplifier rises. When the voltage at the output terminal of the error amplifier rises, the PWM duty cycle output by the duty cycle output terminal of the control unit increases.

[0009] In one embodiment, the duty cycle output terminal of the control unit includes a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal;

[0010] The voltage output unit includes a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a fourth field-effect transistor;

[0011] The first end of the first field-effect transistor is connected to the first output terminal, the first end of the second field-effect transistor is connected to the second output terminal, the first end of the third field-effect transistor is connected to the third output terminal, and the first end of the fourth field-effect transistor is connected to the fourth output terminal.

[0012] The second ends of the first field-effect transistor, the second end of the second field-effect transistor, the third field-effect transistor, and the fourth field-effect transistor are connected to the input end of the voltage multiplier module.

[0013] In one embodiment, the voltage multiplier module includes a transformer, a voltage multiplier unit, an energy storage capacitor, and a rectifier unit, wherein the transformer includes a primary coil and a secondary coil;

[0014] The first end of the primary coil is connected to the second end of the first field-effect transistor and the second end of the second field-effect transistor, and the second end of the primary coil is connected to the second end of the third field-effect transistor and the fourth field-effect transistor;

[0015] The secondary coil is connected to the voltage multiplier unit, the energy storage capacitor, and the rectifier unit. The energy storage capacitor is connected to the first electrode pin, and the rectifier unit is connected to the second electrode pin.

[0016] In one embodiment, the voltage multiplier unit includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, and a first resistor;

[0017] The secondary coil is connected to the first terminal of the first capacitor and the first terminal of the energy storage capacitor, and the second terminal of the secondary coil is connected to the positive terminal of the first diode.

[0018] The second terminal of the first capacitor is connected to the first terminal of the second capacitor, the cathode of the first diode, and the anode of the second diode; the second terminal of the second capacitor is connected to the first terminal of the third capacitor, the cathode of the third diode, and the anode of the fourth diode; and the second terminal of the third capacitor is connected to the cathode of the fifth diode and the anode of the sixth diode.

[0019] The negative terminal of the sixth diode is connected to the first terminal of the fourth capacitor. The second terminal of the fourth capacitor is connected to the first terminal of the fifth capacitor, the positive terminal of the fifth diode, and the negative terminal of the fourth diode. The second terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor, the positive terminal of the third diode, and the negative terminal of the second diode. The second terminal of the sixth capacitor is connected to the positive terminal of the first diode.

[0020] The first end of the fourth capacitor is connected to the first end of the first resistor, the second end of the first resistor is connected to the second end of the energy storage capacitor, and the second end of the energy storage capacitor is connected to the first electrode needle.

[0021] In one embodiment, the rectifier unit includes a first rectifier diode, a second rectifier diode, a third rectifier diode, and a fourth rectifier diode;

[0022] The positive terminal of the first rectifier diode and the negative terminal of the second rectifier diode are connected to the second electrode needle; the positive terminal of the second rectifier diode is connected to the positive terminal of the third rectifier diode; and the negative terminal of the third rectifier diode and the positive terminal of the fourth rectifier diode are connected to the second end of the secondary coil.

[0023] The negative terminals of the first rectifier diode and the fourth rectifier diode are connected to the current sampling module.

[0024] In one embodiment, the current sampling module includes a current sampling resistor and a filtering unit;

[0025] The first end of the current sampling resistor is connected to the negative terminal of the first rectifier diode, the negative terminal of the fourth rectifier diode, and the first end of the filter unit, and the second end of the filter unit is connected to the feedback terminal of the error amplifier.

[0026] In one embodiment, the fiber optic fusion splicing circuit further includes a boost module, which includes a boost converter and a boost output unit. The boost output unit includes a fifth field-effect transistor, a first inductor, and a seventh diode.

[0027] The output terminal of the power supply is connected to the power input terminal of the boost converter, the output terminal of the boost converter is connected to the first terminal of the fifth field-effect transistor, the second terminal of the fifth field-effect transistor is connected to the first terminal of the first inductor and the positive terminal of the seventh diode, and the negative terminal of the seventh diode is connected to the control module and the voltage feedback terminal of the boost converter.

[0028] In one embodiment, the fiber optic fusion splicing circuit further includes a power adjustment module, which includes a first adjustment unit and a second adjustment unit;

[0029] The first regulation unit includes an optocoupler isolator and a voltage precharge unit, and the second regulation unit includes a digital isolator and a power regulation unit;

[0030] The input terminals of the optocoupler and the digital isolator are both connected to a fusion splicer. The output terminal of the optocoupler is connected to the enable terminal of the voltage precharge unit and the control unit. The output terminal of the voltage precharge unit is connected to the output terminal of the error amplifier.

[0031] The output of the digital isolator is connected to the input of the power conditioning unit, and the output of the power conditioning unit is connected to the reference of the error amplifier.

[0032] In one embodiment, the voltage precharge unit includes a sixth field-effect transistor, a transistor, a first precharge resistor, a second precharge resistor, a third precharge resistor, a fourth precharge resistor, a precharge capacitor, and a precharge diode;

[0033] The first end of the sixth field-effect transistor is connected to the output end of the optocoupler isolator, the second end of the sixth field-effect transistor is connected to the first end of the first pre-charge resistor, and the first end of the first pre-charge resistor is connected to the first end of the second pre-charge resistor, the first end of the third pre-charge resistor, and the first end of the pre-charge capacitor.

[0034] The second end of the third pre-charge resistor is connected to the first end of the transistor, the second end of the transistor is connected to the first end of the fourth pre-charge resistor and the first end of the pre-charge diode, and the second end of the pre-charge diode is connected to the output end of the error amplifier.

[0035] The third terminal of the transistor is connected to the third terminal of the sixth field-effect transistor, and the second terminals of the second pre-charge resistor, the second terminal of the pre-charge capacitor, and the second terminal of the fourth pre-charge resistor are all connected to the equipotential point.

[0036] In one embodiment, the power regulation unit includes a power regulator and a voltage divider unit, wherein the voltage divider unit includes a first voltage divider resistor, a second voltage divider resistor, a third voltage divider resistor, and a voltage divider capacitor;

[0037] The input terminal of the power regulator is connected to the digital isolator, the output terminal of the power regulator is connected to the first terminal of the voltage divider capacitor and the first terminal of the first voltage divider resistor, and the second terminal of the voltage divider capacitor is connected to the equipotential point.

[0038] The second end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor and the first end of the third voltage divider resistor. The second end of the second voltage divider resistor is connected to the equipotential point. The second end of the third voltage divider resistor is connected to the reference terminal of the error amplifier.

[0039] To achieve the above objectives, this utility model also provides an optical fiber fusion splicing device, which includes the optical fiber fusion splicing circuit described above.

[0040] This invention provides an optical fiber fusion splicing circuit, comprising: a power supply, a control module, a voltage multiplier module, a current sampling module, a first electrode needle, and a second electrode needle. The control module includes a control unit and a voltage output unit. The power supply is connected to the power input terminal of the control unit, the duty cycle output terminal of the control unit is connected to the input terminal of the voltage output unit, the output terminal of the voltage output unit is connected to the input terminal of the voltage multiplier module, the output terminal of the voltage multiplier module is connected to the first electrode needle and the second electrode needle, the second electrode needle is connected to the current sampling module, and the current sampling module is connected to the feedback terminal of an error amplifier within the control unit. The current sampling module detects the arc current signal of the second electrode needle and sends the arc current signal to the feedback terminal of the error amplifier. Therefore, when the arc current signal received at the feedback terminal of the error amplifier increases, the voltage at the output terminal of the error amplifier decreases; and when the voltage at the output terminal of the error amplifier decreases, the PWM duty cycle output by the duty cycle output terminal of the control unit decreases.

[0041] Since the arc current signal can reflect the magnitude of the current in the electrode needle, the arc current signal is input to the feedback terminal of the error amplifier. When the arc current signal increases, the voltage at the feedback terminal of the error amplifier also increases, and consequently, the voltage output at the output terminal of the error amplifier decreases. When the voltage at the output terminal of the error amplifier decreases, the PWM duty cycle output by the duty cycle output terminal of the control unit decreases. When the output PWM duty cycle decreases, it indicates that the voltage output from the control module to the voltage multiplier module also decreases, which in turn reduces the current output to the first and second electrode needles. Therefore, this application can promptly reduce the current output to the first and second electrode needles when an increase in the arc current signal is detected, in order to ensure the stability of the current, thereby ensuring the stability of the output voltage, and thus facilitating the stability of the arc.

[0042] Furthermore, when the arc current signal received at the feedback terminal of the error amplifier in the control module increases, the voltage at the output terminal of the error amplifier rises. As the voltage at the output terminal of the error amplifier rises, the PWM duty cycle output by the duty cycle output terminal of the control unit increases. This allows for timely increase of the current output to the first and second electrode pins when a decrease in the arc current signal is detected, ensuring the stability of the output voltage and thus facilitating arc stability. Therefore, this application can promptly decrease the current output to the first and second electrode pins when an increase in the arc current signal is detected, and promptly increase the current output to the first and second electrode pins when a decrease in the arc current signal is detected, achieving closed-loop feedback and thus ensuring the stability of fiber optic welding. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0044] Figure 1 This is a schematic diagram of the fiber optic fusion splicing circuit module connection provided in an embodiment of the present invention;

[0045] Figure 2 A circuit connection diagram of the control module in the optical fiber fusion splicing circuit provided by this utility model;

[0046] Figure 3 A circuit connection diagram of the voltage multiplier module in the optical fiber fusion splicing circuit provided by this utility model, including a transformer, a voltage multiplier unit, and an energy storage capacitor;

[0047] Figure 4 A schematic diagram of the voltage multiplier module in the optical fiber fusion splicing circuit provided by this utility model;

[0048] Figure 5 A circuit connection diagram of the fiber optic fusion splice circuit current sampling module and rectifier unit provided by this utility model;

[0049] Figure 6 A schematic diagram of the circuit connection of the control module, voltage multiplier module, current sampling module, first electrode needle and second electrode needle in the optical fiber fusion splicing circuit provided by this utility model;

[0050] Figure 7 A schematic diagram of the circuit connection of the boost module in the optical fiber fusion splicing circuit provided by this utility model;

[0051] Figure 8 A schematic diagram of the module connection of the power adjustment module in the optical fiber fusion splicing circuit provided by this utility model;

[0052] Figure 9 A schematic diagram of the circuit connection of the first adjustment unit in the optical fiber fusion splicing circuit provided by this utility model;

[0053] Figure 10 A circuit connection diagram of the power adjustment module in the optical fiber fusion splicing circuit provided by this utility model;

[0054] Figure 11 A schematic diagram of the overall module connection of the optical fiber fusion splicing circuit provided by this utility model.

[0055] The purpose, features, and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings.

[0056] Explanation of icon numbers:

[0057] 100. Control module; 110. Control unit; 120. Voltage output unit; 200. Power supply; 300. Voltage multiplier module; 111. Error amplifier; 400. First electrode pin; 500. Second electrode pin; 600. Current sampling module; VIN, power input terminal; EN_IN, feedback terminal of error amplifier; EN_OUT, output terminal of error amplifier; PWMOUT, duty cycle output terminal; ENA, enable terminal of control unit; Cc1, first compensation capacitor; Cc2, second compensation capacitor; R1, compensation resistor; Q1~Q6, first field-effect transistor~sixth field-effect transistor; J1, first connector; OUTA~OUTD, first output terminal~fourth output terminal of control unit; 310. Transformer; 311. Primary coil; 312. Secondary coil; T1, iron core; 320. Voltage multiplier unit; J3. Third connector; C1~C6, first capacitor~sixth capacitor; D7. Energy storage capacitor; D1~ D6, Diodes 1-6; R2, Resistor 1; 330, Rectifier Unit; J4, Connector 4; R3, Current Sampling Resistor; D7-D10, Rectifier Diodes 1-4; 610, Filter Unit; 700, Boost Module; 710, Boost Output Unit; U1, Boost Transformer; FB, Voltage Feedback Terminal; GATE, Boost Transformer Output Terminal; L1, Inductor 1; D11, Diode 7; 800, Power Regulation Module Block 810, First Adjustment Unit; 811, Optocoupler Isolator; 812, Voltage Precharge Unit; 820, Second Adjustment Unit; 821, Digital Isolator; 822, Power Adjustment Unit; Q7, Transistor; R4~R7, First Precharge Resistor~Fourth Precharge Resistor; C8, Precharge Capacitor; D12, Precharge Diode; 8221, Power Regulator; 8222, Voltage Divider Unit; R8~R9, First Voltage Divider Resistor~Third Voltage Divider Resistor; C9, Voltage Divider Capacitor. Detailed Implementation

[0058] It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0059] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0060] It should be noted that the descriptions involving "first," "second," etc., in this utility model are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope claimed by this utility model.

[0061] Fiber optic fusion splicers are primarily used in fiber optic communication engineering construction. Fiber optic splicing requires a stable plasma arc to fuse the optical fibers. Different diameters and materials of optical fibers require different discharge powers, necessitating that the plasma arc power of the high-voltage transformer be adjustable and maintain stable discharge. The stability of the arc depends on the stability of the fiber optic fusion splicer's output voltage. When encountering power grid fluctuations or changes in ambient temperature, the output voltage of the fiber optic fusion splicer will become unstable, leading to arc instability and consequently, unstable fiber optic splicing. Therefore, the technical problem of unstable fiber optic fusion splicing currently exists.

[0062] Based on this, the present invention provides an optical fiber fusion splicing circuit. In one embodiment of the present invention, please refer to... Figure 1 The fiber optic fusion splicing circuit includes a power supply 300, a control module 100, a voltage multiplier module 300, a current sampling module 600, a first electrode needle 400, and a second electrode needle 500. The control module 100 includes a control unit 110 and a voltage output unit 120.

[0063] The power supply 300 is connected to the power input terminal VIN of the control unit 110. The duty cycle output terminal PWMOUT of the control unit 110 is connected to the input terminal of the voltage output unit 120. The output terminal of the voltage output unit 120 is connected to the input terminal of the voltage multiplier module 300. The output terminal of the voltage multiplier module 300 is connected to the first electrode pin 400 and the second electrode pin 500. The second electrode pin 500 is connected to the current sampling module 600. The current sampling module 600 is connected to the feedback terminal EN_IN of the error amplifier inside the control unit 110.

[0064] The current sampling module 600 is used to detect the arc current signal of the second electrode needle 500 and send the arc current signal to the feedback terminal EN_IN of the error amplifier.

[0065] When the arc current signal received at the feedback terminal EN_IN of the error amplifier increases, the voltage at the output terminal EN_OUT of the error amplifier decreases. When the voltage at the output terminal EN_OUT of the error amplifier decreases, the PWM duty cycle of the duty cycle output terminal PWMOUT of the control unit 110 decreases.

[0066] When the arc current signal received at the feedback terminal EN_IN of the error amplifier of the control module 100 increases, the voltage at the output terminal EN_OUT of the error amplifier rises. When the voltage at the output terminal EN_OUT of the error amplifier rises, the PWM duty cycle output at the duty cycle output terminal PWMOUT of the control unit 110 increases.

[0067] It should be noted that the voltage multiplier module 300 can be used to amplify the voltage from the control module 100, and then output the amplified voltage to the first electrode needle 400 and the second electrode needle 500. This ensures that the voltage received by the first electrode needle 400 and the second electrode needle 500 is high enough that both the first electrode needle 400 and the second electrode needle 500 can break down the air, thereby forming an electric arc between the first electrode needle 400 and the second electrode needle 500. This electric arc can then be used to weld optical fibers.

[0068] The current sampling module 600 can detect the arc current signal of the second electrode needle 500. Since both the first electrode needle 400 and the second electrode needle 500 receive voltage from the voltage multiplier module 300, the current magnitude of the first electrode needle 400 is the same as that of the second electrode needle 500. Therefore, the arc current signal detected by the current sampling module 600 can reflect the current magnitude of both the first electrode needle 400 and the second electrode needle 500.

[0069] The control module 100 may include a control unit 110 and a voltage output unit 120. The control unit 110 may be a FAN7314A chip, which contains an error amplifier. In the FAN7314A chip, when the output terminal EN_OUT of the error amplifier decreases, the duty cycle output terminal PWMOUT of the FAN7314A chip decreases; conversely, when the output terminal EN_OUT of the error amplifier decreases, the duty cycle output terminal PWMOUT of the FAN7314A chip increases. The error amplifier includes a feedback terminal, an output terminal, and a reference terminal. When splicing optical fibers of the same specification, the voltage received at the reference terminal of the error amplifier is constant because the power required for splicing optical fibers of the same specification is consistent.

[0070] Since different diameters or specifications of optical fibers require different power for splicing, when welding optical fibers of different specifications, the voltage input to the reference terminal of the error amplifier can be directly adjusted to output different power. For example, when the voltage input to the reference terminal of the error amplifier is different, the voltage output by the output terminal EN_OUT of the error amplifier will also be different, and the PWM duty cycle output by the duty cycle output terminal PWMOUT of the corresponding control unit 110 will also be different. In this way, different currents can be output to achieve different power outputs, so as to weld optical fibers of different specifications.

[0071] The feedback terminal EN_IN of the error amplifier can receive the input from the current sampling module 600 to form a closed-loop feedback, ensuring a stable output and thus guaranteeing the stability of the fusion splice. Figure 1 The specific structure of the error amplifier 111 is not shown, but the corresponding feedback terminal EN_IN and output terminal EN_OUT of the error amplifier are shown.

[0072] The voltage output unit 120 may include multiple field-effect transistors. The PWM duty cycle output by the control unit 110 is transmitted to the voltage output unit 120, and the voltage output unit 120 adjusts the voltage output to the voltage doubler module 300 based on the PWM duty cycle.

[0073] In this embodiment, when welding optical fibers of the same specification, the voltage received by the reference terminal of the error amplifier is constant. Therefore, when the voltage at the reference terminal of the error amplifier is constant, if the arc current signal received by the feedback terminal EN_IN of the error amplifier increases, the voltage at the feedback terminal will rise. When the voltage at the reference terminal is constant and the voltage at the feedback terminal rises, the voltage at the output terminal EN_OUT of the error amplifier will drop. When the voltage at the output terminal EN_OUT of the error amplifier drops, the PWM duty cycle output by the duty cycle output terminal PWMOUT of the control unit 110 decreases, thereby reducing the voltage output to the voltage multiplier module 300. This reduces the current received by the first electrode needle 400 and the second electrode needle 500, thus facilitating the stability of the arc output by the electrode needles.

[0074] When the voltage at the reference terminal of the error amplifier is constant, if the arc current signal received at the feedback terminal EN_IN of the error amplifier decreases, the voltage at the feedback terminal will decrease. When the reference terminal voltage is constant and the feedback terminal voltage decreases, the voltage at the output terminal EN_OUT of the error amplifier will increase. When the voltage at the output terminal EN_OUT of the error amplifier increases, the PWM duty cycle output by the duty cycle output terminal PWMOUT of the control unit 110 increases, thereby increasing the voltage output to the voltage multiplier module 300. This, in turn, increases the current received by the first electrode pin 400 and the second electrode pin 500, thus facilitating the stability of the arc output by the electrode pins. This achieves closed-loop feedback of input and output, thereby improving the stability of the welding process.

[0075] Since the arc current signal can reflect the magnitude of the current in the electrode needle, the arc current signal is input to the feedback terminal of the error amplifier. When the arc current signal increases, the voltage at the feedback terminal of the error amplifier also increases, and consequently, the voltage output at the output terminal of the error amplifier decreases. When the voltage at the output terminal of the error amplifier decreases, the PWM duty cycle output by the duty cycle output terminal of the control unit decreases. When the output PWM duty cycle decreases, it indicates that the voltage output from the control module to the voltage multiplier module also decreases, which in turn reduces the current output to the first and second electrode needles. Therefore, this application can promptly reduce the current output to the first and second electrode needles when an increase in the arc current signal is detected, in order to ensure the stability of the output voltage, thereby facilitating the stability of the arc.

[0076] Furthermore, when the arc current signal received at the feedback terminal of the error amplifier in the control module increases, the voltage at the output terminal of the error amplifier rises. As the voltage at the output terminal of the error amplifier rises, the PWM duty cycle output by the duty cycle output terminal of the control unit increases. This allows for timely increase of the current output to the first and second electrode pins when a decrease in the arc current signal is detected, ensuring the stability of the output voltage and thus facilitating arc stability. Therefore, this application can promptly decrease the current output to the first and second electrode pins when an increase in the arc current signal is detected, and promptly increase the current output to the first and second electrode pins when a decrease in the arc current signal is detected, achieving closed-loop feedback and thus ensuring the stability of fiber optic welding.

[0077] In one feasible embodiment, please refer to Figure 2 The duty cycle output terminal PWMOUT of the control unit 110 includes a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal;

[0078] The voltage output unit 120 includes a first field-effect transistor Q1, a second field-effect transistor Q2, a third field-effect transistor Q3, and a fourth field-effect transistor Q4;

[0079] The first end of the first field-effect transistor Q1 is connected to the first output terminal, the first end of the second field-effect transistor Q2 is connected to the second output terminal, the first end of the third field-effect transistor Q3 is connected to the third output terminal, and the first end of the fourth field-effect transistor Q4 is connected to the fourth output terminal.

[0080] The second end of the first field-effect transistor Q1, the second end of the second field-effect transistor Q2, the second end of the third field-effect transistor Q3, and the second end of the fourth field-effect transistor Q4 are connected to the input terminal of the voltage multiplier module 300.

[0081] It should be noted that the first field-effect transistor Q1, the second field-effect transistor Q2, the third field-effect transistor Q3, and the fourth field-effect transistor Q4 can all be N-channel enhancement MOSFETs (field-effect transistors). Specifically, the FAN7314A chip is used. The first terminal of each of the four field-effect transistors (Q1, Q2, Q3, and Q4) is the gate. The second terminals of both Q1 and Q3 are the sources. The drains of Q1 and Q3 can be connected to the output of the boost module 700. In this embodiment, the fiber optic fusion splicing circuit may include the boost module 700. The second terminals of both Q2 and Q4 are drains; the sources of both Q2 and Q4 can be grounded.

[0082] In control unit 110, EA_IN is the feedback terminal EN_IN of the error amplifier within control unit 110, EA_OUT is the output terminal EN_OUT of the error amplifier, and ADIM is the reference terminal of the error amplifier. VIN in control unit 110 can be connected to a 12V voltage to support the operation of control unit 110. Figure 2 The OLP, OLR, ENA, SS, GND, REF, BDIM, RT1, PGND, CT, RT, and BCT shown are all ports corresponding to the FAN7314A chip, and will not be specifically described in this embodiment. Figure 2 The port marked 12V can be a port connected to a 300V power supply.

[0083] A loop compensation unit can also be connected to the output terminal EN_OUT of the error amplifier. The loop compensation unit includes a compensation resistor R1, a first compensation capacitor Cc1, and a second compensation capacitor Cc2. The output terminal EN_OUT of the error amplifier is connected to the first terminal of the first compensation capacitor Cc1 and the first terminal of the compensation resistor R1. The second terminal of the compensation resistor R1 is connected to the first terminal of the second compensation capacitor Cc2. The second terminals of the second compensation capacitor Cc2 and the second terminals of the first compensation capacitor Cc1 are connected to an equipotential point. The voltage of the equipotential point can be 0 or a preset voltage value; this embodiment does not specifically limit this. The compensation resistor R1 is a resistor within the loop compensation unit, and the first compensation capacitor Cc1 and the second compensation capacitor Cc2 are also capacitors within the loop compensation unit. The loop compensation unit can ensure the stability of the output terminal EN_OUT of the error amplifier, avoid output oscillation, and thus facilitate the stability of the fusion splice.

[0084] In addition, in this embodiment, the control module 100 may further include a first connector J1, the second ends of the first field-effect transistor Q1 and the second ends of the second field-effect transistor Q2 can be connected to the first end of the first connector J1, and the second ends of the third field-effect transistor Q3 and the fourth field-effect transistor Q4 are connected to the second end of the first connector J1. The input terminal of the voltage multiplier module 300 can be connected through the first connector J1. This facilitates the layout of each module on the circuit board, improving layout flexibility. Figure 2 The 24V shown can refer to the output terminal connected to the boost module 700.

[0085] In one feasible embodiment, please refer to Figure 3 and Figure 4 The voltage multiplier module 300 includes a transformer 310, a voltage multiplier unit 320, an energy storage capacitor C7, and a rectifier unit 330. The transformer 310 includes a primary coil 311 and a secondary coil 312.

[0086] The first end of the primary coil 311 is connected to the second end of the first field-effect transistor Q1 and the second end of the second field-effect transistor Q2, and the second end of the primary coil 311 is connected to the second end of the third field-effect transistor Q3 and the fourth field-effect transistor Q4;

[0087] The secondary coil 312 is connected to the voltage multiplier unit 320, the energy storage capacitor C7, and the rectifier unit 330. The energy storage capacitor C7 is connected to the first electrode needle 400, and the rectifier unit 330 is connected to the second electrode needle 500.

[0088] It should be noted that the transformer 310 can boost the voltage, and the voltage multiplier unit 320 can further boost the voltage; for example, the voltage multiplier unit 320 can achieve a 6-fold voltage boost. The energy storage capacitor C7 can receive the output of the voltage multiplier unit 320, and the energy storage capacitor C7 can also provide a sufficiently high voltage to the first electrode needle 400 and the second electrode needle 500 to generate an electric arc between the first electrode needle 400 and the second electrode needle 500. The transformer 310 may include a primary coil 311, an iron core T1, and a secondary coil 312. The voltage output unit 120 of the control module 100 can be connected to the primary coil 311. Specifically, the voltage output unit 120 can be connected to the first and second ends of the first connector J1. A second connector J2 can also be provided in the voltage multiplier module 300. The first end of the primary coil 311 can be connected to the first end of the second connector J2, and the second end of the primary coil 311 can be connected to the second end of the second connector J2. The first connector J1 can be connected to the second connector J2, with the first end of the first connector J1 connected to the first end of the second connector J2, and the second end of the second connector J2 connected to the second end of the second connector J2. The first connector J1 includes three ports, and the second connector J2 also includes three ports. The third end of the second connector J2 can be connected to the third end of the first connector J1, and the third end of the first connector J1 can be connected to the rectifier unit 330. The rectifier unit 330 can be connected to the second electrode pin 500. The third end of the second connector J2 can be connected to the first end of the energy storage capacitor C7, so that the energy storage capacitor C7 can also provide voltage to the second electrode pin 500.

[0089] The secondary coil 312 is connected to the energy storage capacitor C7 of the voltage multiplier unit 320 and the rectifier unit 330. The energy storage capacitor C7 is connected to the first electrode needle 400, and the rectifier unit 330 is connected to the second electrode needle 500. In this embodiment, the voltage multiplier unit 320 can provide sufficient voltage to the first electrode needle 400 and the second electrode needle 500 to enable fiber optic splicing.

[0090] Furthermore, in a feasible embodiment, please refer to Figure 3 The voltage multiplier unit 320 includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, and a first resistor R2.

[0091] The secondary coil 312 is connected to the first terminal of the first capacitor C1 and the first terminal of the energy storage capacitor C7, and the second terminal of the secondary coil 312 is connected to the positive terminal of the first diode D1.

[0092] The second end of the first capacitor C1 is connected to the first end of the second capacitor C2, the negative terminal of the first diode D1 and the positive terminal of the second diode D2. The second end of the second capacitor C2 is connected to the first end of the third capacitor C3, the negative terminal of the third diode D3 and the positive terminal of the fourth diode D4. The second end of the third capacitor C3 is connected to the negative terminal of the fifth diode D5 and the positive terminal of the sixth diode D6.

[0093] The negative terminal of the sixth diode D6 is connected to the first terminal of the fourth capacitor C4. The second terminal of the fourth capacitor C4 is connected to the first terminal of the fifth capacitor C5, the positive terminal of the fifth diode D5, and the negative terminal of the fourth diode D4. The second terminal of the fifth capacitor C5 is connected to the first terminal of the sixth capacitor C6, the positive terminal of the third diode D3, and the negative terminal of the second diode D2. The second terminal of the sixth capacitor C6 is connected to the positive terminal of the first diode D1.

[0094] The first end of the fourth capacitor C4 is connected to the first end of the first resistor R2, the second end of the first resistor R2 is connected to the second end of the energy storage capacitor C7, and the second end of the energy storage capacitor C7 is connected to the first electrode pin 400.

[0095] It should be noted that the voltage multiplier unit 320 can amplify the voltage by 6 times, thus providing a sufficiently high voltage to the electrode needle, which in turn generates an electric arc for fiber optic splicing. For example, the transformer 310 generates high-voltage alternating current, which is then used by the voltage multiplier unit 320 to charge the energy storage capacitor C7. When the voltage in the energy storage capacitor C7 is sufficiently high, the electrode needle breaks down through the air, forming an electric arc. At this point, the high voltage generated by the transformer 310 is output to the electrode needle through the energy storage capacitor C7, maintaining the high voltage required for the electric arc. This ensures the continuity of the splice. The connection relationships of the capacitors and diodes in the voltage multiplier unit 320 can be found in [reference needed]. Figure 3 This embodiment will not elaborate further on this. Figure 3 The document also shows a third connector J3 and a second connector J2. The second connector J2 can be connected to the first connector J1. The energy storage capacitor C7 can be connected to the first electrode pin 400 through the third connector J3.

[0096] In one feasible embodiment, please refer to Figure 5 The rectifier unit 330 includes a first rectifier diode D7, a second rectifier diode D8, a third rectifier diode D9, and a fourth rectifier diode D10.

[0097] The positive terminal of the first rectifier diode D7 and the negative terminal of the second rectifier diode D8 are connected to the second electrode pin 500. The positive terminal of the second rectifier diode D8 is connected to the positive terminal of the third rectifier diode D9. The negative terminal of the third rectifier diode D9 and the positive terminal of the fourth rectifier diode D10 are connected to the second end of the secondary coil 312.

[0098] The negative terminals of the first rectifier diode D7 and the fourth rectifier diode D10 are connected to the current sampling module 600.

[0099] It should be noted that the first rectifier diode D7, the second rectifier diode D8, the third rectifier diode D9, and the fourth rectifier diode D10 can form a full-bridge rectifier, thereby facilitating the provision of a stable and continuous voltage to the second electrode needle 500 through the rectifier unit 330. This ensures that the second electrode needle 500 also has a sufficiently high voltage to generate an electric arc. The connection relationship between the rectifier diodes in the rectifier unit 330 can be referred to... Figure 5 This embodiment will not elaborate further. Figure 5 The fourth connector J4 is also shown, through which the rectifier unit 330 can be connected to the second electrode pin 500.

[0100] In one feasible embodiment, please refer to Figure 5 The current sampling module 600 includes a current sampling resistor R3 and a filtering unit 610;

[0101] The first end of the current sampling resistor R3 is connected to the negative terminal of the first rectifier diode D7, the negative terminal of the fourth rectifier diode D10, and the first end of the filter unit 610. The second end of the filter unit 610 is connected to the feedback terminal EN_IN of the error amplifier.

[0102] It should be noted that the filter unit 610 can filter out noise in the circuit, and thus transmit the arc current signal detected by the current sampling resistor R3 to the feedback terminal EN_IN of the error amplifier. The arc current signal detected by the current sampling resistor R3 is connected to the EA_IN terminal of the control unit 110. The EA_IN terminal is internally connected to the negative input terminal of the error amplifier. When the discharge intensity increases, the EA_IN voltage rises, the output voltages EN_OUT and EA_OUT of the error amplifier drop, the duty cycle of the four PWM outputs of the control unit 110 decreases, the current of the transformer 310 decreases, and the discharge intensity decreases, forming a closed-loop feedback to achieve power stabilization, thereby stabilizing the arc and improving the stability of fiber optic welding. The filter unit 610 includes capacitors and multiple resistors. The connection relationship of the capacitors and resistors in the filter unit 610 can be referred to... Figure 5 The specific details of this embodiment will not be elaborated here.

[0103] Additionally, please refer to Figure 6 , Figure 6 This is a schematic diagram of the overall circuit connecting the control module 100, voltage multiplier module 300, current sampling module 600, first electrode pin 400, and second electrode pin 500. The control module 100 and voltage multiplier module 300 can be connected via a first connector J1 and a second connector J2. For example, the first end of the first connector J1 is connected to the second end of the second connector J2, the second end of the first connector J1 is connected to the second end of the second connector J2, and the third end of the third connector J3 is connected to the third end of the third connector J3.

[0104] In one feasible embodiment, please refer to Figure 7 The fiber optic fusion splicing circuit also includes a boost module 700, which includes a boost converter U1 and a boost output unit 710. The boost output unit 710 includes a fifth field-effect transistor Q5, a first inductor L1, and a seventh diode D11.

[0105] The output terminal of the power supply 300 is connected to the power input terminal VIN1 of the boost converter U1. The output terminal GATE of the boost converter U1 is connected to the first terminal of the fifth field-effect transistor Q5. The second terminal of the fifth field-effect transistor Q5 is connected to the first terminal of the first inductor L1 and the positive terminal of the seventh diode D11. The negative terminal of the seventh diode D11 is connected to the control module 100 and the voltage feedback terminal FB of the boost converter U1.

[0106] It should be noted that the boost module 700 can pre-increase the voltage. Because the voltage is pre-increased, the turns ratio of the transformer 310 can be reduced, thus reducing the operating frequency of subsequent high-voltage boost. For example, the boost module 700 can boost 12V to 24V. At the same time, it can eliminate the discharge changes caused by the input power supply 300, such as in applications using lithium battery packs (where the power supply 300 changes when the lithium battery pack is powered).

[0107] In this embodiment, the boost converter U1 can be an MP3910 BOOST controller, and the boost output unit 710 can include a fifth field-effect transistor Q5, a first inductor L1 and a seventh diode D11, thereby achieving boost through the boost converter U1 and the boost output unit 710.

[0108] The output terminal of power supply 300 can be connected to the power input terminal VIN1 of boost converter U1. The output terminal GATE of boost converter U1 can be connected to the gate of the fifth field-effect transistor Q5. When the output terminal GATE of boost converter U1 is high, the fifth field-effect transistor Q5 is turned on, and the first inductor L1 stores energy. When the output terminal GATE is low, the fifth field-effect transistor Q5 is turned off, and the first inductor L1 releases energy. The energy released by the first inductor L1 can then be output to the control module 100. Furthermore, the seventh diode D11 can prevent reverse current, thereby ensuring the reliability of the circuit. The anode of the seventh diode D11 can be connected to the first inductor L1, and the cathode of the seventh diode D11 can be connected to the drain of the first field-effect transistor Q1 and the third field-effect transistor Q3 in the control module 100. A capacitor can also be provided between the cathode of the seventh diode D11 and the control module 100. This embodiment does not specifically limit this.

[0109] The cathode of the seventh diode D11 can also be connected to the voltage feedback terminal of the boost converter U1. This allows the boost converter U1 to provide the output voltage feedback to the voltage feedback terminal, dynamically adjusting the level of the GATE output in the boost converter to ensure continuous voltage boosting and reliability. A resistor can also be placed between the cathode of the seventh diode D11 and the voltage feedback terminal of the boost converter U1 to more stably feed the voltage output from the boost module 700 back to the boost converter U1. See [reference needed] for details. Figure 7 In addition, Figure 7 The diagram also shows the resistors and capacitors in the boost module 700, as well as the connection relationships between them. For details, please refer to [link / reference needed]. Figure 7 This embodiment will not elaborate further. Figure 7 The 24V port can be connected to the control module 100, for example, in combination with... Figure 7 and Figure 2 , Figure 2 All 24V ports marked in the middle can be connected. Figure 7 The 24V port marked in the diagram enables the connection between the boost module 700 and the control module 100. Figure 7 The GND, RT, COMP, EN, VCC, VIN, ISE, and SS shown are the respective ports corresponding to the boost converter U1, and this embodiment does not impose specific limitations on them. Figure 7 The port marked 12V can be connected to power supply 300. Therefore, boost module 700 can also be placed between power supply 300 and control module 100.

[0110] In one feasible embodiment, please refer to Figure 8 The fiber optic fusion splicing circuit further includes a power adjustment module 800, which includes a first adjustment unit 810 and a second adjustment unit 820.

[0111] The first adjustment unit 810 includes an optocoupler isolator 811 and a voltage precharge unit 812, and the second adjustment unit 820 includes a digital isolator 821 and a power adjustment unit 822.

[0112] The input terminals of the optocoupler 811 and the digital isolator 821 are both connected to a fusion splicer. The output terminal of the optocoupler 811 is connected to the enable terminal ENA of the voltage precharge unit 812 and the control unit 110. The output terminal of the voltage precharge unit 812 is connected to the output terminal EN_OUT of the error amplifier.

[0113] The output of the digital isolator 821 is connected to the input of the power adjustment unit 822, and the output of the power adjustment unit 822 is connected to the reference of the error amplifier.

[0114] It should be noted that the power adjustment module 800 can adjust the power output to the first electrode pin 400 and the second electrode pin 500. Since different diameters or specifications of optical fibers require different power for splicing, this embodiment provides a power adjustment module 800 to adapt to the splicing requirements of different optical fibers. The power adjustment module 800 can output a voltage reference signal to the reference terminal of the error amplifier in the control unit 110. By outputting different voltage reference signals, the duty cycle of the control unit 110 can be adjusted, thereby adjusting the current output to the first electrode pin 400 and the second electrode pin 500, and thus adjusting the output power to adapt to different optical fibers.

[0115] The power adjustment module 800 may include a first adjustment unit 810 and a second adjustment unit 820. The first adjustment unit 810 may precharge a certain voltage to the output terminal EN_OUT of the error amplifier before turning on the transformer 310 or the voltage multiplier module 300, so as to improve the problem of slow start-up under low power and thus improve the start-up speed of the fiber optic fusion splice circuit.

[0116] Optical isolators 811 and digital isolators 821 can avoid signal interference and ensure circuit reliability. The fusion splicer is the equipment required for fiber optic splicing. Both optical isolators 811 and digital isolators 821 can be connected to the main board of the fusion splicer. The main board of the fusion splicer can send a start signal to the voltage precharge unit 812 through the optical isolator 811, so that the voltage precharge unit 812 can provide a precharge voltage to the output terminal EN_OUT of the error amplifier. The main board of the fusion splicer can send a power signal to the power adjustment unit 822 through the digital isolator 821, so that the power adjustment unit 822 can output a corresponding voltage reference signal to the power signal, so as to transmit the voltage reference signal to the reference terminal of the error amplifier to realize power adjustment.

[0117] The output of the optocoupler 811 can also be connected to the enable terminal ENA of the control unit 110. Thus, when the motherboard of the fusion splicer sends a start signal, it can transmit the start signal to the enable terminal ENA to start the control unit 110. The start signal can be a level signal, such as a high level signal.

[0118] For further details, please refer to Figure 9 The voltage precharge unit 812 includes a sixth field-effect transistor Q6, a transistor Q7, a first precharge resistor R4, a second precharge resistor R5, a third precharge resistor R6, a fourth precharge resistor R7, a precharge capacitor C8, and a precharge diode D12.

[0119] The first end of the sixth field-effect transistor Q6 is connected to the output end of the optocoupler 811, the second end of the sixth field-effect transistor Q6 is connected to the first end of the first pre-charge resistor R4, and the first end of the first pre-charge resistor R4 is connected to the first end of the second pre-charge resistor R5, the first end of the third pre-charge resistor R6 and the first end of the pre-charge capacitor C8.

[0120] The second end of the third pre-charge resistor R6 is connected to the first end of the transistor Q7, the second end of the transistor Q7 is connected to the first end of the fourth pre-charge resistor R7 and the first end of the pre-charge diode D12, and the second end of the pre-charge diode D12 is connected to the output terminal EN_OUT of the error amplifier.

[0121] The third terminal of the transistor Q7 is connected to the third terminal of the sixth field-effect transistor Q6, and the second terminals of the second pre-charge resistor R5, the second terminal of the pre-charge capacitor C8, and the second terminal of the fourth pre-charge resistor R7 are all connected to the equipotential point.

[0122] It should be noted that when the output voltage of the error amplifier EN_OUT is started at low power, the voltage rise is slow, which affects the output voltage of the control module 100 and consequently the power of the electrode needle. Therefore, EA_OUT is pre-charged before the control module 100 starts. For example, before the control module 100 starts, the sixth field-effect transistor Q6 is turned on, and the resistors and Q7 provide the pre-charge voltage for EA_OUT. When the fusion splicer sends the start signal, the sixth field-effect transistor Q6 is turned off, the pre-charge capacitor C8 is powered, and the pre-charge diode D12 is turned off. Therefore, EA_OUT is pre-charged before the control module 100 starts, but not after the control module 100 starts. After the control module 100 starts, the voltage of EA_OUT is no longer affected by the first adjustment unit 810, thus improving the reliability of the fusion splicing.

[0123] When the sixth field-effect transistor Q6 is turned off, no pre-charge voltage is supplied to the output terminal EN_OUT of the error amplifier. In this embodiment, a voltage pre-charge unit 812 is provided to pre-charge a certain voltage to the output terminal EN_OUT of the error amplifier before the voltage multiplier module 300 is turned on, thereby improving the slow start-up of high voltage under low power conditions. The voltage pre-charge unit 812 includes a first pre-charge resistor R4, a second pre-charge resistor R5, a third pre-charge resistor R6, and a fourth pre-charge resistor R7, which are resistors within the voltage pre-charge unit 812. A pre-charge capacitor C8 is the capacitor of the voltage pre-charge unit 812, and a pre-charge diode D12 is the diode of the voltage pre-charge unit 812. The connection relationships of the capacitor, diode, and each resistor can be referred to... Figure 9 This implementation will not be elaborated upon here. Figure 9 The fifth connector J5 was also shown, through which the power regulation module 800 can be connected to the motherboard of the fusion splicer.

[0124] For further details, please refer to Figure 10 The power adjustment unit 822 includes a power regulator 8221 and a voltage divider unit 8222. The voltage divider unit 8222 includes a first voltage divider resistor R8, a second voltage divider resistor R9, a third voltage divider resistor R10, and a voltage divider capacitor C9.

[0125] The input terminal of the power regulator 8221 is connected to the digital isolator 821, the output terminal of the power regulator 8221 is connected to the first terminal of the voltage divider capacitor C9 and the first terminal of the first voltage divider resistor R8, and the second terminal of the voltage divider capacitor C9 is connected to the equipotential point.

[0126] The second end of the first voltage divider resistor R8 is connected to the first end of the second voltage divider resistor R9 and the first end of the third voltage divider resistor R10. The second end of the second voltage divider resistor R9 is connected to the equipotential point, and the second end of the third voltage divider resistor R10 is connected to the reference terminal of the error amplifier.

[0127] It should be noted that the power regulator 8221 can be an AD5321 DAC chip. The AD5321 DAC chip can generate a corresponding voltage reference signal based on the input power signal, and then send the voltage reference signal to the reference terminal of the error amplifier in the control unit 110 through the voltage divider unit 8222. The voltage divider unit 8222 is used to perform voltage division so that the voltage sent to the reference terminal by the power regulation module 800 is a voltage that the control unit 110 can support for operation. The digital isolator 821 can be an IS1540, which can avoid signal interference. The voltage divider unit 8222 and the power regulator 8221 together constitute the power regulation unit 822. Figure 10The AD, A1, PD, SCL, SDA, VDD, and GND shown are all ports within the power regulator 8221. This embodiment will not provide specific details about them. Figure 10 The number 821 refers to the digital isolator 821.

[0128] The first voltage divider resistor R8, the second voltage divider resistor R9, and the third voltage divider resistor R10 are resistors within the voltage divider unit 8222, and the voltage divider capacitor C9 is a capacitor within the voltage divider unit 8222. The circuit connections for the voltage divider unit 8222 and the power adjustment unit 822 can be found by referring to... Figure 10 This embodiment will not go into detail about this.

[0129] In this embodiment, the power can be adjusted by the power adjustment unit and the voltage divider unit, which can then be applied to various optical fibers of different specifications, thereby expanding the scope of application.

[0130] Additionally, for a better understanding of the fiber optic fusion splicing circuit in this implementation, please refer to... Figure 11 , Figure 11 The diagram shows the overall module schematic of the fiber optic fusion splicing circuit. Figure 11 The diagram shows the reference terminal ADIM corresponding to the error amplifier. ADIM is connected to the power regulation module, EN_OUT is also connected to the power regulation module, EN_IN is connected to the current sampling module, and the boost module can be connected to the control module. Figure 11 The voltage output unit of the control unit within the control module is not specifically shown. The boost module can be connected to either a power supply or the control module.

[0131] This utility model also provides an optical fiber fusion splicing device, which includes the optical fiber fusion splicing circuit described above.

[0132] The above are merely preferred embodiments of this utility model and do not limit the patent scope of this utility model. Any equivalent structural or procedural transformations made based on the description and drawings of this utility model, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this utility model.

Claims

1. An optical fiber fusion splicing circuit, characterized by comprising: The fiber optic fusion splicing circuit includes a power supply, a control module, a voltage multiplier module, a current sampling module, a first electrode needle, and a second electrode needle. The control module includes a control unit and a voltage output unit. The power supply is connected to the power input terminal of the control unit, the duty cycle output terminal of the control unit is connected to the input terminal of the voltage output unit, the output terminal of the voltage output unit is connected to the input terminal of the voltage multiplier module, the output terminal of the voltage multiplier module is connected to the first electrode needle and the second electrode needle, the second electrode needle is connected to the current sampling module, and the current sampling module is connected to the feedback terminal of the error amplifier in the control unit. The current sampling module is used to detect the arc current signal of the second electrode needle and send the arc current signal to the feedback terminal of the error amplifier. When the arc current signal received at the feedback terminal of the error amplifier increases, the voltage at the output terminal of the error amplifier decreases. When the voltage at the output terminal of the error amplifier decreases, the PWM duty cycle output by the duty cycle output terminal of the control unit decreases. When the arc current signal received at the feedback terminal of the error amplifier of the control module increases, the voltage at the output terminal of the error amplifier rises. When the voltage at the output terminal of the error amplifier rises, the PWM duty cycle output by the duty cycle output terminal of the control unit increases.

2. The optical fiber fusion splicing circuit according to claim 1, wherein, The duty cycle output terminal of the control unit includes a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal; The voltage output unit includes a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a fourth field-effect transistor; The first end of the first field-effect transistor is connected to the first output terminal, the first end of the second field-effect transistor is connected to the second output terminal, the first end of the third field-effect transistor is connected to the third output terminal, and the first end of the fourth field-effect transistor is connected to the fourth output terminal. The second ends of the first field-effect transistor, the second end of the second field-effect transistor, the third field-effect transistor, and the fourth field-effect transistor are connected to the input end of the voltage multiplier module.

3. The optical fiber fusion splicing circuit according to claim 2, wherein, The voltage multiplier module includes a transformer, a voltage multiplier unit, an energy storage capacitor, and a rectifier unit. The transformer includes a primary coil and a secondary coil. The first end of the primary coil is connected to the second end of the first field-effect transistor and the second end of the second field-effect transistor, and the second end of the primary coil is connected to the second end of the third field-effect transistor and the fourth field-effect transistor; The secondary coil is connected to the voltage multiplier unit, the energy storage capacitor, and the rectifier unit. The energy storage capacitor is connected to the first electrode pin, and the rectifier unit is connected to the second electrode pin.

4. The optical fiber fusion splicing circuit according to claim 3, wherein, The voltage multiplier unit includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, and a first resistor; The secondary coil is connected to the first terminal of the first capacitor and the first terminal of the energy storage capacitor, and the second terminal of the secondary coil is connected to the positive terminal of the first diode. The second terminal of the first capacitor is connected to the first terminal of the second capacitor, the negative terminal of the first diode, and the positive terminal of the second diode. The second terminal of the second capacitor is connected to the first terminal of the third capacitor, the negative terminal of the third diode, and the positive terminal of the fourth diode. The second terminal of the third capacitor is connected to the negative terminal of the fifth diode and the positive terminal of the sixth diode. The negative terminal of the sixth diode is connected to the first terminal of the fourth capacitor. The second terminal of the fourth capacitor is connected to the first terminal of the fifth capacitor, the positive terminal of the fifth diode, and the negative terminal of the fourth diode. The second terminal of the fifth capacitor is connected to the first terminal of the sixth capacitor, the positive terminal of the third diode, and the negative terminal of the second diode. The second terminal of the sixth capacitor is connected to the positive terminal of the first diode. The first end of the fourth capacitor is connected to the first end of the first resistor, the second end of the first resistor is connected to the second end of the energy storage capacitor, and the second end of the energy storage capacitor is connected to the first electrode needle.

5. The optical fiber fusion splicing circuit according to claim 3, wherein, The rectifier unit includes a first rectifier diode, a second rectifier diode, a third rectifier diode, and a fourth rectifier diode; The positive terminal of the first rectifier diode and the negative terminal of the second rectifier diode are connected to the second electrode needle; the positive terminal of the second rectifier diode is connected to the positive terminal of the third rectifier diode; and the negative terminal of the third rectifier diode and the positive terminal of the fourth rectifier diode are connected to the second end of the secondary coil. The negative terminals of the first rectifier diode and the fourth rectifier diode are connected to the current sampling module.

6. The optical fiber fusion splicing circuit according to claim 5, wherein, The current sampling module includes a current sampling resistor and a filtering unit; The first end of the current sampling resistor is connected to the negative terminal of the first rectifier diode, the negative terminal of the fourth rectifier diode, and the first end of the filter unit, and the second end of the filter unit is connected to the feedback terminal of the error amplifier.

7. The optical fiber fusion splicing circuit according to claim 1, wherein, The fiber optic fusion splicing circuit also includes a boost module, which includes a boost converter and a boost output unit. The boost output unit includes a fifth field-effect transistor, a first inductor, and a seventh diode. The output terminal of the power supply is connected to the power input terminal of the boost converter, the output terminal of the boost converter is connected to the first terminal of the fifth field-effect transistor, the second terminal of the fifth field-effect transistor is connected to the first terminal of the first inductor and the positive terminal of the seventh diode, and the negative terminal of the seventh diode is connected to the control module and the voltage feedback terminal of the boost converter.

8. The optical fiber fusion splicing circuit according to claim 1, wherein, The optical fiber fusion splicing circuit also includes a power adjustment module, which includes a first adjustment unit and a second adjustment unit. The first regulation unit includes an optocoupler isolator and a voltage precharge unit, and the second regulation unit includes a digital isolator and a power regulation unit; The input terminals of the optocoupler and the digital isolator are both connected to a fusion splicer. The output terminal of the optocoupler is connected to the enable terminal of the voltage precharge unit and the control unit. The output terminal of the voltage precharge unit is connected to the output terminal of the error amplifier. The output of the digital isolator is connected to the input of the power conditioning unit, and the output of the power conditioning unit is connected to the reference of the error amplifier.

9. The optical fiber fusion splicing circuit according to claim 8, wherein, The voltage precharge unit includes a sixth field-effect transistor, a transistor, a first precharge resistor, a second precharge resistor, a third precharge resistor, a fourth precharge resistor, a precharge capacitor, and a precharge diode; The first end of the sixth field-effect transistor is connected to the output end of the optocoupler isolator, the second end of the sixth field-effect transistor is connected to the first end of the first pre-charge resistor, and the first end of the first pre-charge resistor is connected to the first end of the second pre-charge resistor, the first end of the third pre-charge resistor, and the first end of the pre-charge capacitor. The second end of the third pre-charge resistor is connected to the first end of the transistor, the second end of the transistor is connected to the first end of the fourth pre-charge resistor and the first end of the pre-charge diode, and the second end of the pre-charge diode is connected to the output end of the error amplifier. The third terminal of the transistor is connected to the third terminal of the sixth field-effect transistor, and the second terminals of the second pre-charge resistor, the second terminal of the pre-charge capacitor, and the second terminal of the fourth pre-charge resistor are all connected to the equipotential point.

10. The optical fiber fusion splicing circuit according to claim 8, wherein, The power regulation unit includes a power regulator and a voltage divider unit. The voltage divider unit includes a first voltage divider resistor, a second voltage divider resistor, a third voltage divider resistor, and a voltage divider capacitor. The input terminal of the power regulator is connected to the digital isolator, the output terminal of the power regulator is connected to the first terminal of the voltage divider capacitor and the first terminal of the first voltage divider resistor, and the second terminal of the voltage divider capacitor is connected to the equipotential point. The second end of the first voltage divider resistor is connected to the first end of the second voltage divider resistor and the first end of the third voltage divider resistor. The second end of the second voltage divider resistor is connected to the equipotential point. The second end of the third voltage divider resistor is connected to the reference terminal of the error amplifier.

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