Portable WiFi device activated by charging in over-discharge state
By introducing a reset chip and control logic using NMOS/PMOS transistors, the problem of charging failure in the case of over-discharge of portable WiFi devices has been solved, ensuring the stability of the charging process and the reliability of the device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SHANGHAI MUMU INTELLIGENT TECHNOLOGY CO LTD
- Filing Date
- 2025-03-06
- Publication Date
- 2026-04-28
AI Technical Summary
When a portable WiFi device is over-discharged, the charging chip cannot be activated properly, causing the device to fail to charge and creating a vicious cycle.
The system employs a reset chip and NMOS/PMOS transistor control logic. By detecting the battery voltage and outputting control signals, it controls the switching state of the PMOS and NMOS transistors, ensuring that the charging chip can charge stably even under over-discharge conditions.
This enables the charging chip to be activated normally even when the battery is over-discharged, avoiding dead loops and improving device reliability and user experience.
Smart Images

Figure CN224177964U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of portable WiFi technology, specifically to a portable WiFi device that is activated by charging under an over-discharge state. Background Technology
[0002] Portable WiFi devices are those that convert 2G, 3G, 4G, and 5G networks into WiFi signals, meeting the network needs of business travelers and tourists. They consist of a motherboard, casing, battery, antenna, and other components. The motherboard includes a main control chip, a charging chip (or power bank chip), an RF chip, and a WiFi chip. However, during daily use, the battery may drain to the shutdown voltage or even become over-discharged. In this over-discharge state (below 3V), the charging chip or power bank chip operates in trickle charging mode with a small current. When the battery voltage reaches near 3V, the main control system attempts to activate, but the instantaneous large current consumption (greater than 100mA) will pull the battery voltage down below 3V again, causing the main control system to fail to activate. At this point, the charging chip or power bank chip remains in a small-current trickle charging state, creating a vicious cycle and failing to successfully charge the battery. Utility Model Content
[0003] To help solve the above-mentioned technical problems, this application provides a portable WiFi device that is activated by charging in an over-discharge state, adopting the following technical solution:
[0004] A portable WiFi device that is activated by charging in an over-discharge state includes a battery, a Type-C connector, and a charging chip. It also includes a main control system, a reset chip, an NMOS transistor, and a PMOS transistor.
[0005] The charging detection signal terminal of the main control system is connected to the input terminal of the charging chip through a PMOS transistor, and the output terminal of the reset chip is connected to the gate of an NMOS transistor.
[0006] The PMOS transistor includes a first PMOS transistor, a second PMOS transistor, and a third PMOS transistor. The first and second PMOS transistors are connected between the input voltage terminal and the input terminal of the charging chip. The drain of the third PMOS transistor is connected to the charging detection signal terminal, the source is connected to the input terminal of the charging chip, and the gate is connected to the drain of the NMOS transistor. The output signal of the NMOS transistor controls the switching of the third PMOS transistor, thereby controlling the switching of the charging detection signal terminal of the main control system.
[0007] The reset chip is used to detect the battery voltage and output a control signal based on the battery voltage. The NMOS transistor is used to switch the control signal between high and low levels.
[0008] Preferably, the positive terminal of the battery is connected to the input voltage terminal of the reset chip, the power input terminal of the Type-C connector is connected to the input terminal of the charging chip through a PMOS transistor, the battery is used to store and provide the power required by the portable WiFi, the Type-C connector is used to receive voltage, the portable WiFi device receives input voltage by inserting the Type-C connector into the charger, and the charging chip is used to charge the battery with the input voltage received by the Type-C connector.
[0009] Preferably, the drain of the first PMOS transistor is connected to the input voltage, the source of the first PMOS transistor is connected to the source of the second PMOS transistor, and the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor.
[0010] Preferably, the portable WIFI device further includes resistors, including a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to a reset chip, and the other end is connected to the gate of an NMOS transistor. One end of the second resistor is connected to the gate of an NMOS transistor, and the other end is grounded. One end of the third resistor is connected to the source of a first PMOS transistor, and the other end is connected to the gate of a first PMOS transistor. One end of the fourth resistor is connected to the source of a third PMOS transistor, and the other end is connected to the gate of a third PMOS transistor. The resistors are used to pull up or pull down signal levels in the circuit.
[0011] Preferably, the main control system is a 4G or 5G communication platform, the PMOS is JSTL2307, the NMOS is WNM2030-3 / TR, the reset chip is SGM809-TXN3 / TR, and the charging chip is IP5219.
[0012] In summary, this application uses common materials such as MOSFETs and reset chips to achieve a stable, low-cost, and highly practical technical solution for the problem of portable WiFi devices failing to charge due to over-discharge. Attached Figure Description
[0013] Figure 1 A schematic diagram of the charging chip in the portable WiFi device activated by charging under an over-discharge state according to this application;
[0014] Figure 2 A schematic diagram of the battery structure in the portable WiFi device activated by charging under an over-discharge state according to this application;
[0015] Figure 3 This is a schematic diagram of the reset chip and NMOS transistor in the portable WiFi device activated by charging under an over-discharge state according to this application.
[0016] Figure 4 A schematic diagram of the main control system in the portable WiFi device activated by charging under an over-discharge state according to this application;
[0017] Figure 5 A schematic diagram of the structure of the first PMOS transistor and the second PMOS transistor in the portable WiFi device activated by charging under the over-discharge state of this application.
[0018] Figure 6 A schematic diagram of the third PMOS transistor in the portable WiFi device activated by charging under over-discharge state according to this application;
[0019] Figure 7 A schematic diagram of the Type-C connector in a portable WiFi device activated by charging under an over-discharge state as described in this application. Detailed Implementation
[0020] The present application will be further described below with reference to the accompanying drawings. The structure and principle of the present application are very clear to those skilled in the art. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
[0021] The portable WIFI device of this application includes a battery BAT1, a Type-C connector USB1, a charging chip U1, a main control system HOST1, a reset chip U2, an NMOS transistor N1, and a PMOS transistor. The charging detection signal terminal of the main control system HOST1 is connected to the input terminal VIN of the charging chip U1 through the PMOS transistor. The output terminal of the reset chip U2 is connected to the gate of the NMOS transistor N1. The reset chip U2 is used to detect the battery voltage and output a control signal according to the battery voltage VBAT. The NMOS transistor N1 is used to switch the control signal between high and low levels.
[0022] The PMOS transistors include a first PMOS transistor P1, a second PMOS transistor P2, and a third PMOS transistor P3. The first and second PMOS transistors P1 and P2 are connected between the input voltage terminal VBUS and the input terminal VIN of the charging chip U1. The drain of the first PMOS transistor P1 is connected to the input voltage, the source of the first PMOS transistor P1 is connected to the source of the second PMOS transistor P2, and the gate of the first PMOS transistor P1 is connected to the gate of the second PMOS transistor P2. The drain of the third PMOS transistor P3 is connected to the charging detection signal terminal, the source is connected to the input terminal of the charging chip U1, and the gate is connected to the drain of an NMOS transistor N1. The output signal of the NMOS transistor N1 controls the switching of the third PMOS transistor P3, thereby controlling the switching of the charging detection signal terminal of the main control system HOST1.
[0023] The positive terminal of battery BAT1 is connected to the input voltage terminal of reset chip U2. The power input terminal of Type-C connector USB1 is connected to the input terminal of charging chip U2 through PMOS transistors P1 and P2. Battery BAT1 is used to store and provide the power required by portable WiFi. Type-C connector USB1 is used to receive voltage. Portable WiFi device receives input voltage by plugging into charger through Type-C connector USB1. Charging chip U1 is used to charge battery BAT1 with the input voltage received by Type-C connector USB1.
[0024] The portable WIFI device also includes resistors, including a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. One end of the first resistor R1 is connected to the reset chip U2, and the other end is connected to the gate of NMOS transistor N1. One end of the second resistor R2 is connected to the gate of NMOS transistor N1, and the other end is grounded. One end of the third resistor R3 is connected to the source of the first PMOS transistor P1, and the other end is connected to the gate of the first PMOS transistor P1. One end of the fourth resistor R4 is connected to the source of the third PMOS transistor P3, and the other end is connected to the gate of the third PMOS transistor P3. The resistors are used for signal levels in pull-up or pull-down circuits.
[0025] The charging detection signal of the main control system is connected to the input terminal of the charging chip through a PMOS transistor. The switching control signal of the PMOS transistor is connected to the NMOS transistor. The switching control signal of the NMOS transistor is connected to the output of the reset chip through a resistor. The input voltage of the reset chip is connected to the positive terminal of the battery.
[0026] The power input of the Type-C connector is connected to two PMOS transistors, the other end of which is connected to the input of the charging chip. The main control system is used for RF processing, WiFi transmission, account password setting, and charging detection; the PMOS transistors are used for power channel switching control; the NMOS transistors are used for high-low level conversion of control signals; the reset chip is used to detect the battery voltage and output corresponding control signals based on the battery voltage; the charging chip is used to charge the battery with the voltage introduced through the Type-C connector; the battery is used to store and provide the power required by the main control system; the Type-C connector is used to connect the adapter voltage. The charging chip U1 is grounded through inductor L1 and capacitor C102.
[0027] Specifically, when the battery voltage VBAT is below 3V, it is in an over-discharged state. At this time, when USB1 is plugged into the charger, VBUS receives 5V, which is conducted to VIN through P1 and P2. The charging chip VIN is energized and enters a trickle charging state.
[0028] Since the battery voltage VBAT of BAT1 is connected to the input terminal of the 3.08V reset chip U2, when the battery voltage VBAT of BAT1 is lower than 3.08V, the reset chip U2 outputs a low level, which controls the NMOS transistor N1, so that N1 is turned off, that is, VBUS_GATE is not pulled low, and is in a high level state because VIN is pulled up through the resistor R4.
[0029] Since the VBUS_GATE signal controls the PMOS transistor P3, when VBUS_GATE is at a high level, P3 is not turned on, the main control system charging detection signal VBUS_DET is not triggered, the main control system is not activated, and the charging chip continues to charge stably. It is also known that when the battery voltage VBAT of BAT1 reaches above 3V, the charging chip will exit trickle charging and enter constant current charging mode (current above 1A) until it reaches above 3.08V.
[0030] When the battery voltage VBAT reaches 3.08V, the reset chip U2 outputs a high level, controlling the NMOS transistor N1 to turn on, which pulls VBUS_GATE low. When VBUS_GATE is low, the PMOS transistor P3 is turned on, and the main control system's charging detection signal VBUS_DET receives the voltage of VIN, thus activating the main control system normally.
[0031] In this embodiment, the main control system is a 4G or 5G communication platform, the PMOS is JSTL2307, the NMOS is WNM2030-3 / TR, the reset chip is SGM809-TXN3 / TR, and the charging chip is IP5219.
[0032] In summary, by introducing a reset chip and NMOS / PMOS transistor control logic, the charging chip can stably enter the charging state even when the battery is over-discharged. This effectively solves the problem of not charging after over-discharge, improving device reliability and user experience.
Claims
1. A portable WiFi device that is activated by charging in an over-discharge state, comprising a battery, a Type-C connector, and a charging chip, characterized in that, It also includes the main control system, reset chip, NMOS transistors and PMOS transistors. The charging detection signal terminal of the main control system is connected to the input terminal of the charging chip through a PMOS transistor, and the output terminal of the reset chip is connected to the gate of an NMOS transistor. The PMOS transistor includes a first PMOS transistor, a second PMOS transistor, and a third PMOS transistor. The first and second PMOS transistors are connected between the input voltage terminal and the input terminal of the charging chip. The drain of the third PMOS transistor is connected to the charging detection signal terminal, the source is connected to the input terminal of the charging chip, and the gate is connected to the drain of the NMOS transistor. The output signal of the NMOS transistor controls the switching of the third PMOS transistor, thereby controlling the switching of the charging detection signal terminal of the main control system. The reset chip is used to detect the battery voltage and output a control signal based on the battery voltage. The NMOS transistor is used to switch the control signal between high and low levels.
2. The portable WIFI device according to claim 1, characterized in that, The positive terminal of the battery is connected to the input voltage terminal of the reset chip. The power input terminal of the Type-C connector is connected to the input terminal of the charging chip through a PMOS transistor. The battery is used to store and provide the power required by the portable WiFi. The Type-C connector is used to receive voltage. The portable WiFi device receives input voltage by plugging into the charger through the Type-C connector. The charging chip is used to charge the battery with the input voltage received by the Type-C connector.
3. The portable WIFI device according to claim 2, characterized in that, The drain of the first PMOS transistor is connected to the input voltage, the source of the first PMOS transistor is connected to the source of the second PMOS transistor, and the gate of the first PMOS transistor is connected to the gate of the second PMOS transistor.
4. The portable WIFI device according to claim 3, characterized in that, The portable WIFI device also includes resistors, including a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to the reset chip, and the other end is connected to the gate of the NMOS transistor. One end of the second resistor is connected to the gate of the NMOS transistor, and the other end is grounded. One end of the third resistor is connected to the source of the first PMOS transistor, and the other end is connected to the gate of the first PMOS transistor. One end of the fourth resistor is connected to the source of the third PMOS transistor, and the other end is connected to the gate of the third PMOS transistor. The resistors are used for signal levels in pull-up or pull-down circuits.
5. The portable WIFI device according to claim 1, characterized in that, The main control system is a 4G or 5G communication platform, the PMOS is JSTL2307, the NMOS is WNM2030-3 / TR, the reset chip is SGM809-TXN3 / TR, and the charging chip is IP5219.