Lamp-drive integrated driving chip, display panel and display device

By employing a single power supply and deep-well isolation technology in the integrated lamp driver chip, the power consumption problem caused by the limited area of ​​the driver chip is solved, thereby simplifying the circuit layout and reducing power consumption.

CN224190659UActive Publication Date: 2026-05-01XIAN TIBORS ELECTRONIC TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
XIAN TIBORS ELECTRONIC TECH CO LTD
Filing Date
2025-05-23
Publication Date
2026-05-01

AI Technical Summary

Technical Problem

Given the limited area of ​​the driver chip in a combined lamp driver, how can we simplify the circuit layout and reduce power consumption?

Method used

By using the same power supply in the driver chip, the voltage at one end of the first driver module is increased, reducing the number of external power supplies and pins. Deep-well isolation technology is used to prevent parasitic diodes from conducting, and digital and analog power supplies are reused to optimize the circuit layout.

Benefits of technology

Without adding extra circuitry, the power consumption of the driver chip was reduced, the circuit layout was simplified, and the number of external power supplies and pins was decreased.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the utility model provides a lamp-driver integrated driving chip, a display panel and a display device, relates to the technical field of display, and is used for simplifying circuit layout and reducing power consumption under the condition that the area of the lamp-driver integrated driving chip is limited. The lamp-drive integrated driving chip comprises N pixel circuits and a driving circuit. A first power supply end of the driving circuit is connected with a first power supply; each pixel circuit comprises a first sub-pixel module and a second sub-pixel module, the first sub-pixel module comprises at least one red sub-pixel module, and the second sub-pixel module comprises at least one of a green sub-pixel module, a blue sub-pixel module and a white sub-pixel module. The driving circuit comprises N first driving modules and N second driving modules. The input ends of the first sub-pixel module and the second sub-pixel module are connected with the second power supply, the output end of the first sub-pixel module is connected with the first power supply through the first driving module, and the output end of the second sub-pixel module is grounded through the second driving module.
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Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a driver chip that integrates lamp and driver functions, a display panel, and a display device. Background Technology

[0002] In recent years, with the increasing demand for upgrades in display technology, more and more emerging technologies tend to use active matrix (AM) driving, which equips each light-emitting diode (LED) with an independent and dedicated driver chip to avoid the screen display problems caused by traditional passive matrix (PM) driving. In AM driving applications, a miniature driver chip can be packaged together with the LED to form an LED bead with independent driving function. This LED bead is then assembled onto a PCB substrate using standardized soldering processes to form a unified lamp-driver chip. This achieves AM driving functionality without requiring a complete restructuring of the traditional display module's overall architecture.

[0003] Currently, due to the physical constraints of LED package size, the usable area of ​​the driver chip in integrated lamp and driver systems is relatively small, making power consumption a particularly prominent issue. Therefore, how to simplify circuit layout and reduce power consumption within the limited area of ​​the driver chip in integrated lamp and driver systems has become an urgent technical problem to be solved. Utility Model Content

[0004] The purpose of the embodiments of this application is to provide a driver chip, display panel and display device that integrates lamp and driver functions, so as to simplify circuit layout and reduce power consumption when the area of ​​the driver chip that integrates lamp and driver functions is limited.

[0005] To achieve the above objectives, embodiments of this application provide the following technical solutions:

[0006] A first aspect of this application provides a driver chip that integrates lamp and driver functions. The driver chip includes N pixel circuits and a driver circuit for driving the N pixel circuits, where N is a positive integer. A first power supply terminal of the driver circuit is connected to a first power supply, which provides a first operating voltage to the driver circuit. Each of the N pixel circuits includes a first sub-pixel module and a second sub-pixel module. The first sub-pixel module includes at least one red sub-pixel module, and the second sub-pixel module includes at least one of a green, blue, and white sub-pixel module. The driver circuit includes N first driver modules and N second driver modules. The input terminals of both the first and second sub-pixel modules are connected to a second power supply. The output terminal of the first sub-pixel module is connected to the first power supply via the first driver module, and the output terminal of the second sub-pixel module is grounded via the second driver module. The voltage of the first power supply is less than the voltage of the second power supply.

[0007] In the above technical solution, in the integrated lamp driver chip provided in this application embodiment, when the first sub-pixel module and the second sub-pixel module are powered by the same power supply (i.e., the second power supply), connecting one end of the first driver module to the first power supply can raise the voltage at one end of the first driver module, making the voltage difference between the red sub-pixel module and the two ends of the branch where the first driver module is located smaller, which can reduce the power consumption of the branch to a certain extent, thereby reducing the power consumption of the integrated lamp driver chip. Furthermore, the voltage of the first power supply is lower than the voltage of the second power supply, allowing the red sub-pixel module to be normally driven to emit light by the first driver module under the action of a forward voltage difference, avoiding device breakdown due to reverse voltage. In addition, in this application embodiment, the first power supply is the power supply for the driver circuit. Regardless of whether one end of the first driver module is connected to the first power supply, the first power supply needs to provide a first operating voltage to the driver circuit through the first power supply terminal of the driver circuit to enable the driver circuit to work normally. Compared with the prior art using two different power supplies to power three different sub-pixel modules respectively, the driver chip provided in this application embodiment can reduce the number of externally connected power supplies and the number of pins connected to the power supply by reusing the first power supply. Therefore, the integrated lamp driver chip provided in this application embodiment, under the condition of limited driver chip area, can not only simplify the circuit layout by reducing the number of pins and power supplies of the pixel circuit, but also reduce the power consumption of the branch where the red sub-pixel module is located, thereby reducing the power consumption of the integrated lamp driver chip.

[0008] In conjunction with the first aspect, in one possible implementation, the first driving module includes at least one first switching submodule and at least one first current control submodule; the output terminal of the first subpixel module is connected to the first terminal of the first current control submodule, and the second terminal of the first current control submodule is used to connect to a first power supply through the first switching submodule; or, the output terminal of the first subpixel module is connected to the first terminal of the first switching submodule, and the second terminal of the first switching submodule is used to connect to the first power supply through the first current control submodule.

[0009] Based on the above technical solution, a possible circuit structure for the first driving module is provided. Without adding an additional circuit structure, by connecting one end of the first switch submodule to the first power supply or connecting one end of the first current submodule to the first power supply, the voltage difference between the two ends of the branch where the red subpixel module and the first driving module are located can be reduced, thereby reducing the power consumption of the branch to a certain extent and reducing the power consumption of the integrated lamp driver chip.

[0010] In conjunction with the first aspect, in one possible implementation, the first current control submodule includes a first transistor, and the first switching submodule includes a second transistor. The control terminal of the first transistor is used to receive a current control signal, and the control terminal of the second transistor is used to receive a switching signal. A first terminal of the first transistor is connected to the output terminal of the first sub-pixel module, and a second terminal of the first transistor is connected to the first terminal of the second transistor, with the second terminal of the second transistor used to connect to a first power supply; or, a first terminal of the second transistor is connected to the output terminal of the first sub-pixel module, and a second terminal of the second transistor is connected to the first terminal of the first transistor, with the second terminal of the first transistor used to connect to the first power supply.

[0011] Based on the above technical solution, a possible circuit structure for the first driving module is provided. Without adding an additional circuit structure, by connecting the second end of the second transistor or the second end of the first transistor to the first power supply, the voltage difference between the red sub-pixel module and the two ends of the branch where the first driving module is located can be reduced, thereby reducing the power consumption of the branch to a certain extent and reducing the power consumption of the integrated lamp driver chip.

[0012] In conjunction with the first aspect, in one possible implementation, when the first terminal of the first transistor is connected to the output terminal of the first sub-pixel module, the first transistor is a P-type transistor and the second transistor is an N-type transistor with a deep N-well; or, when the first terminal of the second transistor is connected to the output terminal of the first sub-pixel module, the second transistor is a P-type transistor and the first transistor is an N-type transistor with a deep N-well.

[0013] Based on the above technical solution, the deep well isolation technology can make the potentials of the substrate and the source of the N-type transistor independent of each other, avoiding the forward bias of the PN junction when the substrate and the source are shorted to the same floating potential (i.e., the first power supply), thereby avoiding the situation where the parasitic diode conducts and thus destroys the circuit function.

[0014] In conjunction with the first aspect, in one possible implementation, a deep N-well is used to connect to a first power source.

[0015] Based on the above technical solution, the deep well isolation technology can make the potentials of the substrate and source of the N-type transistor independent of each other. By grounding the substrate of the N-type transistor and shorting the deep N-well and source of the N-type transistor to the same floating potential (i.e., the first power supply), the forward bias of the PN junction between the substrate and the source can be avoided, thereby preventing the parasitic diode from conducting and thus damaging the circuit function.

[0016] In conjunction with the first aspect, in one possible implementation, the first power supply is the digital power supply of the driving circuit.

[0017] Based on the above technical solution, the digital power supply is used to supply power to the digital circuit in the driving circuit. By reusing the digital power supply of the driving circuit, without adding additional circuit structure and external power supply, the voltage difference between the two ends of the branch where the red sub-pixel module and the first driving module are located can be reduced, thereby reducing the power consumption of the branch to a certain extent and reducing the power consumption of the integrated lamp driver chip.

[0018] In conjunction with the first aspect, in one possible implementation, the drive circuit further includes a second power supply terminal for connecting to an analog power supply for providing a second operating voltage to the drive circuit.

[0019] Based on the above technical solution, the analog power supply is used to supply power to the analog circuits in the drive circuit. The drive circuit can receive the second operating voltage required by the analog circuit through the second power supply terminal. That is, the drive circuit can receive different operating voltages through the first power supply terminal and the second power supply terminal respectively, thereby supplying power to the digital circuit and the analog circuit respectively, so that the drive circuit can work normally.

[0020] In conjunction with the first aspect, in one possible implementation, the second power supply and the analog power supply are the same power supply.

[0021] Based on the above technical solution, the analog power supply can provide a second operating voltage to the second power supply terminal of the driving circuit and a corresponding positive voltage to the pixel circuit. By reusing the analog power supply, the number of power supplies for the driving chip can be further reduced, thereby optimizing the circuit layout.

[0022] A second aspect of the embodiments of this application provides a display panel, the display panel including a plurality of coupled driver chips such as those provided in the first aspect or any implementation thereof, which are integrated lamp drivers.

[0023] A third aspect of the embodiments of this application provides a display device, the display device including a host and at least one display panel as provided in the second aspect, the host and the display panel being connected.

[0024] The descriptions of the second and third aspects in this application can be referenced to the detailed description of the first aspect; and the beneficial effects of the second and third aspects can be referenced to the analysis of the beneficial effects of the first aspect, which will not be repeated here. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in some embodiments of this application will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams.

[0026] Figure 1 This is a schematic diagram of the circuit topology of a driver chip that integrates lamp and driver functions.

[0027] Figure 2 This is a schematic diagram of the circuit topology of another type of integrated lamp driver chip.

[0028] Figure 3 This is a schematic diagram of the structure of a display device provided in an embodiment of this application;

[0029] Figure 4 This is a schematic diagram of another display device provided in an embodiment of this application;

[0030] Figure 5 This is a schematic diagram of the structure of another display device provided in an embodiment of this application;

[0031] Figure 6 A schematic diagram of the circuit topology of a driver chip that integrates lamp and driver functions, provided for an embodiment of this application;

[0032] Figure 7 A schematic diagram of the circuit topology of another integrated lamp driver chip provided in an embodiment of this application;

[0033] Figure 8 A schematic diagram of the circuit topology of another integrated lamp driver chip provided in this application embodiment;

[0034] Figure 9A circuit topology diagram of a driving unit provided in an embodiment of this application;

[0035] Figure 10 This is a schematic diagram of the structure of a driving unit provided in an embodiment of this application;

[0036] Figure 11 A schematic diagram of the circuit topology of the first driving module provided in the embodiments of this application;

[0037] Figure 12 This is a schematic diagram of the structure of the first driving module provided in an embodiment of this application.

[0038] Figure label:

[0039] 100 - Integrated lamp driver chip, 110 - Driver circuit, 1000 - Display device, 1100 - Display panel, 1200 - Main unit, 111 - First driver module, 112 - Second driver module, 1121 - First driver unit, 1122 - Second driver unit, 120 - Pixel circuit, 121 - First sub-pixel module, 122 - Second sub-pixel module, 111a - First switch sub-module, 111b - First current control sub-module, 1121a - Second switch sub-module, 1121b - Second current control sub-module, 1122a - Third switch sub-module, 1122b - Third current control sub-module. Detailed Implementation

[0040] The technical solutions in some embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application are within the scope of protection of this application.

[0041] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this application. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific feature, structure, material, or characteristic may be included in any suitable manner in any one or more embodiments or examples.

[0042] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this application, unless otherwise stated, "a plurality of" means two or more.

[0043] The terms "coupled" and "connected," and their derivative expressions, may be used in describing some embodiments. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0044] In this application, terms such as “lower,” “below,” “above,” and “upper” are used to explain the relationships between components shown in the accompanying drawings. The terms may be relative concepts and described based on the directions shown in the drawings, or based on the sequence of process steps, but are not limited thereto.

[0045] Before introducing the embodiments of this application, the background technology involved in this application will be described first.

[0046] Direct view LED refers to a technology that uses surface LED arrays directly as display pixels, eliminating the backlight structure of traditional liquid crystal display (LCD) panels. Each pixel module (or pixel circuit, or simply pixel) includes three types of sub-pixels: red (R), green (G), and blue (B). Color and brightness are adjusted by controlling the on / off state and brightness of the corresponding sub-pixels. It should be noted that the inclusion of red, green, and blue sub-pixels in the pixel module in this embodiment is merely an example and is not limited to this in practice.

[0047] In the existing LED direct-view display technology field, scanning driving is commonly used to achieve image display. Taking a typical 16-scan display as an example, its driving architecture allows only one scan area of ​​LEDs to be in an emitting state at any given time, while the remaining 15 scan areas are in a non-emitting state. This technology essentially relies on the time-division multiplexing mechanism of the driving chip, that is, a single driving chip controls the LEDs of different scanning areas sequentially through timing switching, thereby achieving sequential refresh of the entire screen image. This type of architecture is usually classified as PM driving, and its circuit design has the following defects due to its multiplexing characteristics: On the one hand, the alternating timing switching of the driving signal is prone to causing signal coupling effects between adjacent scanning lines, resulting in ghosting, afterimages, or "caterpillar"-like abnormal display phenomena in the displayed image, seriously affecting the uniformity and reliability of the display; on the other hand, due to the forced scanning refresh mechanism of the time-division multiplexing principle, the screen as a whole has a significant low-frequency flicker problem, especially in low brightness or high contrast scenarios, the human eye's perception of flicker is further amplified, reducing visual comfort.

[0048] In recent years, with the increasing demand for upgrades in display technology, more and more emerging technologies are inclined to use AM (Ambidextrous) drivers. The core feature of AM drivers is that each LED is equipped with an independent and dedicated driver chip, eliminating the need for scanning multiplexing and thus avoiding signal coupling and screen flicker issues. Based on this, a "lamp-driver integration" technical solution has emerged, which encapsulates the micro-driver chip and the LED light-emitting device together to form an LED bead with independent driving function. This LED bead is then assembled onto a PCB substrate using standardized soldering processes. In this way, the functional characteristics of AM drivers can be achieved without reconstructing the overall architecture of traditional display modules.

[0049] Figure 1 An example of a driver chip that integrates lamp and driver functions is presented. For example... Figure 1 As shown, the integrated lamp driver chip includes a driver circuit and a pixel circuit. Figure 1 The following example illustrates the concept of a driving circuit comprising three driving modules and a pixel circuit comprising three sub-pixel modules. These three sub-pixel modules are the red sub-pixel module (or simply the R sub-pixel module), the green sub-pixel module (or simply the G sub-pixel module), and the blue sub-pixel module (or simply the B sub-pixel module). Figure 1 In this designation, "R" represents the R subpixel module, "G" represents the G subpixel module, and "B" represents the B subpixel module. The driving circuit is an active circuit, used to receive operating voltages from both the digital power supply DVDD and the analog power supply AVDD. For example, the first power supply terminal of the driving circuit is connected to the digital power supply DVDD to receive the operating voltage provided by the DVDD to the digital circuitry, and the second power supply terminal is connected to the analog power supply AVDD to receive the operating voltage provided by the AVDD to the analog circuitry.

[0050] For example, with Figure 1 Taking the direction shown as an example, located in Figure 1 One of the driving modules in the upper middle section is used to drive the R sub-pixel module, located in Figure 1 One of the middle driver modules is used to drive the G sub-pixel module, located in Figure 1 A driving module at the bottom center drives the B sub-pixel module. The anode of the R sub-pixel module is connected to the power supply VR via a pin, while the anodes of the B and G sub-pixel modules are connected to the power supply VGB via another pin. Power supply VR supplies power to the anode of the R sub-pixel module, and power supply VGB supplies power to the anodes of the B and G sub-pixel modules. The voltages of power supply VR and VGB are different; for example, power supply VR ranges from 2.8V to 3.2V, while power supply VGB ranges from 3.8V to 4.2V. This is because the R sub-pixel module typically uses gallium arsenide phosphide (GaAsP), which has a smaller band gap and requires a lower forward voltage to excite electron transitions and emit light. In contrast, the B and G sub-pixel modules use gallium nitride (GaN) or indium gallium nitride (InGaN), which have a larger band gap and require a higher forward voltage to excite electron transitions and emit light.

[0051] Due to the physical constraints of LED package size, the usable area of ​​the integrated lamp driver chip is relatively small, typically less than 1% of that of a traditional PM driver chip. The design and layout of the driver circuit must be completed within this extremely limited space, placing higher demands on the integration of the driver circuit. For example... Figure 2 As shown, the circuit layout can be optimized by reducing the number of LED pins or the number of power supplies. For example, the anodes of the R sub-pixel module, B sub-pixel module, and G sub-pixel module can be connected to the power supply VGB through a single pin. However, when the R, B, and G sub-pixel modules share a single power supply VGB, the branch containing the R sub-pixel module will experience increased power consumption due to excessive voltage difference, potentially leading to overcurrent and damage to the R sub-pixel module.

[0052] In view of this, embodiments of this application provide a driver chip, display panel, and display device that integrates lamp and driver functions, thereby reducing the power consumption of the branch where the R sub-pixel module is located while reducing the number of LED pins and the number of power supplies, thus reducing the power consumption of the driver chip that integrates lamp and driver functions.

[0053] The following is combined Figures 3 to 5 The application scenarios of this integrated lamp driver chip are explained.

[0054] Figure 3An example of a display device provided in an embodiment of this application is illustrated. The display device 1000 can be any device for displaying moving (e.g., video), fixed (e.g., still image), text, or images.

[0055] For example, see Figure 3 and Figure 4 The display device 1000 can be any product or component with display function, such as electronic billboards, shopping mall displays, signs, televisions, computers, in-flight displays, in-vehicle displays, clocks, virtual reality (VR) devices, augmented reality (AR) devices, etc.

[0056] Depending on the application scenario, the display device 1000 can be a flat display device or a curved display device, and the shape of the display surface of the display device 1000 can be any one of a circle, an ellipse, a polygon, or an irregular shape.

[0057] For example, such as Figure 3 As shown, the display device 1000 can be a flat panel display device; for example, the display device 1000 can be... Figure 3 The electronic billboard shown. For example, such as... Figure 4 As shown, the display device 1000 can be a curved display device; for example, the display device 1000 can be... Figure 4 The wave-shaped curved surface display device shown.

[0058] In some embodiments, see Figures 3 to 5 The display device 1000 may include one or more display panels 1100. The number of display panels 1100 can be set as needed. Figure 3 and Figure 4 The following example uses four display panels 1100 for illustration. The integrated lamp driver chip provided in this embodiment can be applied to the display panel 1100.

[0059] For further details, please refer to [link / reference]. Figure 5 The display device 1000 may further include a host 1200, with the display panel 1100 connected to the host 1200. The host 1200 controls the display panel 1100 to display data, enabling functions such as video splicing and synchronized playback. The host 1200 may be an electronic device such as a display controller, timing controller, TV box, server, mobile phone, or tablet; this application embodiment does not specifically limit its capabilities.

[0060] For example, when the display device 1000 includes a plurality of display panels 1100, each display panel 1100 can display a portion of the image when displaying an image. The images displayed by each display panel 1100 can be stitched together to form the complete content of the image, thereby achieving a larger screen effect and providing users with a better visual experience.

[0061] The following is combined Figures 6 to 12 The present application provides a detailed description of the integrated lamp driver chip provided in the embodiments.

[0062] In some embodiments, such as Figure 6 and Figure 7 As shown, the integrated lamp driver chip 100 provided in this embodiment includes N pixel circuits 120 and a driver circuit 110 for driving the N pixel circuits 120, where N is a positive integer. For example, the value of N can be a positive integer such as 1, 2, 3, 4, 8, or 9. For example, Figure 6 The structure of the integrated lamp driver chip 100 is shown in the example when N=1. Figure 7 The structure of the integrated lamp driver chip 100 is shown in the example when N=4.

[0063] The first power supply terminal of the drive circuit 110 is used to connect to the first power supply DVDD, which provides the first operating voltage required for the drive circuit 110 to operate.

[0064] In some embodiments, each of the N pixel circuits 120 includes a first sub-pixel module 121 and a second sub-pixel module 122. The first sub-pixel module 121 includes at least one red sub-pixel module, and the second sub-pixel module 122 includes at least one of a green sub-pixel module, a blue sub-pixel module, and a white sub-pixel module. Optionally, the pixel circuit 120 may include more or fewer sub-pixel modules, and this embodiment does not specifically limit this.

[0065] In one example, the first sub-pixel module 121 includes a red sub-pixel module, and the second sub-pixel module 122 includes a green sub-pixel module and a blue sub-pixel module. Then the pixel circuit 120 includes a total of three sub-pixel modules: a red sub-pixel module, a green sub-pixel module, and a blue sub-pixel module.

[0066] In another example, the first sub-pixel module 121 includes two red sub-pixel modules, and the second sub-pixel module 122 includes a green sub-pixel module and a blue sub-pixel module. Then the pixel circuit 120 includes a total of four sub-pixel modules: red sub-pixel module, green sub-pixel module, and blue sub-pixel module.

[0067] In another example, the first sub-pixel module 121 includes a red sub-pixel module, and the second sub-pixel module 122 includes a green sub-pixel module, a blue sub-pixel module, and a white sub-pixel module. Then the pixel circuit 120 includes a total of four sub-pixel modules: a red sub-pixel module, a green sub-pixel module, a blue sub-pixel module, and a white sub-pixel module.

[0068] The driving circuit 110 includes N first driving modules 111 and N second driving modules 112. The first driving modules 111 drive first sub-pixel modules 121, and the second driving modules 112 drive second sub-pixel modules 122. The number of first driving modules 111 and second driving modules 112 is related to the number of pixel circuits 120. For example, as... Figure 6 As shown, when the integrated lamp driver chip 100 includes a pixel circuit 120, the driver circuit 110 includes a first driver module 111 and a second driver module 112. For example, as... Figure 7 As shown, when the integrated lamp driver chip 100 includes four pixel circuits 120, the driver circuit 110 includes four first driver modules 111 and four second driver modules 112.

[0069] In some embodiments, the input terminal of the first sub-pixel module 121 and the input terminal of the second sub-pixel module 122 are both used to connect to the second power supply VGB. The output terminal of the first sub-pixel module 121 is used to connect to the first power supply DVDD through the first driving module 111. The output terminal of the second sub-pixel module 122 is grounded through the second driving module 112. The voltage of the first power supply DVDD is less than the voltage of the second power supply VGB.

[0070] The following combination Figure 6 and Figure 7 The specific connection relationships within the integrated lamp driver chip 100 provided in this application embodiment are further explained. For ease of description and understanding, the accompanying drawings provided in this application embodiment illustrate the pixel circuit 120 as including three sub-pixel modules: a red sub-pixel module, a green sub-pixel module, and a blue sub-pixel module. For example, the red sub-pixel module is the R sub-pixel module, denoted by "R"; the green sub-pixel module is the G sub-pixel module, denoted by "G"; and the blue sub-pixel module is the B sub-pixel module, denoted by "B".

[0071] In one embodiment, see Figure 6The driving circuit 110 includes a first driving module 111 and a second driving module 112, and the pixel circuit 120 includes a first sub-pixel module 121 and a second sub-pixel module 122. The first sub-pixel module 121 includes a red sub-pixel module, and the second sub-pixel module 122 includes a green sub-pixel module and a blue sub-pixel module. The first driving module 111 drives the red sub-pixel module, and the second driving module 112 includes two driving units: the first driving unit 1121 drives the green sub-pixel module, and the second driving unit 1122 drives the blue sub-pixel module.

[0072] The input terminals of the red sub-pixel module, the green sub-pixel module, and the blue sub-pixel module are all used to connect to the second power supply VGB. The output terminal of the red sub-pixel module is used to connect to the first power supply DVDD through the first driving module 111. The output terminal of the green sub-pixel module is grounded through the first driving unit 1121, and the output terminal of the blue sub-pixel module is grounded through the second driving unit 1122. The voltage of the first power supply DVDD is lower than the voltage of the second power supply VGB.

[0073] For example, the red, green, and blue sub-pixel modules are all light-emitting devices, such as light-emitting diodes (LEDs). The input terminals of the red, green, and blue sub-pixel modules are all anodes of the LEDs, and the output terminals of the red, green, and blue sub-pixel modules are all cathodes of the LEDs. Figure 6 As shown, the anodes of multiple light-emitting diodes are all connected to the second power supply VGB, forming a common-anode driving architecture. In this way, under the drive of the corresponding driving module, the second power supply VGB can provide driving current to each light-emitting diode to drive the corresponding light-emitting diode to emit light.

[0074] Specifically, the red sub-pixel module and the first driving module 111 form a first branch. The input terminal of the first branch is connected to the second power supply VGB, and the output terminal of the first branch is connected to the first power supply DVDD. The voltage of the first power supply DVDD is less than the voltage of the second power supply VGB. When the first driving module 111 drives the red sub-pixel module to emit light, the voltage difference across the first branch is equal to the voltage difference between the second power supply VGB and the first power supply DVDD. Similarly, the green sub-pixel module and the first driving unit 1121 form a second branch. The input terminal of the second branch is connected to the second power supply VGB, and the output terminal of the second branch is grounded. The blue sub-pixel module and the second driving unit 1122 form a third branch. The input terminal of the third branch is connected to the second power supply VGB, and the output terminal of the third branch is grounded. When the first driving unit 1121 drives the green sub-pixel module to emit light, the voltage difference across the second branch is equal to the voltage difference between the second power supply VGB and the ground terminal. When the second driving unit 1122 drives the blue sub-pixel module to emit light, the voltage difference across the third branch is equal to the voltage difference between the second power supply VGB and the ground terminal.

[0075] As can be seen from the above, in the integrated lamp driver chip 100 provided in this application embodiment, when the first sub-pixel module 121 and the second sub-pixel module 122 are powered by the same power supply (i.e., the second power supply VGB), connecting one end of the first driver module 111 to the first power supply DVDD can raise the voltage at one end of the first driver module 111, making the voltage difference between the red sub-pixel module and the two ends of the branch where the first driver module 111 is located smaller. This can reduce the power consumption of the branch to a certain extent, thereby reducing the power consumption of the integrated lamp driver chip 100. Furthermore, the voltage of the first power supply DVDD is lower than the voltage of the second power supply VGB, allowing the red sub-pixel module to be normally driven to emit light by the first driver module 111 under the action of the forward voltage difference, avoiding device breakdown due to reverse voltage. Furthermore, in this embodiment, the first power supply DVDD serves as the power supply for the driving circuit 110. Regardless of whether one end of the first driving module 111 is connected to the first power supply DVDD, the first power supply DVDD must provide a first operating voltage to the driving circuit 110 through the first power supply terminal of the driving circuit 110 to ensure the normal operation of the driving circuit 110. Compared with the prior art, which uses two different power supplies to power three different sub-pixel modules, the integrated lamp-driver chip 100 provided in this embodiment can reduce the number of externally connected power supplies and the number of pins connected to the power supplies by reusing the first power supply DVDD. Therefore, the integrated lamp-driver chip 100 provided in this embodiment, with limited driving chip area, can not only simplify the circuit layout by reducing the number of pins and power supplies in the pixel circuit 120, but also reduce the power consumption of the branch where the red sub-pixel module is located, thereby reducing the power consumption of the integrated lamp-driver chip 100.

[0076] In one embodiment, such as Figure 6 As shown, the first power supply DVDD is a digital power supply for the drive circuit 110. For example, the voltage of this digital power supply is greater than or equal to 0.6V and less than or equal to 1.8V.

[0077] The digital power supply provides the first operating voltage required for the digital circuit to operate to the first power supply terminal of the driver circuit 110. The voltage of this digital power supply is related to the chip manufacturing process of the driver chip; the finer the chip manufacturing process, the lower the voltage of the digital power supply, and vice versa. For example, if the chip manufacturing process is 14nm, the digital power supply voltage can be 1.0V to 1.8V; if the chip manufacturing process is 10nm, the digital power supply voltage can be 0.9V to 1.2V; and if the chip manufacturing process is 7nm, the digital power supply voltage can be 0.6V to 1V.

[0078] In one embodiment, the drive circuit 110 further includes a second power supply terminal for connecting to an analog power supply AVDD, which provides a second operating voltage to the drive circuit 110. For example, the second operating voltage is the operating voltage required for the analog circuit to operate.

[0079] In one example, when the second operating voltage and the second power supply VGB are mismatched, the second power supply VGB and the analog power supply AVDD are different power supplies. For example, if the voltage range of the second power supply VGB is 3.8V to 4.2V, and the second operating voltage is greater than 5V, the output voltage of the analog power supply cannot simultaneously meet the needs of the second operating voltage and the power supply voltage of the pixel circuit 120. That is, the second power supply VGB and the analog voltage need to be set separately.

[0080] In another example, such as Figure 6 As shown, when the second operating voltage matches the voltage of the second power supply VGB, the second power supply VGB and the analog power supply can be the same power supply. If the voltage range of the second operating voltage can cover the voltage range of the second power supply VGB, the voltage output of the analog power supply can be adjusted to the voltage range of the second power supply VGB, so that the analog power supply can provide the second operating voltage to the second power supply terminal of the driving circuit 110 and also provide the corresponding positive voltage to the pixel circuit 120. For example, if the voltage range of the second power supply VGB includes 3.8V to 4.2V, and the minimum value of the second operating voltage is less than or equal to 3.8V and the maximum value is greater than or equal to 4.2V, the voltage range of the analog power supply output can be adjusted to 3.8V to 4.2V to further reduce the number of power supplies required for the driving chip. This application embodiment uses the example of the second power supply VGB and the analog power supply AVDD being the same power supply for illustration.

[0081] In another embodiment, such as Figure 7 As shown, the integrated lamp driver chip 100 can integrate N pixel circuits 120 and a driver circuit 110 for driving the N pixel circuits 120. This is an example and not a limitation. Figure 7 The following explanation uses an example of a driver chip 100 with N=4, which includes 4 pixel circuits 120.

[0082] For example, each of the four pixel circuits 120 includes one red sub-pixel module, one green sub-pixel module, and one blue sub-pixel module. The driving circuit 110 includes four first driving modules 111 and four second driving modules 112, wherein each second driving module 112 includes a first driving unit 1121 and a second driving unit 1122. The input terminal (i.e., anode) of each sub-pixel module is connected to the second power supply VGB (or analog power supply AVDD). The output terminal of each red sub-pixel module is connected to the first power supply DVDD through the corresponding first driving module 111. The output terminal of each green sub-pixel module is grounded through the corresponding first driving unit 1121, and the output terminal of each blue sub-pixel module is grounded through the corresponding second driving unit 1122.

[0083] like Figure 7 As shown, when multiple sub-pixel modules and corresponding multiple driving modules are integrated in the lamp-driver integrated chip 100, the driving circuit 110 can have more branches and output channels without increasing the number of power supplies.

[0084] Figure 8 The example illustrates the structure of another integrated lamp driver chip 100, such as... Figure 8 As shown, the first driving module 111, the first driving unit 1121, and the second driving unit 1122 each include a switching submodule and a current control submodule. The switching submodule controls whether the corresponding subpixel module is turned on or off, i.e., whether the subpixel module emits light. The current control submodule controls the magnitude of the current passing through the corresponding subpixel module, i.e., controls the brightness of the subpixel module.

[0085] For ease of description, the following example is used: the first drive module 111 includes a first switch submodule 111a and a first current control submodule 111b; the first drive unit 1121 includes a second switch submodule 1121a and a second current control submodule 1121b; and the second drive unit 1122 includes a third switch submodule 1122a and a third current control submodule 1122b.

[0086] In one embodiment, the first driving module 111 includes at least one first switching submodule 111a and at least one first current control submodule 111b. The output terminal of the first subpixel module 121 is connected to a first terminal of the first current control submodule 111b, and the second terminal of the first current control submodule 111b is connected to a first power supply via the first switching submodule 111a. Alternatively, the output terminal of the first subpixel module 121 is connected to a first terminal of the first switching submodule 111a, and the second terminal of the first switching submodule 111a is connected to a first power supply via the first current control submodule 111b.

[0087] The number of first switch submodules 111a and first current control submodules 111b is related to the number of red subpixel modules in the first subpixel module 121. When the first subpixel module 121 includes multiple red subpixel modules, the first driving module 111 also includes multiple first switch submodules 111a and first current control submodules 111b of the same number, which are respectively connected to the red subpixel modules. For example, when the first subpixel module 121 includes two red subpixel modules, the first driving module 111 also includes two first switch submodules 111a and two first current control submodules 111b, and the first switch submodules 111a and the first current control submodules are respectively connected to the red subpixel modules.

[0088] Furthermore, the connection relationship between the switch submodule and the current control submodule is not unique. The first sub-pixel module 121 can be connected to the first switch submodule 111a, the first current submodule, and the first power supply DVDD in sequence. Alternatively, the first sub-pixel module 121 can be connected to the first current submodule, the first switch submodule 111a, and the first power supply DVDD in sequence. This application embodiment does not specifically limit this.

[0089] This is an example, not a limitation. Figure 8 The following is an example illustrating the first sub-pixel module 121, which includes a red sub-pixel module, and the first driving module 111, which includes a first switch sub-module 111a and a first current control sub-module 111b.

[0090] like Figure 8 As shown, the first drive module 111 includes a first switch submodule 111a and a first current control submodule 111b; the output terminal of the red subpixel module is connected to the first terminal of the first current control submodule 111b, and the second terminal of the first current control submodule 111b is connected to the first power supply DVDD through the first switch submodule 111a.

[0091] The output terminal of the green sub-pixel module is connected to the first terminal of the second current control sub-module 1121b, and the second terminal of the second current control sub-module 1121b is grounded through the second switch sub-module 1121a; the output terminal of the blue sub-pixel module is connected to the first terminal of the third current control sub-module 1122b, and the second terminal of the third current control sub-module 1122b is grounded through the third switch sub-module 1122a.

[0092] Figure 9 A circuit topology for a driving unit is illustrated. This driving unit can be either the first driving unit 1121 or the second driving unit 1122.

[0093] The following description uses the first driving unit 1121 as an example. The second current control submodule 1121b is a P-type transistor, such as a PMOS transistor, and the second switching submodule 1121a is an N-type transistor, such as an NMOS transistor.

[0094] Specifically, the source (s) of the PMOS transistor is connected to the cathode of the LED, the gate (g) of the PMOS transistor receives a current control signal, the drain (d) of the PMOS transistor is connected to the drain (d) of the NMOS transistor, the gate (g) of the NMOS transistor receives a switching signal, and the source (s) of the NMOS transistor is grounded. The current control signal indicates the magnitude of the current flowing through the PMOS transistor, which in turn indicates the magnitude of the current flowing through the LED, thereby controlling the brightness of the LED. The switching signal indicates whether the NMOS transistor is on or off, and consequently, whether the LED is on or off.

[0095] in, Figure 9 In this context, 'b' represents the substrate (Bulk) of the MOSFET. In practical applications, the 'b' terminal is often connected to a fixed potential (e.g., the 'b' terminal in an NMOS transistor is grounded, and the 'b' terminal in a PMOS transistor is shorted to the source 's') to form a reverse bias, thereby preventing parasitic diodes from conducting.

[0096] Figure 10 Example Figure 9 The structure of the drive unit. For example... Figure 10As shown, the PMOS and NMOS transistors in the driving unit are formed on a p-type substrate. On the left side of the p-type substrate, from left to right, there are a p+ injection region (or doped region), an n+ injection region, and an n+ injection region. The p+ injection region forms the b-terminal of the NMOS transistor. The first n+ injection region forms the source (s) of the NMOS transistor, and the second n+ injection region forms the drain (d). The source (s) and drain (d) of the NMOS transistor are connected through a gate (g). On the right side of the p-type substrate, between it and the p-type substrate, there is an n-well to isolate the b-terminal, source (s), and drain (d) of the PMOS transistor from the p-type substrate. In this n-well, from left to right, there are a p+ injection region, a p+ injection region, and an n+ injection region. The first p+ injection region forms the drain (d) of the PMOS transistor, the second p+ injection region forms the source (s), and the n+ injection region forms the b-terminal of the PMOS transistor. The source (s) and drain (d) of the PMOS transistor are connected through a gate (g).

[0097] like Figure 10 As shown, in the structure of an NMOS transistor, the b-terminal of the NMOS transistor can form a PN junction with the source s. Grounding the b-terminal and the source s can ensure that the parasitic diode is reverse biased, thereby avoiding leakage current.

[0098] If the base (b) terminal and source (s) of the NMOS transistor are connected to a non-zero potential, the forward bias of the PN junction will conduct the parasitic diode, thereby disrupting the normal operation of the device. In this embodiment, to reduce the power consumption of the branch containing the red sub-pixel module, the source of the NMOS transistor needs to be connected to the first power supply DVDD, i.e., the source (s) is connected to a non-zero potential. Therefore, to avoid the NMOS transistor becoming forward biased and thus conducting the parasitic diode, the transistor structure in the first driving module 111 is different from the transistor structure in the first driving unit 1121 and the transistor structure in the second driving unit 1122.

[0099] In one embodiment, the first current control submodule 111b includes a first transistor, and the first switching submodule 111a includes a second transistor. The control terminal of the first transistor is used to receive a current control signal, and the control terminal of the second transistor is used to receive a switching signal. Specifically, the first terminal of the first transistor is connected to the output terminal of the first sub-pixel module 121, and the second terminal of the first transistor is connected to the first terminal of the second transistor; the second terminal of the second transistor is used to connect to the first power supply DVDD. Alternatively, the first terminal of the second transistor is connected to the output terminal of the first sub-pixel module 121, and the second terminal of the second transistor is connected to the first terminal of the first transistor; the second terminal of the first transistor is used to connect to the first power supply DVDD.

[0100] The functions of the current control signal and the switching signal are the same as those of the current control signal and the switching signal in the first drive unit 1121 mentioned above, and will not be repeated here.

[0101] In the first example, when the first end of the first transistor is connected to the output end of the first sub-pixel module 121, the first transistor is a P-type transistor and the second transistor is an N-type transistor with a deep N well.

[0102] In the second example, when the first end of the second transistor is connected to the output end of the first sub-pixel module 121, the second transistor is a P-type transistor and the first transistor is an N-type transistor with a deep N well.

[0103] Based on this, in the embodiments of the present application, the functions of the P-type transistor and the N-type transistor can be interchanged. That is, the gate of the PMOS transistor can be used to receive a current control signal, the gate of the NMOS transistor can be used to receive a switching signal, or the gate of the PMOS transistor can be used to receive a switching signal, and the gate of the NMOS transistor can be used to receive a current control signal. The embodiments of the present application do not make specific limitations in this regard.

[0104] As an example but not a limitation, Figure 11 the above-mentioned first transistor is taken as a PMOS transistor and the second transistor is taken as an NMOS transistor for illustration. Figure 11 The connection manner of the PMOS transistor in Figure 9 is the same as that of the PMOS transistor in the above

[0105] such as Figure 11 shown, the second transistor provided in the embodiments of the present application is an N-type transistor with a deep N well. The deep N well is used to connect to the first power supply DVDD. In this way, through the deep well isolation technology, the potentials of the b end and the source s of the NMOS transistor can be made independent of each other. The b end of the NMOS transistor is grounded, and the deep N well DNW and the source s are shorted to the same floating potential (i.e., the first power supply DVDD), thereby avoiding the forward biasing of the PN junction between the b end and the source s.

[0106] In Figure 11 DNW is used to represent the deep N well. Compared with Figure 9 in Figure 11 the deep N well DNW of the NMOS transistor in

[0107] Refer to Figure 12In the first driving module 111, the PMOS and NMOS transistors are formed on a p-type substrate. The NMOS transistor is formed on the left side of the p-type substrate, including a deep n-well and a p-well formed within the deep n-well. The deep n-well is used to form the DNW and isolate the p-well from the p-type substrate. In the p-well, from left to right, there are a p+ injection region, an n+ injection region, and an n+ injection region. The p+ injection region is used to form the b-terminal of the NMOS transistor, the first n+ injection region is used to form the source (s) of the NMOS transistor, and the second n+ injection region is used to form the drain (d) of the NMOS transistor. The source (s) and drain (d) of the NMOS transistor are connected through the gate (g). On the right side of the p-type substrate, there is also an n-well between it and the p-type substrate, which is used to isolate the b-terminal, source s, and drain d of the PMOS transistor from the p-type substrate. In the n-well, from left to right, there are p+ injection regions, p+ injection regions, and n+ injection regions. The first p+ injection region is used to form the drain d of the PMOS transistor, the second p+ injection region is used to form the source s of the PMOS transistor, and the n+ injection region is used to form the b-terminal of the PMOS transistor. The source s and drain d of the PMOS transistor are connected through the gate g.

[0108] This application embodiment also provides a display panel, which includes a plurality of coupled lamp-driver integrated chips; optionally, the plurality of lamp-driver integrated chips can be arrayed or arranged. The structure of the display panel can be referred to the above. Figures 3 to 5 The display panel 1100 shown in any of the attached figures. The integrated lamp driver chip can be referenced from the above. Figures 6 to 8 The lamp driver integrated driver chip 100 shown in any of the attached figures.

[0109] This application also provides a display device, which includes a host and at least one display panel, the host and the display panel being connected. The structure of the display device can be referred to the above description. Figures 3 to 5 The display device 1000 shown in any of the attached figures.

[0110] The detailed description of the integrated lamp driver chip 100 and the analysis of its beneficial effects described above can be applied to display panels and display devices, and will not be repeated here in the embodiments of this application.

[0111] In the description of this specification, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0112] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A driver chip that integrates lamp and driver functions, characterized in that, include: N pixel circuits and a driving circuit for driving the N pixel circuits, wherein N is a positive integer; The first power supply terminal of the drive circuit is used to connect to a first power supply, and the first power supply is used to provide a first operating voltage to the drive circuit. Each of the N pixel circuits includes a first sub-pixel module and a second sub-pixel module. The first sub-pixel module includes at least one red sub-pixel module, and the second sub-pixel module includes at least one of a green sub-pixel module, a blue sub-pixel module, and a white sub-pixel module. The driving circuit includes N first driving modules and N second driving modules. The input terminals of the first sub-pixel module and the second sub-pixel module are both used to connect to the second power supply. The output terminal of the first sub-pixel module is used to connect to the first power supply through the first driving module. The output terminal of the second sub-pixel module is grounded through the second driving module. The voltage of the first power supply is less than the voltage of the second power supply.

2. The driving chip according to claim 1, characterized in that, The first drive module includes at least one first switch submodule and at least one first current control submodule; The output terminal of the first sub-pixel module is connected to the first terminal of the first current control sub-module, and the second terminal of the first current control sub-module is connected to the first power supply through the first switch sub-module. Alternatively, the output terminal of the first sub-pixel module is connected to the first terminal of the first switch sub-module, and the second terminal of the first switch sub-module is connected to the first power supply through the first current control sub-module.

3. The driving chip according to claim 2, characterized in that, The first current control submodule includes a first transistor, and the first switch submodule includes a second transistor. The control terminal of the first transistor is used to receive a current control signal, and the control terminal of the second transistor is used to receive a switch signal. The first terminal of the first transistor is connected to the output terminal of the first sub-pixel module, the second terminal of the first transistor is connected to the first terminal of the second transistor, and the second terminal of the second transistor is used to connect to the first power supply. Alternatively, the first terminal of the second transistor is connected to the output terminal of the first sub-pixel module, the second terminal of the second transistor is connected to the first terminal of the first transistor, and the second terminal of the first transistor is used to connect to the first power supply.

4. The driver chip according to claim 3, characterized in that, When the first terminal of the first transistor is connected to the output terminal of the first sub-pixel module, the first transistor is a P-type transistor and the second transistor is an N-type transistor with a deep N-well. Alternatively, if the first terminal of the second transistor is connected to the output terminal of the first sub-pixel module, the second transistor is a P-type transistor and the first transistor is an N-type transistor with a deep N-well.

5. The driving chip according to claim 4, characterized in that, The deep N-well is used to connect to the first power source.

6. The driver chip according to claim 1, characterized in that, The first power source is the digital power source of the driving circuit.

7. The drive chip according to any one of claims 1 to 6, characterized in that The driving circuit further includes a second power supply terminal, which is used to connect to an analog power supply, and the analog power supply is used to provide a second operating voltage to the driving circuit.

8. The driver chip according to claim 7, characterized in that, The second power supply and the simulated power supply are the same power supply.

9. A display panel, characterized by, The display panel includes multiple coupled driver chips as described in any one of claims 1-8.

10. A display device, characterized in that, It includes a host and at least one display panel as described in claim 9, wherein the host is connected to the display panel.