Display substrate, display panel and display device

Abstract

The application provides a display substrate, a display panel and a display device, relates to the technical field of display, and can reduce the luminance difference problem of different columns of pixels. The display substrate comprises: data lines extending along a first direction; gate lines extending along a second direction, the gate lines intersecting the data lines to form a pixel area; first semiconductor connecting parts and second semiconductor connecting parts, the orthographic projections of the first semiconductor connecting parts and the second semiconductor connecting parts on a substrate layer all overlap the orthographic projection of the gate lines on the substrate layer; first pixel electrodes and second pixel electrodes are arranged in the pixel area, the first semiconductor connecting parts are electrically connected to the first pixel electrodes through first electrode lead lines, the second semiconductor connecting parts are electrically connected to the second pixel electrodes through second electrode lead lines, the first semiconductor connecting parts and the second semiconductor connecting parts are connected to the same data line, the length of the first electrode lead lines along the second direction is less than the length of the second electrode lead lines along the second direction; the distance between the first electrode segments and the nearest gate lines is less than the distance between the second electrode segments and the nearest gate lines.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display substrate, display panel, and display device. Background Technology

[0002] As display technology continues to advance, the requirements for display panel display effects are also gradually increasing. Existing display substrates can typically control the voltage of pixel electrodes through data signals, thereby changing the luminous brightness of the pixels corresponding to those electrodes.

[0003] However, existing display substrates typically have a phenomenon where at least two columns of pixel electrodes are driven by a single data signal line. This causes different distances between the pixel electrodes in different columns and the data signal line, resulting in voltage differences between the pixel electrodes in different columns. Consequently, brightness differences exist between the pixels in different columns, causing "shaking lines" to appear on the display panel and affecting the stability of the displayed image, thus impacting the display panel's display performance. Summary of the Invention

[0004] The present application provides a display substrate, display panel, and display device that can solve the problem of voltage differences between different columns of pixel electrodes, which leads to differences in brightness between pixels in different columns, causing the display panel to have swivel patterns and affecting the stability of the displayed image and the display effect of the display panel, when at least two columns of pixel electrodes are driven by a single data signal line.

[0005] A first aspect of this application provides a display substrate, comprising:

[0006] Substrate layer;

[0007] Multiple data lines are disposed on one side of the substrate layer and extend along a first direction;

[0008] Multiple gate lines are disposed on the same side of the substrate layer, and the multiple gate lines extend along a second direction, wherein the first direction intersects the second direction, and the multiple gate lines and the multiple data lines intersect to form a pixel region;

[0009] A semiconductor layer, the semiconductor layer including a plurality of first semiconductor interconnects and a plurality of second semiconductor interconnects, wherein the orthogonal projections of the first semiconductor interconnects and the second semiconductor interconnects on the substrate layer overlap with the orthogonal projections of the gate lines on the substrate layer;

[0010] A first pixel electrode and a second pixel electrode are provided in the pixel area. The first semiconductor connection part is electrically connected to the first pixel electrode through a first electrode lead. The second semiconductor connection part is electrically connected to the second pixel electrode through a second electrode lead. Both the first semiconductor connection part and the second semiconductor connection part are electrically connected to the same data line. The length of the first electrode lead along the second direction is less than the length of the second electrode lead along the second direction.

[0011] Wherein, the distance between the first electrode segment and the nearest gate line is less than the distance between the second electrode segment and the nearest gate line, the first electrode segment is the first electrode lead extending in the second direction, and the second electrode segment is the second electrode lead extending in the second direction.

[0012] In some embodiments, in the first direction, two gate lines are provided between two adjacent rows of pixel regions, namely a first gate line and a second gate line.

[0013] The orthographic projection of the first semiconductor interconnect on the substrate overlaps with the orthographic projection of the first gate line on the substrate, and the orthographic projection of the second semiconductor interconnect on the substrate overlaps with the orthographic projection of the second gate line on the substrate;

[0014] The first semiconductor connection portion and the second semiconductor connection portion are respectively disposed on both sides of the pixel region.

[0015] In some embodiments, the gate line includes a first gate line segment, a second gate line segment, and a third gate line segment, wherein the first gate line segment and the first electrode segment are at least partially opposite each other in the first direction, the second gate line segment and the second electrode segment are at least partially opposite each other in the first direction, and the third gate line segment is disposed between the first gate line segment and the second gate line segment;

[0016] The distance between the first electrode segment and the first gate line segment is less than the distance between the second electrode segment and the second gate line segment.

[0017] In some embodiments, the size of the second gate segment in the first direction is smaller than the size of the first gate segment in the first direction.

[0018] In some embodiments, the dimension of the first gate segment in the first direction is larger than the dimension of the third gate segment in the first direction, and the dimension of the second gate segment in the first direction is smaller than the dimension of the third gate segment in the first direction; or,

[0019] The dimension of the first gate segment in the first direction is equal to the dimension of the third gate segment in the first direction, and the dimension of the second gate segment in the first direction is smaller than the dimension of the third gate segment in the first direction; or,

[0020] The size of the first gate segment in the first direction is greater than the size of the third gate segment in the first direction, and the size of the second gate segment in the first direction is equal to the size of the third gate segment in the first direction.

[0021] In some embodiments, the dimension of the second gate segment in the second direction is larger than the dimension of the second electrode segment in the second direction; and / or,

[0022] The size of the first gate segment in the second direction is larger than the size of the first electrode segment in the second direction.

[0023] In some embodiments, the size of the second gate segment in the second direction is equal to the size of the second pixel electrode in the second direction; and / or,

[0024] The size of the first gate segment in the second direction is equal to the size of the first pixel electrode in the second direction.

[0025] In some embodiments, the gate line includes a protrusion and a recess, wherein the protrusion is at least partially opposite to the second electrode segment in the first direction and protrudes in a direction away from the second pixel electrode, the recess is at least partially opposite to the first electrode segment in the second direction and recesses in a direction close to the first pixel electrode, and the protrusion and the recess are equal in size in the first direction.

[0026] In some embodiments, the recessed portion is larger in size in the second direction than the first electrode segment in the second direction; and / or,

[0027] The protrusion is larger in size in the second direction than the second electrode segment is in size in the second direction.

[0028] In some embodiments, the size of the recess in the second direction is equal to the size of the first pixel electrode in the second direction; and / or,

[0029] The size of the protrusion in the second direction is equal to the size of the second pixel electrode in the second direction.

[0030] In some implementations, the first pixel electrode and the second pixel electrode connected to the same data line have the same polarity.

[0031] In some embodiments, the distance between the first gate segment and the first pixel electrode is less than the distance between the second gate segment and the second pixel electrode.

[0032] In some implementations, the size of the first pixel electrode in the first direction is larger than the size of the second pixel electrode in the first direction.

[0033] A second aspect of this application provides a display panel, including:

[0034] Display substrate as described in any of the first aspects above;

[0035] A color filter substrate is disposed opposite to the display substrate;

[0036] A liquid crystal layer is disposed between the display substrate and the color filter substrate.

[0037] A third aspect of this application provides a display device, comprising:

[0038] The display substrate as described in any of the first aspects above; or...

[0039] The display panel as described in the second aspect above.

[0040] The display substrate provided in this application embodiment has a first pixel electrode and a second pixel electrode disposed in the pixel area formed by the intersection of gate lines and data lines. By adjusting the distance between the first electrode segment and the nearest gate line to be smaller than the distance between the second electrode segment and the nearest gate line, and when the length of the first electrode lead along the second direction is smaller than the length of the second electrode lead along the second direction, the distance between the second electrode lead with a larger overlapping area and the gate line is increased, thereby reducing the capacitance difference of the coupling capacitance formed between different electrode leads and the gate line. This reduces the voltage difference between the first pixel electrode and the second pixel electrode, reduces the brightness difference between the corresponding pixels of the first pixel electrode and the second pixel electrode, improves the stability of the display image, enhances the uniformity and accuracy of the display image, suppresses the head-shaking pattern of the display panel, and improves the display effect of the display panel. Attached Figure Description

[0041] To more clearly illustrate the technical solution of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1A schematic structural diagram of a conventional display substrate provided for embodiments of this application;

[0043] Figure 2 A relationship curve between pixel voltage and feedthrough voltage is provided for an embodiment of this application;

[0044] Figure 3 A schematic structural diagram of a display substrate provided in an embodiment of this application;

[0045] Figure 4 A schematic partial structural diagram of a display substrate provided in an embodiment of this application;

[0046] Figure 5 A schematic structural diagram of another display substrate provided in an embodiment of this application;

[0047] Figure 6 A schematic structural diagram of another display substrate provided in an embodiment of this application;

[0048] Figure 7 A schematic structural diagram of a display panel provided in an embodiment of this application;

[0049] Figure 8 A schematic structural diagram of a display device provided in an embodiment of this application;

[0050] Figure 9 A schematic structural diagram of another display device provided in an embodiment of this application. Detailed Implementation

[0051] The embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described below do not represent all embodiments consistent with this application. They are merely examples of systems and methods consistent with some aspects of this application as detailed in the claims. In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways, and the apparatus embodiments described below are merely exemplary.

[0052] In this application, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description of this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application. The positional relationships of the constituent elements may be appropriately changed depending on the direction in which the constituent elements are described. Therefore, the terminology used is not limited to those described in the specification and may be appropriately replaced as appropriate.

[0053] This application describes exemplary embodiments with reference to cross-sectional views and / or plan views as idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0054] As display technology continues to advance, the requirements for display panel display effects are also gradually increasing. Existing display substrates can typically control the voltage of pixel electrodes through data signals, thereby changing the luminous brightness of the pixels corresponding to those electrodes.

[0055] Taking liquid crystal display (LCD) substrates as an example, polarization occurs when liquid crystal molecules maintain the same polarity for a long time. Therefore, existing LCD substrates typically need to switch the polarity of the pixel electrodes to suppress the polarization of liquid crystal molecules, improve the display effect, and extend the lifespan of the display device. Existing display substrates usually drive two columns of pixel electrodes through a single data signal line, and control the voltage of different columns of pixel electrodes by connecting to different transistors.

[0056] For example, Figure 1 This is a schematic structural diagram of a conventional display substrate provided for embodiments of this application. For example... Figure 1As shown, the display substrate includes a substrate layer 100, multiple data lines 200, multiple gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The semiconductor layer 400 includes a first semiconductor connection portion 410 and a second semiconductor connection portion 420. The first semiconductor connection portion 410 is electrically connected to the first pixel electrode 510 via a first electrode lead 610 and to the data line 200 via a third electrode lead 710. The second semiconductor connection portion 420 is electrically connected to the second pixel electrode 520 via a second electrode lead 620 and to the data line 200 via a fourth electrode lead 720. The length of the first electrode lead 610 along the second direction is less than the length of the second electrode lead 620 along the second direction, and the length of the third electrode lead 710 along the second direction is less than the length of the fourth electrode lead 720 along the second direction. Here, Y represents the first direction, and X represents the second direction.

[0057] The capacitance formula can be used to:

[0058]

[0059] Calculate the capacitance between the two electrodes, where C is the capacitance between the two electrodes, and ε is the capacitance between the electrodes. r Let be the dielectric constant of the medium between the two electrodes, S be the overlapping area of ​​the two electrodes, k be the electrostatic constant, and d be the distance between the two electrodes. From the above formula, it can be seen that the overlapping area of ​​the two electrodes is positively correlated with the capacitance value, while the distance between the two electrodes is negatively correlated with the capacitance value. Therefore, the capacitance value of the first pixel electrode 510 will be less than the capacitance value of the second pixel electrode 520.

[0060] Furthermore, a feedthrough effect exists between the source / drain electrodes and the gate of the transistor, and the feedthrough voltage can be achieved through:

[0061]

[0062] Determine, where ΔV p C is the feed-through voltage of the pixel electrode. gs C is the coupling capacitance between the source or drain and the gate of a transistor. pg C' is the coupling capacitance between the gate of a transistor and the pixel electrode. pg C is the coupling capacitance between the other gate of the transistor and the pixel electrode. st For the coupling capacitor of the common voltage signal, C lc For the liquid crystal layer capacitor, C pd C' is the coupling capacitance between the data line electrically connected to the transistor and the pixel electrode.pd V is the coupling capacitance between the transistor-insulated and adjacent data line and the pixel electrode. gh V is the high-level signal when the gate is turned on. gl This is a low-level signal when the gate is off. It can be achieved through:

[0063] V pixel =V0-ΔV p (3)

[0064] Determine the voltage of each pixel electrode, where V pixel V is the voltage of the pixel electrode, and V0 is the theoretically achievable highest pixel voltage.

[0065] For example, Figure 2 This application provides a graph showing the relationship between pixel voltage and feedthrough voltage in an embodiment. Figure 2 As shown, the Gate signal controls the transistor to turn on in the high-level range to light up the corresponding pixel, and controls the transistor to turn off in the low-level range. V com For common voltage, V 0正 The highest pixel voltage theoretically achievable for a positive polarity pixel electrode is V. 0正 The voltage is greater than V com V 0负 The highest pixel voltage theoretically achievable for a negative polarity pixel electrode is V. 0负 The voltage is less than V com V pixel正 V is the actual voltage of the positive polarity pixel electrode. pixel负 V is the actual voltage of the negative polarity pixel electrode. pixel正 With V com The absolute value of the difference is used to control the brightness of the pixel corresponding to the positive polarity pixel electrode, V pixel负 With V com The absolute value of the difference is used to control the brightness of the pixel corresponding to the negative polarity pixel electrode, ΔV p正 The feedthrough voltage of the positive polarity pixel electrode, ΔV p正 For V 0正 With V pixel正 The voltage difference, ΔV p负 The feedthrough voltage of the negative polarity pixel electrode, ΔV p负 For V 0负 With V pixel负 The voltage difference. According to Figure 2 It can be seen that the pixel electrodes electrically connected to the same data signal line, when V0 is positive or V... 0负 Under the condition of equality, ΔV of each pixel electrode p正 or ΔV p负 The smaller the difference between the pixels, the smaller the brightness difference between the pixels, and the higher the stability of the displayed image.

[0066] Normally, the relative positions of each pixel electrode and the data line are fixed and identical, and the voltage of each pixel electrode is subject to C. pd With C' pd The effects are the same and will not cause a difference in feedthrough voltage. Therefore, the main factors affecting the pixel electrode voltage include the coupling capacitance C between the source or drain of the transistor and the gate. gs The coupling capacitance C between the gate of a transistor and the pixel electrode pg And the coupling capacitance C' between the transistor's other gate and the pixel electrode. pg .

[0067] refer to Figure 1 Compared to the second pixel electrode 520, which is farther away from the data line 200, the first pixel electrode 510, which is closer to the data line 200, has a shorter electrode lead length required to form an electrical connection, a smaller area overlapping with the gate line 300, and a smaller coupling capacitance C. gs It is also smaller, which in turn leads to a smaller voltage V at the first pixel electrode 510. pixel1 The voltage V greater than that of the second pixel electrode 520 pixel2 This creates a voltage difference between the two columns of pixel electrodes, resulting in a brightness difference between pixels in different columns. This causes the display panel to display swivel patterns, affecting the stability of the displayed image and the display effect of the display panel.

[0068] In view of this, embodiments of this application provide a display substrate, a display panel, and a display device, which can solve the problem that differences in voltage between different columns of pixel electrodes lead to differences in brightness between pixels in different columns, causing the display panel to display swivel patterns and affecting the stability of the displayed image and the display effect of the display panel, when at least two columns of pixel electrodes are driven by a single data signal line.

[0069] A first aspect of this application provides a display substrate, comprising: a substrate layer, multiple data lines, multiple gate lines, a first pixel electrode, a second pixel electrode, a semiconductor layer, a first electrode lead, and a second electrode lead. Multiple data lines are disposed on one side of the substrate layer, extending along a first direction Y; multiple gate lines are disposed on the same side of the substrate layer as the multiple data lines, extending along a second direction X, wherein the first direction Y intersects the second direction X, and the multiple gate lines intersect with the multiple data lines to form a pixel region; the semiconductor layer includes multiple first semiconductor connection portions and multiple second semiconductor connection portions, the orthographic projections of the first semiconductor connection portions and the second semiconductor connection portions on the substrate layer overlap with the orthographic projections of the gate lines on the substrate layer; a first pixel electrode and a second pixel electrode are disposed within the pixel region, the first semiconductor connection portions are electrically connected to the first pixel electrode via first electrode leads, the second semiconductor connection portions are electrically connected to the second pixel electrode via second electrode leads, both the first semiconductor connection portions and the second semiconductor connection portions are electrically connected to the same data line, the length of the first electrode lead along the second direction X is less than the length of the second electrode lead along the second direction X; wherein the distance between the first electrode segment and the nearest gate line is less than the distance between the second electrode segment and the nearest gate line, the first electrode segment is a first electrode lead extending in the second direction X, and the second electrode segment is a second electrode lead extending in the second direction X.

[0070] For example, Figure 3 This is a schematic structural diagram of a display substrate provided in an embodiment of this application. Figure 3As shown, the display substrate includes a substrate layer 100, multiple data lines 200, multiple gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The semiconductor layer 400 includes a first semiconductor connection portion 410 and a second semiconductor connection portion 420. The first semiconductor connection portion 410 is electrically connected to the first pixel electrode 510 via a first electrode lead 610 and to the data line 200 via a third electrode lead 710. The second semiconductor connection portion 420 is electrically connected to the second pixel electrode 520 via a second electrode lead 620 and to the data line 200 via a fourth electrode lead 720. The length of the third electrode lead 710 along the second direction X is less than the length of the fourth electrode lead 720 along the second direction X. The length L1 of the first electrode lead 610 along the second direction X is less than the length L2 of the second electrode lead 621 along the second direction X. The distance H1 between the first electrode segment 611 and the nearest gate line 300 is less than the distance H2 between the second electrode segment 621 and the nearest gate line 300. The first pixel electrode 510 is electrically connected to the data line 200 via a short connection, while the second pixel electrode 520 is electrically connected to the data line 200 via a long connection.

[0071] For example, the pixel color driven by each pixel electrode can be any one of red, green, or blue. The pixel colors driven by the first pixel electrode 510 and the second pixel electrode 520 within the same pixel region can be the same or different. The pixel colors driven by the first pixel electrode 510 and the second pixel electrode 520 in different pixel regions can be the same or different.

[0072] For example, the polarities of adjacent data lines 200 can be different to achieve column reversal of liquid crystal molecules corresponding to adjacent pixel areas, avoid liquid crystal molecule polarization, and extend the service life of the display panel.

[0073] For example, the difference between H1 and H2 can be determined based on at least one of the length difference between L1 and L2 in the second direction X, the length difference between the third electrode lead 710 extending in the second direction X and the fourth electrode lead 720 extending in the second direction X, and the difference between the distances between the third electrode lead 710 and the fourth electrode lead 720 and the nearest gate line 300, respectively.

[0074] The display substrate provided in this application embodiment has a first pixel electrode 510 and a second pixel electrode 520 disposed in the pixel area formed by the intersection of the gate line 300 and the data line 200. By adjusting the distance H1 between the first electrode segment 611 and the nearest gate line 300 to be less than the distance H2 between the second electrode segment 621 and the nearest gate line 300, and when the length L1 of the first electrode lead 610 along the second direction X is less than the length L2 of the second electrode lead 620 along the second direction X, the distance between the second electrode lead 620 with a larger overlapping area and the gate line 300 is increased, and the capacitance difference of the coupling capacitance formed between different electrode leads and the gate line 300 is reduced. This reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, reduces the brightness difference between the corresponding pixels of the first pixel electrode 510 and the second pixel electrode 520, improves the brightness uniformity and stability of the display screen, enhances the uniformity and accuracy of the display screen, suppresses the head-shaking pattern of the display panel, and improves the display effect of the display panel.

[0075] In some feasible implementations, in the first direction Y, two gate lines 300 are provided between two adjacent rows of pixel regions, namely the first gate line and the second gate line; the orthographic projection of the first semiconductor connection portion 410 on the substrate layer 100 overlaps with the orthographic projection of the first gate line on the substrate layer 100, and the orthographic projection of the second semiconductor connection portion 420 on the substrate layer 100 overlaps with the orthographic projection of the second gate line on the substrate layer 100; the first semiconductor connection portion 410 and the second semiconductor connection portion 420 are respectively provided on both sides of the pixel region.

[0076] For example, adjacent pixel electrodes can be electrically connected to different gate lines 300 respectively.

[0077] refer to Figure 3 The gate line 300 includes a first gate line 310 and a second gate line 320. A first gate line 310 and a second gate line 320 are disposed between two adjacent pixel regions, forming a dual gate drive between pixels in the same row. Compared with a single gate drive structure, this can reduce the cost of COF (Chip On Film) packaging.

[0078] In some feasible embodiments, the gate line 300 includes a first gate line segment, a second gate line segment, and a third gate line segment, wherein the first gate line segment is at least partially opposite to the first electrode segment 611 in the first direction Y, the second gate line segment is at least partially opposite to the second electrode segment 621 in the first direction Y, and the third gate line segment is disposed between the first gate line segment and the second gate line segment; the distance between the first electrode segment 611 and the first gate line segment is less than the distance between the second electrode segment 621 and the second gate line segment.

[0079] It should be noted that when the first gate line segment and the first electrode segment 611 are at least partially opposite each other in the first direction Y, the projection of the first gate line segment along the first direction Y onto the plane where the first electrode segment 611 is located overlaps with the first electrode segment 611 at least partially; when the second gate line segment and the second electrode segment 621 are at least partially opposite each other in the first direction Y, the projection of the second gate line segment along the first direction Y onto the plane where the second electrode segment 621 is located overlaps with the second electrode segment 612 at least partially.

[0080] For example, Figure 4 This is a schematic partial structural diagram of a display substrate provided in an embodiment of this application. Figure 4 As shown, the display substrate includes a substrate layer 100, multiple data lines 200, multiple gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The gate lines 300 include a first gate line segment 301, a second gate line segment 302, and a third gate line segment 303. The first gate line segment 301 and the first electrode segment 611 are at least partially opposite each other in the first direction Y. The second gate line segment 302 and the second electrode segment 611 are at least partially opposite each other in the first direction Y. The third gate line segment 303 is disposed between the first gate line segment 301 and the second gate line segment 302.

[0081] For example, when there is one gate line 300 between adjacent pixel areas, the distance between the semiconductor connections on the same gate line is relatively short. Therefore, the length of the third gate line segment 303 can be increased in the second direction X to prevent the gate line 300 from breaking. When there are two gate lines 300 between adjacent pixel areas, the short-connected first pixel electrode 510 and the long-connected second pixel electrode 520 are alternately arranged. The distance between the semiconductor connections on the same gate line 300 is relatively far. Therefore, the length of the third gate line segment 303 can be decreased in the second direction X, and the lengths of the first gate line segment 301 and the second gate line segment 302 can be increased. This reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, which are electrically connected to the same data line 200, thereby improving the brightness uniformity and stability of the displayed image, suppressing the display panel's wavy lines, and improving the display effect of the display panel.

[0082] In some feasible implementations, the size of the second gate segment 302 in the first direction Y is smaller than the size of the first gate segment 301 in the first direction Y.

[0083] refer to Figure 4 The first gate segment 301 has a dimension of H3 in the first direction Y, the second gate segment 302 has a dimension of H4 in the first direction Y, and the third gate segment 303 has a dimension of H5 in the first direction Y, wherein H3 is less than H4.

[0084] For example, the shapes of the first gate line segment 301, the second gate line segment 302 and the third gate line segment 303 are obtained by etching the gate line 300.

[0085] The display substrate provided in this application embodiment has a first gate segment 301 with a dimension H3 in the first direction Y that is smaller than the second gate segment 302 with a dimension H4 in the first direction Y. This makes the distance between the first electrode segment 611 and the first gate segment 301 smaller than the distance between the second electrode segment 621 and the second gate segment 302. This further reduces the coupling capacitance difference formed by the first pixel electrode 510 and the second pixel electrode 520 and the electrically connected gate line 300, reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improves the brightness uniformity and stability of the displayed image, suppresses the head-shaking pattern of the display panel, and improves the display effect of the display panel.

[0086] In some feasible implementations, the dimension H3 of the first gate segment 301 in the first direction Y is greater than the dimension H5 of the third gate segment 303 in the first direction Y, and the dimension H4 of the second gate segment 302 in the first direction Y is less than the dimension H5 of the third gate segment 303 in the first direction Y.

[0087] The display substrate provided in this application embodiment gradually decreases in size along the first gate segment 301 to the second gate segment 302 in the first direction Y. This can further increase the coupling capacitance between the first gate segment 301 and the first electrode segment 611 and the coupling capacitance between the second gate segment 302 and the second electrode segment 621. This can further reduce the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, which are electrically connected to the same data line 200. As a result, the brightness uniformity and stability of the displayed image can be further improved, the head-shaking pattern of the display panel can be suppressed, and the display effect of the display panel can be improved.

[0088] In some feasible implementations, the dimension H3 of the first gate segment 301 in the first direction Y is greater than the dimension H5 of the third gate segment 303 in the first direction Y, and the dimension H4 of the second gate segment 302 in the first direction Y is equal to the dimension H5 of the third gate segment 303 in the first direction Y.

[0089] The display substrate provided in this application embodiment has a second gate segment 302 with a dimension H4 in the first direction Y equal to the third gate segment 303 with a dimension H5 in the first direction Y. This can relatively reduce the dimension H3 of the first gate segment 301 in the first direction Y, thereby reducing the size ratio of the gate line 300 to the pixel electrode in the first direction Y. This helps to avoid black lines appearing on the display screen when the number of pixel electrodes is increased in the first direction Y, thereby improving the display effect and increasing the resolution of the display panel.

[0090] In some feasible implementations, the dimension H3 of the first gate segment 301 in the first direction Y is equal to the dimension H5 of the third gate segment 303 in the first direction Y, and the dimension H4 of the second gate segment 302 in the first direction Y is smaller than the dimension H5 of the third gate segment 303 in the first direction Y.

[0091] The display substrate provided in this application embodiment has a first gate segment 301 with a dimension H3 in the first direction Y equal to the third gate segment 303 with a dimension H5 in the first direction Y. This can avoid the gate line 300 being too small in the first direction Y, thereby reducing the risk of the gate line 300 breaking, and thus improving the safety and stability of the display substrate and extending the service life of the display substrate.

[0092] In some feasible implementations, the dimension of the second gate segment 302 in the second direction X is greater than the dimension L2 of the second electrode segment 621 in the second direction X.

[0093] The display substrate provided in this application embodiment can increase the overlap area of ​​the second gate line segment 302 and the second electrode segment 621, further reduce the coupling capacitance between the second electrode lead 620 and the nearest gate line 300, thereby reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0094] In some feasible implementations, the dimension of the first gate segment 301 in the second direction X is greater than the dimension L1 of the first electrode segment 611 in the second direction X.

[0095] The display substrate provided in this application embodiment can increase the overlap area of ​​the first gate line segment 301 and the first electrode segment 611, and further increase the coupling capacitance between the first electrode lead 610 and the nearest gate line 300, thereby reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0096] In some feasible implementations, the size of the second gate segment 302 in the second direction X is equal to the size of the second pixel electrode 520 in the second direction X.

[0097] It should be noted that a coupling capacitance is also formed between the pixel electrode and the gate line 300. The display substrate provided in this application embodiment can reduce the total capacitance value generated by the second pixel electrode 520 by reducing the coupling capacitance between the second gate line segment 302 and the second pixel electrode 520, thereby further reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the displayed image, suppressing the display panel's flickering patterns, and improving the display panel's display effect.

[0098] In some feasible implementations, the size of the first gate segment 301 in the second direction X is equal to the size of the first pixel electrode 510 in the second direction X.

[0099] The display substrate provided in this application embodiment increases the coupling capacitance between the first gate segment 301 and the first pixel electrode 510, reduces the capacitance difference between the first pixel electrode 510 and the second pixel electrode 520, and further reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, thereby improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0100] In some feasible embodiments, the gate line 300 includes a protrusion and a recess, wherein the protrusion is at least partially opposite to the second electrode segment 621 in the first direction Y, and the protrusion protrudes in a direction away from the second pixel electrode 520; the recess is at least partially opposite to the first electrode segment 611 in the second direction X, and the recess is recessed in a direction close to the first pixel electrode 510; the protrusion and the recess are equal in size in the first direction Y.

[0101] For example, the size of the protrusion in the first direction Y can be smaller than the size of the recess in the first direction Y, thereby further increasing the distance between the protrusion and the second pixel electrode 520 and between the protrusion and the second electrode segment 621, and further reducing the coupling capacitance corresponding to the second pixel electrode 520.

[0102] For example, Figure 5 This is a schematic structural diagram of another display substrate provided in an embodiment of this application. (See diagram below.) Figure 5As shown, the display substrate includes a substrate layer 100, multiple data lines 200, multiple gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The gate lines 300 include recesses 331 and protrusions 332.

[0103] The display substrate provided in this application embodiment, by providing recessed portions 331 and protruding portions 332 of the same width, can reduce the risk of breakage of the gate line 300, reduce the voltage difference between the first pixel electrode 510 and the second pixel electrode 520 which are electrically connected to the same data line 200, improve the stability and brightness uniformity of the display image, improve the display effect of the display panel, and suppress the generation of head-shaking patterns.

[0104] In some feasible embodiments, the size of the recess 331 in the second direction X is larger than the size of the first electrode segment 611 in the second direction X.

[0105] The display substrate provided in this application embodiment can increase the overlap area between the recessed portion 331 and the first electrode segment 611, further increasing the coupling capacitance between the first electrode lead 610 and the nearest gate line 300, thereby reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display image, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0106] In some feasible embodiments, the protrusion 332 is larger in the second direction X than the second electrode segment 621 is in the second direction X.

[0107] The display substrate provided in this application embodiment can increase the overlap area between the protrusion 332 and the second electrode segment 621, further reduce the coupling capacitance between the second electrode lead 620 and the nearest gate line 300, thereby reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0108] In some feasible implementations, the size of the recess 331 in the second direction X is equal to the size of the first pixel electrode 510 in the second direction X.

[0109] The display substrate provided in this application embodiment increases the coupling capacitance between the recessed portion 331 and the first pixel electrode 510, reduces the capacitance difference between the first pixel electrode 510 and the second pixel electrode 520, and further reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, thereby improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0110] In some feasible implementations, the size of the protrusion 332 in the second direction X is equal to the size of the second pixel electrode 520 in the second direction X.

[0111] The display substrate provided in this application embodiment can reduce the total capacitance value generated by the second pixel electrode 520 by reducing the coupling capacitance between the protrusion 332 and the second pixel electrode 520, thereby further reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display screen, suppressing the head-shaking pattern of the display panel, and improving the display effect of the display panel.

[0112] In some feasible implementations, the first pixel electrode 510 and the second pixel electrode 520 connected to the same data line 200 have the same polarity.

[0113] It should be noted that the polarity of the data signals transmitted on the same data line 200 is the same. Therefore, the first pixel electrode 510 and the second pixel electrode 520, which are electrically connected to the same data line 200, have the same polarity. This can achieve column inversion of the liquid crystal molecules in each pixel area, suppress the polarization phenomenon of the liquid crystal molecules, improve the stability of the display panel, and extend the service life of the display panel.

[0114] In some feasible implementations, the distance between the first gate segment 301 and the first pixel electrode 510 is less than the distance between the second gate segment 302 and the second pixel electrode 520.

[0115] It should be noted that a coupling capacitor is formed between the gate line 300 and the pixel electrode. The display substrate provided in this application embodiment can reduce the capacitance value between the second pixel electrode 520 and the second gate line segment 302, thereby reducing the total coupling capacitance corresponding to the second pixel electrode 520, reducing the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, improving the brightness uniformity and stability of the display panel, suppressing the generation of head-shaking patterns, and improving the display effect of the display panel.

[0116] In some feasible implementations, the size of the first pixel electrode 510 in the first direction Y is larger than the size of the second pixel electrode 520 in the first direction Y.

[0117] For example, Figure 6 This is a schematic structural diagram of another display substrate provided in an embodiment of this application. For example... Figure 6 As shown, the display substrate includes a substrate layer 100, multiple data lines 200, multiple gate lines 300, a first pixel electrode 510, a second pixel electrode 520, a semiconductor layer 400, a first electrode lead 610, a second electrode lead 620, a third electrode lead 710, and a fourth electrode lead 720. The first pixel electrode 510 has a larger dimension in the first direction Y than the second pixel electrode 520 in the first direction Y.

[0118] The display substrate provided in this application embodiment, by having a first pixel electrode 510 with a larger size in the first direction Y than the second pixel electrode 520 in the first direction Y, can make the distance between the first pixel electrode 510 and the first electrode segment 611 smaller than the distance between the second pixel electrode 520 and the second electrode segment 621. Simultaneously, it can make the distance between the first pixel electrode 510 and the gate line 300 smaller than the distance between the second pixel electrode 520 and the gate line. Furthermore, it can reduce the difference between the sum of the coupling capacitances corresponding to the second pixel electrode 520 and the first pixel electrode 510, reduce the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, reduce the brightness difference between the pixels corresponding to the first pixel electrode 510 and the second pixel electrode 520, improve the brightness uniformity and stability of the displayed image, suppress the generation of head-shaking patterns, and improve the display effect of the display panel.

[0119] A second aspect of this application provides a display panel, comprising: a display substrate as described in any of the first aspects above; a color filter substrate disposed opposite to the display substrate; and a liquid crystal layer disposed between the display substrate and the color filter substrate.

[0120] For example, Figure 7 This is a schematic structural diagram of a display panel provided in an embodiment of this application. Figure 7 As shown, the display panel includes: a display substrate 1000, a liquid crystal layer 1100, and a color filter substrate 1200.

[0121] It should be noted that the color filter substrate 1200 is provided with a color filter film and a black matrix. The color filter film is positioned opposite to the pixel electrode to filter out light of other colors, allowing light emitted by the pixels driven by the pixel electrode to pass through. The black matrix is ​​positioned opposite to the data line 200 and the gate line 300. The color filter substrate 1200 is also provided with a common electrode, which forms a perpendicular electric field with the pixel electrode, acting on the liquid crystal layer 1100. The liquid crystal molecules rotate under the action of the electric field, thereby adjusting the light transmission and changing the luminous brightness of the pixels corresponding to the pixel electrode to form a display image.

[0122] A third aspect of the present application provides a display device, comprising: a display substrate as described in any of the first aspects above.

[0123] For example, Figure 8 This is a schematic structural diagram of a display device provided in an embodiment of this application. Figure 8 As shown, the display device includes a display substrate 1000.

[0124] In some feasible implementations, the display device includes a display panel as described in the second aspect above.

[0125] For example, Figure 9 A schematic structural diagram of another display device provided in an embodiment of this application. For example... Figure 9 As shown, the display device includes a display panel 2000. The display panel 2000 can be applied to touch panel displays, liquid crystal displays, and monitor displays, and can also be applied to irregularly shaped displays, such as smartwatch displays.

[0126] The display substrate 1000 provided in this application embodiment provides a first pixel electrode 510 and a second pixel electrode 520 in the pixel region formed by the intersection of the gate line 300 and the data line 200. By adjusting the distance H1 between the first electrode segment 611 and the nearest gate line 300 to be less than the distance H2 between the second electrode segment 621 and the nearest gate line 300, and when the length L1 of the first electrode lead 610 along the second direction X is less than the length L2 of the second electrode lead 620 along the second direction X, the distance between the second electrode lead 620 with a larger overlapping area and the gate line 300 is increased, and the capacitance difference of the coupling capacitance formed between different electrode leads and the gate line 300 is reduced. This reduces the voltage difference between the first pixel electrode 510 and the second pixel electrode 520, reduces the brightness difference between the corresponding pixels of the first pixel electrode 510 and the second pixel electrode 520, improves the stability of the display image, enhances the uniformity and accuracy of the display image, suppresses the head-shaking pattern of the display panel 2000, and improves the display effect of the display panel 2000.

[0127] It should be noted that the display devices provided in the embodiments of this application may include smartphones, tablets, laptops, televisions, and smart wearable display devices, etc. Smart wearable display devices may include smartwatches, etc., and the embodiments of this application do not make specific limitations.

[0128] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0129] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A display substrate, characterized in that, include: Substrate layer; Multiple data lines are disposed on one side of the substrate layer and extend along a first direction; Multiple gate lines are disposed on the same side of the substrate layer, and the multiple gate lines extend along a second direction, wherein the first direction intersects the second direction, and the multiple gate lines and the multiple data lines intersect to form a pixel region; A semiconductor layer, the semiconductor layer including a plurality of first semiconductor interconnects and a plurality of second semiconductor interconnects, wherein the orthogonal projections of the first semiconductor interconnects and the second semiconductor interconnects on the substrate layer overlap with the orthogonal projections of the gate lines on the substrate layer; A first pixel electrode and a second pixel electrode are provided in the pixel area. The first semiconductor connection part is electrically connected to the first pixel electrode through a first electrode lead. The second semiconductor connection part is electrically connected to the second pixel electrode through a second electrode lead. Both the first semiconductor connection part and the second semiconductor connection part are electrically connected to the same data line. The length of the first electrode lead along the second direction is less than the length of the second electrode lead along the second direction. Wherein, the distance between the first electrode segment and the nearest gate line is less than the distance between the second electrode segment and the nearest gate line, the first electrode segment is the first electrode lead extending in the second direction, and the second electrode segment is the second electrode lead extending in the second direction; In the first direction, two gate lines are provided between two adjacent rows of pixel regions, namely a first gate line and a second gate line. The orthographic projection of the first semiconductor interconnect on the substrate overlaps with the orthographic projection of the first gate line on the substrate, and the orthographic projection of the second semiconductor interconnect on the substrate overlaps with the orthographic projection of the second gate line on the substrate; The first semiconductor connection portion and the second semiconductor connection portion are respectively disposed on both sides of the pixel region; The gate line includes a first gate line segment, a second gate line segment, and a third gate line segment, wherein the first gate line segment and the first electrode segment are at least partially opposite each other in the first direction, the second gate line segment and the second electrode segment are at least partially opposite each other in the first direction, and the third gate line segment is disposed between the first gate line segment and the second gate line segment; The projection of the first gate line segment along the first direction onto the plane where the first electrode segment is located overlaps with the first electrode segment at least partially; the projection of the second gate line segment along the first direction onto the plane where the second electrode segment is located overlaps with the second electrode segment at least partially.

2. The display substrate according to claim 1, characterized in that, The distance between the first electrode segment and the first gate line segment is less than the distance between the second electrode segment and the second gate line segment.

3. The display substrate according to claim 2, characterized in that, The size of the second gate segment in the first direction is smaller than the size of the first gate segment in the first direction.

4. The display substrate according to claim 3, characterized in that, The dimension of the first gate segment in the first direction is greater than the dimension of the third gate segment in the first direction, and the dimension of the second gate segment in the first direction is smaller than the dimension of the third gate segment in the first direction; or, The dimension of the first gate segment in the first direction is equal to the dimension of the third gate segment in the first direction, and the dimension of the second gate segment in the first direction is smaller than the dimension of the third gate segment in the first direction; or, The size of the first gate segment in the first direction is greater than the size of the third gate segment in the first direction, and the size of the second gate segment in the first direction is equal to the size of the third gate segment in the first direction.

5. The display substrate according to claim 2, characterized in that, The dimension of the second gate segment in the second direction is greater than the dimension of the second electrode segment in the second direction; and / or, The size of the first gate segment in the second direction is larger than the size of the first electrode segment in the second direction.

6. The display substrate according to claim 5, characterized in that, The size of the second gate segment in the second direction is equal to the size of the second pixel electrode in the second direction; and / or, The size of the first gate segment in the second direction is equal to the size of the first pixel electrode in the second direction.

7. The display substrate according to claim 1, characterized in that, The gate line includes a protrusion and a recess, wherein the protrusion is at least partially opposite to the second electrode segment in the first direction and protrudes in a direction away from the second pixel electrode; the recess is at least partially opposite to the first electrode segment in the second direction and recesses in a direction close to the first pixel electrode; and the protrusion and the recess are equal in size in the first direction.

8. The display substrate according to claim 7, characterized in that, The size of the recessed portion in the second direction is larger than the size of the first electrode segment in the second direction; and / or, The protrusion is larger in size in the second direction than the second electrode segment is in size in the second direction.

9. The display substrate according to claim 8, characterized in that, The size of the recessed portion in the second direction is equal to the size of the first pixel electrode in the second direction; and / or, The size of the protrusion in the second direction is equal to the size of the second pixel electrode in the second direction.

10. The display substrate according to claim 1, characterized in that, The first pixel electrode and the second pixel electrode, which are connected to the same data line, have the same polarity.

11. The display substrate according to claim 2, characterized in that, The distance between the first gate segment and the first pixel electrode is less than the distance between the second gate segment and the second pixel electrode.

12. The display substrate according to claim 11, characterized in that, The size of the first pixel electrode in the first direction is larger than the size of the second pixel electrode in the first direction.

13. A display panel, characterized in that, include: The display substrate as described in any one of claims 1 to 12; A color filter substrate is disposed opposite to the display substrate; A liquid crystal layer is disposed between the display substrate and the color filter substrate.

14. A display device, characterized in that, include: The display substrate as described in any one of claims 1 to 12; or, The display panel as described in claim 13.

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