Charge self-balancing groove type semiconductor power device

Abstract

The utility model relates to design improvement of a groove-type semiconductor power device, in particular to a charge self-balancing groove-type semiconductor power device, which solves the problem of electric leakage or reliability risk caused by large difference between electric field distribution of an edge of an active region close to a terminal position and electric field distribution of a cellular region. Comprising an active area (2) and a terminal area, the terminal area surrounds the periphery of the active area, the active area comprises a plurality of active area grooves, the two ends of each active area groove are connected end to end and are arranged to be of an arc-shaped structure, and a transition groove is formed between each active area groove and the corresponding terminal area. Transition grooves at two ends of the active region groove close to the terminal region are of arc-shaped structures; through the design of the arc-shaped structure of the transition groove at the edge of the active region groove close to the terminal position, the breakdown voltage of the edge of the active region close to the terminal position is kept consistent with that of the cellular region, so that over pinch-off or weak pinch-off is prevented, and electric leakage and reliability risks are reduced.

Description

A self-balancing trench semiconductor power device Technical Field

[0001] This utility model relates to the design improvement of trench semiconductor power devices, specifically a charge-balanced trench semiconductor power device. Background Technology

[0002] In the field of power semiconductor devices, the edge of the active region of conventional trench semiconductor power devices is usually isolated near the terminal region as shown in Figure 1. This method makes it difficult to ensure that the electric field distribution at the edge of the active region is consistent with the electric field distribution of the cell region. When the device withstands voltage, the edge of the active trench near the terminal region is prone to over-pinch-off or weak-pinch-off, leading to leakage or reliability risks. Conventional trench semiconductor power devices also have a connected method for the edge of the active region as shown in Figure 2. When the device withstands voltage, this method will generate a spike electric field at the connection position, making the device very easy to break down, which is very detrimental to the reliability of the device.

[0003] Therefore, this problem is an urgent issue to be addressed in trench semiconductor power devices. An improved structure needs to be proposed based on the conventional trench semiconductor power device structure to make the electric field distribution more uniform near the terminal position at the edge of the active region. Summary of the Invention

[0004] In view of the problems mentioned in the background art, the purpose of this utility model is to provide a self-balancing trench semiconductor power device to solve the problem of large difference between the electric field distribution near the edge of the active region and the electric field distribution of the cell region, which leads to leakage or reliability risks.

[0005] The above-mentioned technical objective of this utility model is achieved through the following technical solution: a self-balancing trench semiconductor power device, including an active region and a terminal region, wherein the terminal region surrounds the active region, the active region includes a plurality of active region trenches, the two ends of the active region trenches are connected end to end and both ends are set as arc-shaped structures, a transition trench is provided between the active region trenches and the terminal region, and the transition trenches at both ends of the active region trenches near the terminal region are arc-shaped structures.

[0006] Preferably, the distance between the edge of the active region trench arc-shaped structure and the edge of the transition trench arc-shaped structure is equal to the distance between adjacent active region trenches, which is a distance L.

[0007] Preferably, the arc of the active region trench arc structure includes arc one as R1 and arc two as R2, and the width of the active region trench is M, where R1 < R2.

[0008] Preferably, R1 = 0.5L + M, and R2 = 2M + 1.5L.

[0009] Preferably, R1 = 2M + 1.5L and R2 = 3M + 2.5L.

[0010] Preferably, the trench semiconductor power device can be a general trench semiconductor power device, a shielded gate trench semiconductor power device, or a trench MOS Schottky barrier diode.

[0011] Preferably, a terminal area trench is provided around the transition trench.

[0012] In summary, the present invention has the following main advantages:

[0013] 1) By using the arc-shaped structure design of the transition trench near the terminal position of the active region trench edge, the breakdown voltage near the terminal position of the active region edge is kept consistent with that of the cell region, preventing over-pinch-off or weak-pinch-off and reducing leakage and reliability risks.

[0014] 2) The design of this structure is compatible with existing semiconductor manufacturing technologies and processes, requiring no modification to the process, which facilitates promotion and mass production. Attached Figure Description

[0015] Figure 1 shows the edge terminal isolation method of a traditional trench semiconductor power device;

[0016] Figure 2 shows the edge terminal connection method of a traditional trench semiconductor power device;

[0017] Figure 3 shows the structure of the active region and terminal region in Embodiment 1 of the present invention;

[0018] Figure 4 shows the structure of the active region and terminal region in Embodiment 2 of the present invention;

[0019] Figure 5 shows the structure of the active region and terminal region in Embodiment 3 of the present invention;

[0020] Reference numerals: 1. Terminal area; 2. Active area; 3. Active area trench; 4. Transition trench; 5. Terminal area trench. Detailed Implementation

[0021] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0022] As shown in Embodiment 1 of Figure 3, this utility model discloses a self-balancing trench semiconductor power device, including an active region 2 and a terminal region 1. The terminal region 1 surrounds the active region 2. The active region 2 includes several active region trenches 3. The active region trenches 3 adopt an independent trench structure. Each group of active region trenches 3 includes 4 parallel trenches (the number of which can be adjusted according to actual needs) connected end to end. The two ends of adjacent active region trenches 3 are set as arc-shaped structures. A transition trench 4 is provided between the active region trenches 3 and the terminal region 1. The transition trench 4 is set on the periphery of the active region trenches 3 and has a shape similar to that of the active region trenches 3. The ends of the transition trenches 4 near the terminal region 1 at both ends of the active region trenches 3 are also arc-shaped structures.

[0023] The distance between the edge of the arc-shaped structure of the active area trench 3 and the edge of the arc-shaped structure of the transition trench 4 is equal to the distance between adjacent active area trenches 3, both being a distance L.

[0024] The arc of the active area trench 3 includes arc one as R1 and arc two as R2, and the width of the active area trench 3 is M, where R1 < R2; R1 = 0.5L + M, R2 = 2M + 1.5L.

[0025] The trench-type semiconductor power device can be a general trench-type semiconductor power device, a shielded gate trench-type semiconductor power device, or a trench MOS Schottky barrier diode.

[0026] As shown in Embodiment 2 of Figure 4, all parallel trenches of the active region trench 3 of the trench semiconductor device are connected end-to-end, and the connection points at both ends are set as arc-shaped structures. A transition trench 4, corresponding to the shape of the connection point of the active region trench 3, is provided around the active region trench 3; a terminal region trench 5 is provided around the transition trench 4; the interval between the connection point of the transition trench 4 and the active region trench 3 is the same as the interval between adjacent active region trenches 3, both being L; the arc of the arc-shaped structure at the connection point of the active region trench 3 includes arc one R1 and arc two R2, which are related to the interval L between adjacent active region trenches 3 and the width M of the active region trench 3, where R1 = 0.5L + M, and R2 = 2M + 1.5L.

[0027] As shown in Embodiment 3 of Figure 5, the active region trench 3 of the trench semiconductor device adopts a ring-nested structure, with the connection points at both ends set as arc-shaped structures. A transition trench 4, corresponding to the shape of the connection points of the active region trench 3, is provided around the active region trench 3. A terminal region trench 5 is provided around the transition trench 4; the spacing between the connection points of the transition trench 4 and the adjacent active region trench 3 is the same as the spacing between the adjacent active region trench 3, both being L; the dimensions of the arc-shaped structure at the connection points of the adjacent active region trench 3 include radian length R1 and radian length R2, the spacing of the active region trench 3 is L, and the width of the active region trench 3 is M, where R1 = 2M + 1.5L, and R2 = 3M + 2.5L.

[0028] The structure described in this invention can be applied to devices such as ordinary trench semiconductor power devices (Trench MOS), shielded gate trench semiconductor power devices (SGT MOS), and trench MOS Schottky barrier diodes (TMBS). The embodiments are only a few examples.

[0029] Depending on the magnitude of the driving voltage of the manufactured device and the design layout, the spacing L of adjacent active area trenches 3 and the width M of the active area trenches 3 can be adjusted accordingly.

[0030] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A charge-balanced trench semiconductor power device, comprising an active region (2) and a termination region (1), wherein the termination region (1) surrounds the active region (2), characterized in that, The active area (2) includes several active area grooves (3). The two ends of the active area grooves (3) are connected end to end and both ends are set as arc-shaped structures. A transition groove (4) is provided between the active area grooves (3) and the terminal area (1). The transition grooves (4) at both ends of the active area grooves (3) near the terminal area (1) are arc-shaped structures.

2. The self-balancing trench semiconductor power device as described in claim 1, characterized in that, The distance between the edge of the arc-shaped structure of the active area trench (3) and the edge of the arc-shaped structure of the transition trench (4) is equal to the distance between adjacent active area trenches (3), both being a distance L.

3. The self-balancing trench semiconductor power device as described in claim 2, characterized in that, The arc of the active area trench (3) includes arc one as R1 and arc two as R2, and the width of the active area trench (3) is M, where R1 < R2.

4. The self-balancing trench semiconductor power device as described in claim 3, characterized in that... R1 = 0.5L + M, R2 = 2M + 1.5L.

5. The self-balancing trench semiconductor power device as described in claim 3, characterized in that... R1 = 2M + 1.5L, R2 = 3M + 2.5L.

6. The charge self-balancing trench-type semiconductor power device according to claim 1, wherein, Trench semiconductor power devices can be ordinary trench semiconductor power devices, shielded gate trench semiconductor power devices, and trench MOS Schottky barrier diodes.

7. The self-balancing trench semiconductor power device as described in claim 1, characterized in that, The transition trench (4) is surrounded by a terminal area trench (5).

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