Test box for three-temperature test of semiconductor chip

Abstract

The utility model provides a test box used for a three-temperature test of a semiconductor chip, comprising a control box and a high-low temperature box installed on the control box, the high-low temperature box is internally provided with an installation bench, the side surface of the high-low temperature box is provided with an air inlet, and the air inlet is provided with an air outlet. The gas inlet is used for inputting gas which enables the temperature in the high-low temperature box to reach the test temperature of a semiconductor chip to be tested into the high-low temperature box, gas outlets are formed in the two sides of the back face of the high-low temperature box, and the gas outlets are used for enabling the gas in the high-low temperature box to circulate and flow out of the gas outlets; the mounting table is provided with a chip test seat for placing a semiconductor chip to be tested, and the control box is also provided with a reading assembly for reading a test result of the semiconductor chip to be tested; the test box provided by the utility model can realize the three-temperature test of the semiconductor chip, and the semiconductor chip can be stably placed in the high and low temperature box at the same time.

Description

Technical Field

[0001] This utility model belongs to the technical field of semiconductor chip testing equipment, and in particular relates to a test chamber for three-temperature testing of semiconductor chips. Background Technology

[0002] With the growth of emerging industries such as mobile internet, cloud computing, the Internet of Things, and big data, the electronic information industry has entered a new stage of development. Control, communication, human-computer interaction, and network interconnection have incorporated a large number of emerging electronic technologies, leading to increasingly complex device functions and systems with higher levels of integration. The development of emerging electronic information technologies relies on the continuous advancement of the semiconductor industry; therefore, semiconductor chips, as a core technology, are being used more and more frequently and importantly.

[0003] After semiconductor chips are packaged, they are typically tested to separate good from bad products. Usually, the performance of semiconductor chips needs to be tested at high temperatures, low temperatures, and room temperature. Current technology usually uses surface-contact heating sources to heat the chip under test. However, this surface-contact heating only ensures that the side of the chip in contact with the heating source reaches the test temperature, and cannot guarantee that the entire chip reaches the test temperature.

[0004] Therefore, there is a need to provide a new type of test chamber for three-temperature testing of semiconductor chips. Utility Model Content

[0005] The main objective of this invention is to provide a test chamber for three-temperature testing of semiconductor chips, addressing the shortcomings of existing technologies.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A test chamber for three-temperature testing of semiconductor chips includes a control box and a high-low temperature chamber mounted on the control box. The high-low temperature chamber has a mounting platform inside and an air inlet on its side for introducing gas into the chamber to reach the test temperature of the semiconductor chip under test. The high-low temperature chamber has air outlets on both sides of its rear side for allowing gas to circulate and exit. A chip test holder for placing the semiconductor chip under test is provided on the mounting platform. The control box also has a reading component for reading the test results of the semiconductor chip under test.

[0008] Preferably, the chip test socket includes a base disposed on the mounting platform, the base having a placement slot for fixing the chip, and the placement slot having a probe electrically connected to the reading component.

[0009] Preferably, the base is provided with a cover rotatably connected thereto, the cover is provided with a rotating shaft, and a pressure plate that can rotate around the rotating shaft is connected to the rotating shaft. The inner sides of both ends of the pressure plate are provided with slots. The base is also provided with a fixed shaft that cooperates with the pressure plate. When the pressure plate is pressed down, the pressure plate rotates downward along the rotating shaft until the slots on both sides of the pressure plate cooperate with the fixed shaft to realize that the cover presses on the base and fixes the semiconductor chip to be tested in the placement slot.

[0010] Preferably, the reading component includes a PCB board and a reader electrically connected to the PCB board. The reader is used to read the test results of the semiconductor chip under test. The high and low temperature chamber has a slot on the back. One end of the PCB board enters the high and low temperature chamber through the slot and is fixedly installed on the mounting platform. One end of the PCB board is located between the mounting platform and the base and is connected to the probe.

[0011] Preferably, the high and low temperature chamber is provided with a chamber cover rotatably connected thereto, and the chamber cover is provided with a handle hinged thereto. The handle is rotatably connected along the chamber cover, and the two ends of the handle are provided with limiting openings. The front end of the high and low temperature chamber is also provided with a limiting groove that cooperates with the handle. The limiting groove is provided with a fixed rod that cooperates with the limiting opening. When the handle is pressed down, the chamber cover rotates towards the front end of the high and low temperature chamber until the handle enters the limiting groove and the limiting opening engages with the fixed rod, thereby closing the high and low temperature chamber with the chamber cover.

[0012] Preferably, the high and low temperature chamber is provided with a platform, the chip test socket is located inside the platform, and the inner side of the chamber cover is provided with an inner cover that cooperates with the platform. Pressing down the handle causes the inner cover to move closer to the platform until the inner cover fits, so that the chamber cover protects the chip test socket located inside the high and low temperature chamber.

[0013] Compared with the prior art, the present invention will have at least the following beneficial effects:

[0014] ①The test chamber of this utility model can realize the three-temperature test of semiconductor chips. By introducing gas into the air inlet, the temperature inside the high and low temperature chamber can be raised, so that the semiconductor chip under test is in a high temperature, room temperature and low temperature (three-temperature) state and the test is completed at the corresponding temperature.

[0015] ② The semiconductor chip under test can be stably placed in the high and low temperature chamber, that is, the semiconductor chip can be stably placed in the placement slot. The protective cover on the base can close the base so that the semiconductor chip under test can be stably placed in the placement slot. At the same time, the temperature chamber cover on the high and low temperature chamber can close the high and low temperature chamber, and the temperature chamber cover can cover the protective cover, further making the semiconductor chip under test stably placed in the placement slot. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely exemplary embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort, wherein:

[0017] Figure 1 This is a schematic diagram of the open state structure of the test chamber for three-temperature testing of semiconductor chips according to this utility model;

[0018] Figure 2 for Figure 1 Enlarged view of point I;

[0019] Figure 3 for Figure 1 A partial structural breakdown diagram;

[0020] Figure 4 for Figure 1 A partial structural breakdown diagram from another perspective;

[0021] Figure 5 This is a schematic diagram of the test chamber for three-temperature testing of semiconductor chips according to the present invention in its usage state;

[0022] Figure 6 for Figure 5 The front sectional view.

[0023] The reference numerals in the figures include:

[0024] 1. Control box; 2. High and low temperature chamber; 3. Mounting platform; 4. Air inlet; 5. Air outlet; 6. Base; 7. Placement slot; 8. Probe; 9. Protective cover; 10. Rotating shaft; 11. Pressure plate; 12. Bayonet; 13. Fixed shaft; 14. PCB board; 15. Reader; 16. Slot; 17. Chamber cover; 18. Handle; 19. Limiting port; 20. Limiting slot; 21. Fixed rod; 22. Enclosure; 23. Inner cover; 24. Slot; 25. Protrusion; 26. Groove; 27. Glass plate; 28. Optical test stand. Detailed Implementation

[0025] The technical solutions in the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely exemplary embodiments of this utility model, and not the only embodiments.

[0026] A test chamber for three-temperature testing of semiconductor chips, wherein the three temperatures are high temperature, room temperature, and low temperature, to test the performance of semiconductor chips under three temperature conditions. Specifically:

[0027] like Figures 1 to 6 As shown, the test chamber includes a control box 1 and a high-low temperature chamber 2 mounted on the control box 1. The high-low temperature chamber 2 has a mounting platform 3 inside, and an air inlet 4 on its side. The air inlet 4 is used to introduce gas into the high-low temperature chamber 2 to raise the temperature of the semiconductor chip under test. Normally, greenhouse gas, compressed gas, or inert gas can be introduced into the high-low temperature chamber 2 through the air inlet 4 to raise the temperature to meet the test temperature of the semiconductor chip under test. The control box 1 can adjust and control the flow rate of the introduced gas according to the actual temperature inside the high-low temperature chamber 2 to ensure that the semiconductor chip under test is at the required temperature. Furthermore, the high-low temperature chamber 2... The back of the high and low temperature chamber 2 has air outlets 5 on both sides. The air outlets 5 are used to allow the gas inside the high and low temperature chamber 2 to circulate and flow out from the air outlets 5. This can make the temperature inside the high and low temperature chamber 2 evenly distributed, thereby ensuring that the semiconductor chip under test can be heated evenly. The mounting platform 3 is equipped with a chip test socket for placing the semiconductor chip under test. The control box 1 is also equipped with a reading component for reading the test results of the semiconductor chip under test. The reading component is electrically connected to the control box 1. The control box 1 is equipped with a control panel for controlling the test of the semiconductor chip under test. It can adjust the amount of gas entering the high and low temperature chamber 2 to adjust the temperature. The control box 1 can also control the entire test process of the semiconductor chip.

[0028] Specifically, the chip test socket includes a base 6 mounted on a mounting platform 3. The base 6 has a placement slot 7 for fixing the chip. The placement slot 7 has a probe 8 electrically connected to the reading component. The probe 8 can measure parameters such as the electrical performance, power consumption, and signal response of the semiconductor chip under test. The probe 8 will feed back these test results to the reading component.

[0029] The reading component includes a PCB board 14 and a reader 15 electrically connected to the PCB board 14. The reader 15 is used to read the test results of the semiconductor chip under test. The high and low temperature chamber 2 has a slot 16 on the back. One end of the PCB board 14 enters the high and low temperature chamber 2 through the slot 16 and is fixedly installed on the mounting platform 3. One end of the PCB board 14 is located between the mounting platform 3 and the base 6 and is connected to the probe 8. The test results of the semiconductor chip are transmitted to the PCB board 14 through the probe 8 and received by the reader 15.

[0030] The base 6 is also provided with a cover 9 rotatably connected to it. The cover 9 is provided with a rotating shaft 10. A pressure plate 11 that can rotate around the rotating shaft 10 is connected to the rotating shaft 10. The inner sides of both ends of the pressure plate 11 are provided with a bayonet 12. The base 6 is also provided with a fixed shaft 13 that cooperates with the pressure plate 11. When the pressure plate 11 is pressed down, the pressure plate 11 rotates down along the rotating shaft 10 until the bayonet 12 on both sides of the pressure plate 11 cooperates with the fixed shaft 13 to realize that the cover 9 presses down on the base 6 and fixes the semiconductor chip under test in the placement slot 7. Specifically, when the pressure plate 11 is pressed down and contacts the fixed shaft 13, the fixed shaft 13 will be snapped into the bayonet 12 under the action of external force, thereby completing the cooperation connection between the bayonet 12 and the fixed shaft 13, thus ensuring that the semiconductor chip under test in the placement slot 7 is stably placed in the placement slot 7.

[0031] The high and low temperature chamber 2 is provided with a chamber cover 17 rotatably connected to it. The chamber cover 17 is provided with a handle 18 hinged to it. The handle 18 can be rotatably connected along the chamber cover 17. The two ends of the handle 18 are provided with limiting ports 19. The front end of the high and low temperature chamber 2 is also provided with a limiting groove 20 that cooperates with the handle 18. The limiting groove 20 is provided with a fixed rod 21 that cooperates with the limiting port 19. When the handle 18 is pressed down, the chamber cover 17 rotates towards the front end of the high and low temperature chamber 2 until the handle 18 enters the limiting groove 20 and the limiting port 19 engages with the fixed rod 21 to close the high and low temperature chamber 2. When the high and low temperature chamber 2 is closed, the chamber cover 17 presses on the protective cover 9, thereby further fixing the position of the semiconductor chip to be tested in the placement slot 7.

[0032] To further protect the chip test socket inside the high and low temperature chamber 2, a platform 22 is provided inside the high and low temperature chamber 2, and the chip test socket is located inside the platform 22. The inner side of the chamber cover 17 is provided with an inner cover 23 that cooperates with the platform 22. Pressing down the handle 18 makes the inner cover 23 move closer to the platform 22 until the inner cover 23 is in contact with the platform, so that the chamber cover 17 protects the chip test socket inside the high and low temperature chamber 2. This can keep the chip test socket in a safe state and prevent it from being interfered with by external factors, ensuring that the semiconductor chip under test inside the chip test socket can successfully complete the three-temperature test.

[0033] The working principle of the test chamber in this embodiment:

[0034] Pull the chamber cover 17 upwards to keep the high and low temperature chamber 2 open. Then pull the protective cover 9 upwards to keep the base 6 open. Place the semiconductor chip to be tested into the placement slot 7. Pull the protective cover 9 downwards to close the base 6. Then pull the chamber cover 17 downwards to close the high and low temperature chamber 2. Introduce gas into the high and low temperature chamber 2 through the air inlet 4 to raise the temperature inside the high and low temperature chamber 2 to the point where the temperature meets the testing requirements of the semiconductor chip to be tested inside the high and low temperature chamber 2. The semiconductor chip to be tested will begin testing, and the reader 15 will read the test results. The above procedure is used to perform three-temperature (high temperature, room temperature, low temperature) tests on the semiconductor chip to be tested.

[0035] In this embodiment, a structure is also provided for testing the optical performance of the semiconductor chip under test, such as the beam divergence angle and optical power. Specifically, a slot is provided at the center of the surface of the cover 9, and an annular protrusion is provided on the surface of the cover 9. The protrusion 25 communicates with the slot 24. A groove 26 that matches the protrusion 25 is provided on the inner side of the chamber cover 17. A glass plate 27 that can reflect the light source of the semiconductor chip under test is carried in the groove 26. A light test base 28 is fixedly installed on the outer side of the chamber cover 17. An integrating sphere (not shown) is installed on the light test base 28. A series of optical performance of the semiconductor chip under test is tested by the integrating sphere.

[0036] The above description is merely a preferred embodiment of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions falling within the scope of this utility model's concept are protected. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of this utility model should also be considered within the protection scope of this utility model.

Claims

1. A test chamber for three-temperature testing of semiconductor chips, comprising a control box (1) and a high-low temperature chamber (2) mounted on the control box (1), wherein the high-low temperature chamber (2) is provided with a mounting platform (3), characterized in that, The high and low temperature chamber (2) has an air inlet (4) on its side. The air inlet (4) is used to input gas into the high and low temperature chamber (2) to make the high and low temperature chamber (2) reach the test temperature of the semiconductor chip under test. The high and low temperature chamber (2) has air outlets (5) on both sides of its back. The air outlets (5) are used to allow the gas in the high and low temperature chamber (2) to circulate and flow out from the air outlets (5). The mounting platform (3) is provided with a chip test holder for placing the semiconductor chip under test. The control box (1) is also equipped with a reading component for reading the test results of the semiconductor chip under test.

2. The test chamber for three-temperature testing of semiconductor chips according to claim 1, characterized in that, The chip test socket includes a base (6) disposed on the mounting platform (3), the base (6) having a placement slot (7) for fixing the chip, and the placement slot (7) having a probe (8) electrically connected to the reading component.

3. The test chamber for three-temperature testing of semiconductor chips according to claim 2, characterized in that, The base (6) is provided with a cover (9) rotatably connected to it. The cover (9) is provided with a rotating shaft (10). The rotating shaft (10) is connected to a pressure plate (11) that can rotate around the rotating shaft (10). The pressure plate (11) has a bayonet (12) on the inner side of both ends. The base (6) is also provided with a fixed shaft (13) that cooperates with the pressure plate (11). When the pressure plate (11) is pressed down, the pressure plate (11) rotates down along the rotating shaft (10) until the bayonet (12) on both sides of the pressure plate (11) cooperates with the fixed shaft (13) to realize that the cover (9) presses down on the base (6) and fixes the semiconductor chip to be tested in the placement slot (7).

4. The test chamber for three-temperature testing of semiconductor chips according to claim 3, characterized in that, The reading component includes a PCB board (14) and a reader (15) electrically connected to the PCB board (14). The reader (15) is used to read the test results of the semiconductor chip under test. The high and low temperature chamber (2) has a slot (16) on the back. One end of the PCB board (14) enters the high and low temperature chamber (2) through the slot (16) and is fixedly installed on the mounting platform (3). One end of the PCB board (14) is located between the mounting platform (3) and the base (6), and one end of the PCB board (14) is connected to the probe (8).

5. The test chamber for three-temperature testing of semiconductor chips according to claim 1, characterized in that, The high and low temperature chamber (2) is provided with a chamber cover (17) rotatably connected to it. The chamber cover (17) is provided with a handle (18) hinged to it. The handle (18) can be rotatably connected along the chamber cover (17). The two ends of the handle (18) are provided with limiting ports (19). The front end of the high and low temperature chamber (2) is also provided with a limiting groove (20) that cooperates with the handle (18). The limiting groove (20) is provided with a fixed rod (21) that cooperates with the limiting port (19). When the handle (18) is pressed down, the chamber cover (17) rotates towards the front end of the high and low temperature chamber (2) until the handle (18) enters the limiting groove (20) and the limiting port (19) engages with the fixed rod (21) to achieve the closing of the high and low temperature chamber (2) by the chamber cover (17).

6. The test chamber for three-temperature testing of semiconductor chips according to claim 5, characterized in that, The high and low temperature chamber (2) is provided with a platform (22), and the chip test socket is located inside the platform (22). The inner side of the chamber cover (17) is provided with an inner cover (23) that cooperates with the platform (22). Pressing down the handle (18) causes the inner cover (23) to move closer to the platform (22) until the inner cover (23) fits against the platform so that the chamber cover (17) protects the chip test socket located inside the high and low temperature chamber (2).

Images