Driving backboard, display panel and display device
By integrating the gate drive circuit on the drive backplane and using corrosion-resistant conductive materials to connect the signal lines and connection lines, the problems of wide bezels and high costs of electronic paper panels are solved, achieving the effects of narrow bezels and stable production.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BEIJING BOE DISPLAY TECH CO LTD
- Filing Date
- 2025-04-29
- Publication Date
- 2026-05-05
AI Technical Summary
Existing electronic paper panel driving technologies occupy a large bezel and have high driver costs, making it difficult to meet the requirements for narrow bezels, and their production stability is insufficient.
The gate drive circuit is integrated on the drive backplane, and the signal lines and connection lines are connected by first vias, second vias and conductive structures made of corrosion-resistant conductive materials, which avoids increasing the manufacturing process and improves the corrosion resistance of the gate drive circuit.
Without increasing production costs and process steps, the bezel size is reduced, production stability is improved, driver costs are lowered, and the production efficiency of display devices is increased.
Smart Images

Figure CN224203824U_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and more particularly to a driving backplane, a display panel, and a display device. Background Technology
[0002] Electronic paper technology, with its low power consumption, eye-friendly properties, and flexibility, has been widely used in various fields and continues to expand into new application scenarios. However, the driving technology for electronic paper panels still relies on gate integrated circuits (Gate ICs) and source integrated circuits (Source ICs). This display technology occupies too much bezel space and the drivers are expensive. Utility Model Content
[0003] In view of this, the purpose of this disclosure is to provide a driving backplane, a display panel, and a display device.
[0004] To achieve the above objectives, this disclosure provides a reflective driving backplane, including a gate driving circuit region; the gate driving circuit region includes at least one signal line and at least one connection line; wherein, the at least one signal line is arranged along a first direction, and the at least one connection line is arranged along a second direction;
[0005] The drive backplate also includes:
[0006] Substrate;
[0007] A first electrode layer is disposed on the substrate;
[0008] The second electrode layer is disposed on the side of the first electrode layer away from the substrate;
[0009] The third electrode layer is disposed on the side of the second electrode layer away from the substrate;
[0010] At least one first via is provided between the first electrode layer and the third electrode layer; at least one second via is provided between the second electrode layer and the third electrode layer;
[0011] The third electrode layer includes at least one conductive structure; the conductive structure is connected to the signal line located in the first electrode layer via the first via and to the connection line located in the second electrode layer via the second via;
[0012] The materials of the first via, the second via, and the third electrode layer include corrosion-resistant conductive materials.
[0013] In some embodiments, each of the conductive structures is connected to a signal line through two first vias and to a connection line through two second vias.
[0014] In some embodiments, a display area is also included; the third electrode layer located in the display area includes at least one pixel electrode.
[0015] In some embodiments, the corrosion-resistant conductive material is selected from at least one of MoNb, TiAlTi, and MTD.
[0016] In some embodiments, the drive backplane further includes an active layer located between the first electrode layer and the second electrode layer, and the third electrode layer further includes at least one light-shielding portion;
[0017] At least a portion of the active layer is projected onto the substrate in a positive projection, which is located within the positive projection of the light-shielding portion onto the substrate.
[0018] In some embodiments, the drive backplane further includes an insulating layer; the insulating layer is located between the first electrode layer and the active layer.
[0019] In some embodiments, the gate drive circuit region further includes at least one drive unit, the drive unit including at least one drive transistor; the drive transistor includes a first electrode, a second electrode and a third electrode.
[0020] The connecting line provides a conductive connection between one of the second electrode and the third electrode located in the second electrode layer.
[0021] In some embodiments, the drive backplane further includes a passivation layer; the passivation layer is located between the second electrode layer and the third electrode layer.
[0022] Based on the same inventive concept, embodiments of this disclosure also provide a display panel, including any of the aforementioned driving backplates.
[0023] In some embodiments, the display panel further includes an electronic paper film disposed on the driving backplate.
[0024] In some embodiments, the display panel further includes a protective layer located on the side of the electronic paper film away from the driving backplate.
[0025] Based on the same inventive concept, embodiments of this disclosure also provide a display device, including any of the aforementioned display panels.
[0026] As can be seen from the above, the present disclosure provides a driving backplane, a display panel, and a display device. The driving backplane integrates a gate driving circuit and uses a first via, a second via, and a conductive structure to connect signal lines and connecting lines located on different electrode layers. At the same time, the materials of the first via, the second via, and the conductive structure include corrosion-resistant conductive materials, which can improve the corrosion resistance of the gate driving circuit and enhance production stability without increasing the production process. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in this disclosure or related technologies, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0028] Figure 1 A schematic diagram of a cross-sectional structure of an electronic paper display panel is shown;
[0029] Figure 2 A schematic diagram of a driving circuit structure for an electronic paper display panel provided by related technologies is shown.
[0030] Figure 3A This diagram illustrates the structure of a display device according to an embodiment of the present disclosure.
[0031] Figure 3B Show Figure 3A Sectional view along line BB;
[0032] Figure 4A This diagram shows a cross-sectional view of a driving substrate provided in an embodiment of the present disclosure;
[0033] Figure 4B This diagram shows a partial structural schematic of a gate drive circuit provided in an embodiment of the present disclosure;
[0034] Figure 5A A physical diagram of a display panel provided in an embodiment of this disclosure is shown;
[0035] Figure 5B This image shows a magnified micrograph of a driving substrate provided in an embodiment of the present disclosure;
[0036] Figure 6 This diagram illustrates a manufacturing process of a display panel according to an embodiment of the present disclosure;
[0037] Figure 7 This diagram shows a cross-sectional view of another driving substrate provided in an embodiment of the present disclosure. Detailed Implementation
[0038] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.
[0039] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this disclosure should have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms "first," "second," and similar terms used in the embodiments of this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0040] Electronic paper display (EPD) is a display technology that mimics the visual characteristics of traditional paper. It typically employs a reflective display principle and features low power consumption, high contrast, and excellent readability even in sunlight. It is widely used in e-book readers (such as Kindle), electronic tags (such as electronic shelf labels, ESL), smartwatches, and other fields.
[0041] Types of electronic paper display technology include, but are not limited to, electrophoretic display, electrowetting display, liquid crystal display, and electronic powder fluid display. Figure 1 A schematic cross-sectional view of an electronic paper display panel is shown, which employs electrophoretic display technology. Figure 1As shown, the electronic paper display panel 100 includes a driving backplate 103, an electronic paper film (FrontPlane Laminate, FPL) 102, and a protective layer 101 located on the driving backplate 103. The electronic paper film 102 contains an electrophoretic solution containing black charged particles and white charged particles, which are positively and negatively charged, respectively. A lower electrode (corresponding to a pixel electrode) is disposed in the driving backplate 103, and an upper electrode is disposed in the electronic paper film 102. Through the vertical electric field provided by the upper and lower electrodes, the black and white charged particles move vertically under the influence of the electric field. When the black charged particles are distributed on one side of the field of view of the electronic paper display structure, it is a black display; when the white charged particles are distributed on one side of the field of view of the electronic paper display structure, it is a white display. It should be noted that the electrophoresis solution may also contain red, green, and blue charged particles, which are displayed in a similar manner to black and white charged particles, and will not be described further.
[0042] Figure 2 This diagram illustrates a driving circuit structure for an electronic paper display panel provided by related technologies. For example... Figure 2 As shown, the display panel may include a timing controller, a driving substrate 201, a data signal driver (e.g., Source IC) 202, and a gate signal driver (e.g., Gate IC) 203. The timing controller is connected to both the data signal driver 202 and the gate signal driver 203. The data signal driver 202 is connected to multiple data signal lines (D1 to Dn), and the gate signal driver 203 is connected to multiple gate signal lines (S1 to Sm). The driving substrate 201 may include multiple pixel circuit units P. xAt least one pixel circuit unit may include at least one gate signal line, at least one data signal line, and pixel driving circuitry. In an exemplary embodiment, the timing controller may provide control signals of specifications suitable for the data signal driver 202 to the data signal driver 202, and may provide clock signals, gate start signals, etc., of specifications suitable for the gate signal driver 203 to the gate signal driver 203. The data signal driver 202 may use the control signals received from the timing controller to generate data voltages to be provided to the data signal lines D1, D2, D3, ..., Dn, where n may be a natural number. The gate signal driver 203 may generate gate signals to be provided to the gate signal lines S1, S2, S3, ..., Sm by receiving clock signals, gate start signals, etc., from the timing controller. For example, the gate signal driver 203 may sequentially provide gate signals with on-level pulses to the gate signal lines S1 to Sm. For example, the gate signal driver can be configured as a shift register and can generate the gate signal by sequentially transmitting the gate start signal, provided in the form of turn-on level pulses, to the next stage circuit under the control of a clock signal, where m can be a natural number.
[0043] Since multiple gate signal lines (S1 to Sm) of the driving substrate 201 need to be connected to the gate signal driver 203, there are many traces at the bezel position of the display panel, resulting in a wide bezel, which makes it difficult to meet the user's requirement for a narrow bezel, and the cost of the driver is high.
[0044] In view of this, the present disclosure provides a driving backplane, a display panel, and a display device, wherein a gate driving circuit is integrated on the driving backplane, and signal lines and connecting lines located on different electrode layers are connected by a first via, a second via, and a conductive structure. At the same time, the materials of the first via, the second via, and the conductive structure include corrosion-resistant conductive materials, which can improve the corrosion resistance of the gate driving circuit and enhance production stability without increasing the production process.
[0045] Figure 3A This diagram illustrates the structure of a display device according to an embodiment of the present disclosure. For example, the display device 300 may be an electronic price tag. The display device 300 includes a display area (AA) and a non-display area surrounding the display area. Figure 3B Show Figure 3AA cross-sectional view along line BB. The display device includes a driving backplate 303 and an electronic paper laminate (FPL) 302 and a protective sheet 301 located on the driving backplate 303. In a direction perpendicular to the driving backplate 303, the orthographic projections of the electronic paper laminate 302 and the protective sheet 301 onto the driving backplate 303 are within the range of the driving backplate 303, and the orthographic projection of the electronic paper laminate 302 onto the driving backplate 303 is behind the range of the protective sheet 301 on the driving backplate 303. Thus, the driving backplate 303 can support the electronic paper laminate 302 and the protective sheet 301, and the protective sheet 301 can protect the electronic paper laminate 302. It should be noted that edge coating glue (ECGlue) can be applied to region 304 to encapsulate the edges of the protective sheet 301 and the electronic paper laminate 302.
[0046] Based on this, such as Figure 3B As shown, the driving backplane 300 in the non-display area may include a boundary area 3031 near the display area, an electronic paper film extension area 3032, a protective layer extension area 3033, and a driving backplane extension area 3034. To reduce the bezel, a gate driver on array (GOA) circuit is provided in the protective layer extension area 3033 and the driving backplane extension area 3034 to replace the aforementioned gate signal driver 203, thereby achieving the technical effect of reducing the bezel of the display device. It should be noted that the protective layer extension area 3033 and the driving backplane extension area 3034 can also be referred to as the gate driver circuit area.
[0047] Figure 4A This diagram shows a cross-sectional view of a driving substrate provided in an embodiment of the present disclosure; Figure 4B This diagram illustrates a partial structural schematic of a gate drive circuit provided in an embodiment of the present disclosure. Figure 4A and Figure 4B As shown, the driving substrate includes a substrate 401 and a first electrode layer 402, an insulating layer 403 (e.g., a Gate Insulator), an active layer 405, a second electrode layer, a passivation layer 406 (PVX), and a third electrode layer 407 sequentially disposed on the substrate 401.
[0048] It should be noted that the difference between the driving substrate 300 provided in this embodiment and the driving substrate of related technologies lies in the non-display area. That is, the driving substrate 300 located in the display area is essentially the same as the driving substrate of related technologies, including multiple pixel circuit units P. x At least one pixel circuit unit P xIt may include at least one gate signal line, at least one data signal line, and a pixel driving circuit. Under the action of the pixel driving circuit, the voltage between the pixel electrode 4072 located in the third electrode layer 407 and the electronic paper film can be changed, thereby driving the movement of charged particles. Those skilled in the art will know that the third electrode layer 407 is typically made of indium tin oxide (ITO).
[0049] In some embodiments, combined with Figure 4A and Figure 4B The non-display area driving backplane 300 includes at least one signal line 4021, at least one connection line 4041, and at least one driving unit. The driving unit includes at least one driving transistor. Figure 4A (As shown in the dashed box). Here, signal line 4021 can be a clock signal line, a reset signal line, etc., and this disclosure does not limit it. Signal line 4021 can be disposed on the first electrode layer 402.
[0050] For example, the driving transistor can be a thin-film transistor (TFT). The TFT includes a first electrode 4022 (e.g., gate) located on a first electrode layer 402, a second electrode 4042 (e.g., source) located on a second electrode layer 404, and a third electrode 4043 (e.g., drain). An insulating layer 403 exists between the first electrode layer 402 and the second electrode layer 404. An active layer 405 exists between the second electrode 4042 and the third electrode 4043.
[0051] Optionally, the connecting line 4041 is located in the second electrode layer 404 and is electrically connected to one of the second electrode 4042 and the third electrode 4043.
[0052] Furthermore, such as Figure 4B As shown, at least one signal line 4021 is arranged in a first direction (e.g., the x-axis direction); at least one connecting line 4041 is arranged in a second direction (e.g., the y-axis direction).
[0053] In some embodiments, to achieve a conductive connection between signal line 4021 and connecting line 4041, a first via 4081, a second via 4082, and a conductive structure 4071 can be provided. Specifically, the first via 4081 penetrates the passivation layer 406 and the insulating layer 403 to connect to signal line 4021. The second via 4082 penetrates the passivation layer 406 and is connected to connecting line 4041. The conductive structure 4071 is located in the third electrode layer 407 and connects to both the first via 4081 and the second via 4082.
[0054] This setup eliminates the need to increase the number of photomasks during the fabrication of the drive backplane. It allows for the use of similar photomask layer designs to related technologies, thus avoiding increased manufacturing costs and helping to maintain a competitive advantage over non-GOA design drive backplanes in related technologies.
[0055] Taking electronic shelf labels as an example, the driving backplate can be fabricated using a low-cost four-layer mask. Among them, the second electrode layer 404 and the active layer 405 are fabricated using a half-tone mask (HTM).
[0056] Optionally, the first vias 4081 can be grouped in pairs, and the second vias 4082 can be grouped in pairs. Thus, a signal line 4021 can be connected to the conductive structure 4071 through a group (two first vias 4081). A connecting line 4041 can be connected to the conductive structure 4071 through a group (two second vias 4082). This pair-group design helps improve connection stability.
[0057] During the production process, electronic paper is shipped as a single substrate. Unlike liquid crystal display panels, whose driving backplane is protected by a cover plate and adhesive layer, the driving backplane of electronic paper is completely exposed in the module factory, making it highly susceptible to human contact and resulting in low production yield. Figure 5A shows a physical diagram of a display panel provided in an embodiment of this disclosure. Figure 5A As shown, the inventors of this disclosure have noted that the aforementioned low-cost manufactured drive backplane has instability issues when integrating GOA, such as horizontal lines appearing on the display panel. Figure 5B This image shows a magnified micrograph of a driving substrate provided in an embodiment of this disclosure. Figure 5B As shown, after analysis and testing, it was confirmed that the direct cause of the horizontal lines was the corrosion and burning of the third electrode layer 407 made of ITO in the via area of GOA (the area where the first via and the second via are located), which led to the appearance of horizontal lines.
[0058] Training module personnel and managing equipment maintenance can improve production yield to some extent. However, this approach heavily relies on personnel management and makes it difficult to guarantee the actual operating efficiency and utilization rate of production equipment, as well as the productivity of employees.
[0059] In some alternative embodiments, signal line 4021 can be connected to connecting line 4041 via a via located in insulating layer 403. This technical solution eliminates the need to expose the surface of the driving backplane for the connection structure of signal line 4021 and connecting line 4041; instead, it embeds within the driving backplane, thus fundamentally solving the horizontal lines caused by exposed ITO corrosion. However, fabricating the via located in insulating layer 403 requires not only adding an insulating mask, but also ensuring that the second electrode layer 404 is connected to the via, meaning that the second electrode layer 404 and active layer 405 cannot be fabricated using a half-tone mask (HTM). In other words, this solution increases the number of masks, thereby increasing the number of fabrication steps and inevitably increasing the process difficulty and cost. Taking the aforementioned electronic shelf label as an example, the number of masks increases from 4 to 6, clearly resulting in a significant increase in the number of process steps.
[0060] In view of the above problems, this disclosure also provides an improved technical solution to improve production yield without increasing the number of photomasks. In some embodiments, the material of the third electrode layer 407 is a corrosion-resistant conductive material. In other words, the first via 4081, the second via 4082, and the conductive structure 4071 are made of corrosion-resistant conductive materials, which can effectively reduce the risk of corrosion of the drive backplane, improve production stability, and without increasing additional production costs.
[0061] Furthermore, considering that the electronic paper film 302 may corrode the first via 4081, the second via 4082, and the conductive structure 4071 fabricated with ITO, there is typically a distance of at least 200 μm between the electronic paper film 302 and the first via 4081, the second via 4082, and the conductive structure 4071 (here, the distance refers to the distance parallel to the substrate direction), resulting in frame loss. By using a corrosion-resistant conductive material, it is unnecessary to limit the distance between the electronic paper film 302 and the first via 4081, the second via 4082, and the conductive structure 4071, thereby saving space and further reducing the frame size.
[0062] It should be noted that corrosion-resistant conductive materials refer to materials that function normally when subjected to electrical conductivity testing after being stored at 40°C and 90% humidity for 1000 hours. It should also be noted that any material meeting these conditions can be used as the corrosion-resistant conductive material of this disclosure; it can be metallic or non-metallic, and this disclosure does not impose any limitations on it.
[0063] Optionally, the corrosion-resistant conductive material can be one or more of MoNb, TiAlTi, and MTD. TiAlTi represents a TiAlTi alloy. MTD represents a Mo / Ni / Ti alloy.
[0064] Next, the light-shielding part of the present disclosure embodiment will be described. Figure 6 This diagram illustrates a manufacturing process for a display panel according to an embodiment of the present disclosure. Figure 6 As shown, after the drive backplane is fabricated, the electronic paper film 302 and the protective layer 301 are sequentially attached. Then, the data driver (Chip On Glass, COG) and the flexible printed circuit board (FPC on Glass, FOG) are mounted on the substrate (where FPC is short for Flexible Printed Circuit). After the FOG is completed, the first electrical test is performed. Clearly, combined with... Figure 3B and Figure 4A As shown, the first electrical detection is performed before the adhesive application process. At this time, ambient light can directly illuminate the channel of the driving transistor of GOA (corresponding to the active layer 405), which poses a risk of false detection due to light leakage.
[0065] In some embodiments, a black adhesive can be applied to block ambient light. However, this method not only adds the extra step of applying the adhesive, but the black adhesive often introduces impurities, posing a risk of electrical leakage.
[0066] In some alternative embodiments, such as Figure 7 As shown, in conjunction with the aforementioned third electrode layer 407 which uses a corrosion-resistant conductive material, a shielding part 4073 can also be provided in the driving circuit area of the third electrode layer 407. The shielding part blocks at least part of the ambient light, thereby reducing the risk of false judgment due to light leakage in the first electrical detection. Moreover, no additional adhesive material is required, reducing the risk of unknown materials and concerns about market progress.
[0067] Furthermore, the orthographic projection of the active layer 405 located in the driving circuit region onto the substrate 401 is located within the orthographic projection of the shielding portion 4073 onto the substrate 401.
[0068] The aforementioned driving backplate can be used in various reflective display panels, including but not limited to Electro-Phoretic Display (EPD), Electro-Wetting Display (EWD), Cholesteric Liquid Crystal Display (CLCD), or other bistable display panels. This invention is not limited to these.
[0069] The aforementioned display panel can be used not only for electronic price tags, but also for e-books, electronic nameplates, etc. This disclosure does not limit its use.
[0070] Those skilled in the art will understand that some of the application areas of the aforementioned display panels require outdoor use, such as e-books. Therefore, the relevant processes usually require the retention of light-shielding metal to prevent the front light source or ambient light from affecting the pixel driving circuit of the AA.
[0071] Therefore, in some embodiments provided in this disclosure, the third electrode layer 407 located in the display area may also be provided with a shielding portion 4073, and the orthogonal projection of the active layer 405 in the display area onto the substrate 401 is located within the orthogonal projection of the shielding portion 4073 onto the substrate 401.
[0072] This technical solution eliminates the need for additional light-shielding metal, further reducing product production costs.
[0073] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of this disclosure (including the claims) is limited to these examples; within the framework of this disclosure, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of the embodiments of this disclosure as described above, which are not provided in detail for the sake of brevity.
[0074] Additionally, to simplify the description and discussion, and to avoid obscuring the embodiments of this disclosure, the provided drawings may or may not show well-known power / ground connections to integrated circuit (IC) chips and other components. Furthermore, the apparatus may be shown in block diagram form to avoid obscuring the embodiments of this disclosure, and this also takes into account the fact that the details of implementation of these block diagram apparatuses are highly dependent on the platform on which the embodiments of this disclosure will be implemented (i.e., these details should be fully understood by those skilled in the art). While specific details (e.g., circuitry) have been set forth to describe exemplary embodiments of this disclosure, it will be apparent to those skilled in the art that the embodiments of this disclosure may be implemented without these specific details or with variations thereof. Therefore, these descriptions should be considered illustrative rather than restrictive.
[0075] Although this disclosure has been described in conjunction with specific embodiments thereof, many substitutions, modifications, and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may be used with the embodiments discussed.
[0076] This disclosure is intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A reflective drive backplane, characterized in that, It includes a gate driving circuit region; the gate driving circuit region includes at least one signal line and at least one connecting line; wherein, the at least one signal line is arranged along a first direction, and the at least one connecting line is arranged along a second direction; The drive backplate also includes: Substrate; A first electrode layer is disposed on the substrate; The second electrode layer is disposed on the side of the first electrode layer away from the substrate; The third electrode layer is disposed on the side of the second electrode layer away from the substrate; At least one first via is provided between the first electrode layer and the third electrode layer; at least one second via is provided between the second electrode layer and the third electrode layer; The third electrode layer includes at least one conductive structure; the conductive structure is connected to the signal line located in the first electrode layer via the first via and to the connection line located in the second electrode layer via the second via; The materials of the first via, the second via, and the third electrode layer include corrosion-resistant conductive materials.
2. The drive backplane according to claim 1, characterized in that, Each of the conductive structures is connected to a signal line through two first vias and to a connecting line through two second vias.
3. The drive backplane according to claim 1, characterized in that, It also includes a display area; the third electrode layer located in the display area includes at least one pixel electrode.
4. The drive backplane according to claim 1, characterized in that, The corrosion-resistant conductive material is selected from at least one of MoNb, TiAlTi, and MTD.
5. The drive backplane according to claim 1, characterized in that, The driving backplate further includes an active layer located between the first electrode layer and the second electrode layer, and the third electrode layer further includes at least one light-shielding portion; At least a portion of the active layer is projected onto the substrate in a positive projection, which is located within the positive projection of the light-shielding portion onto the substrate.
6. The drive backplane according to claim 5, characterized in that, The drive backplane also includes an insulating layer; the insulating layer is located between the first electrode layer and the active layer.
7. The drive backplane according to claim 1, characterized in that, The gate drive circuit region further includes at least one drive unit, the drive unit including at least one drive transistor; the drive transistor includes a first electrode, a second electrode and a third electrode. The connecting line provides a conductive connection between one of the second electrode and the third electrode located in the second electrode layer.
8. The drive backplane according to claim 1, characterized in that, The drive backplate further includes a passivation layer; the passivation layer is located between the second electrode layer and the third electrode layer.
9. A display panel comprising the driving backplate as described in any one of claims 1 to 8.
10. The display panel according to claim 9, characterized in that, The display panel also includes an electronic paper film disposed on the driving backplate.
11. The display panel according to claim 10, characterized in that, The display panel also includes a protective layer located on the side of the electronic paper film away from the driving backplate.
12. A display device comprising the display panel as described in any one of claims 9 to 11.