Low-pass filter circuit and filter

Abstract

The utility model relates to the technical field of filters, in particular to a low-pass filter circuit and a filter, comprising an inductance element which is connected in series between an input port and an output port through a series branch; the capacitor element is connected in parallel between the inductor element and the ground through a parallel branch; wherein the number of the inductance elements in the series branch is n1, the number of the capacitance elements in the parallel branch is n2, the number n1 of the inductance elements and the number n2 of the capacitance elements meet the following relation: n2 = 2n1 + 2, and two capacitance elements and one inductance element are alternately arranged along the series branch. According to the utility model, the 11-order Chebyshev filtering topology is adopted, and each group of parallel capacitor branches is provided with two entity capacitors of different models, so that a dual-suppression structure of intermediate-frequency shunting and far-end high-frequency shunting is formed.

Description

Technical Field

[0001] This utility model relates to the field of filter technology, and in particular to a low-pass filter circuit and filter. Background Technology

[0002] As a core passive device in the field of radio frequency signal processing, low-pass filters are widely used in electronic devices such as measurement and control systems, radio frequency communication equipment, and instruments. Their core function is to allow specific low-frequency signals (passband) to pass through smoothly, while effectively suppressing high-frequency interference signals (stopband) above the cutoff frequency, so as to ensure that the back-end circuit receives a clean signal and improve the working stability and reliability of the entire electronic system.

[0003] As electronic technology develops towards higher frequencies and greater integration, application scenarios such as measurement and control systems place higher demands on the overall performance of low-pass filters: on the one hand, they need to achieve a cutoff frequency of 500MHz and keep the passband loss at a low level (≤2dB) to reduce the attenuation of useful signals; on the other hand, in order to resist wideband high-frequency interference, they need to simultaneously meet the high out-of-band rejection requirements of intermediate frequency (e.g., 700MHz) and far-end high frequency (e.g., ≤20GHz) to avoid interference signals affecting the normal operation of the system.

[0004] While existing low-pass filters can achieve a 500MHz cutoff frequency and low loss within the basic band, they mostly employ 5th-7th order filter topologies and single-capacitor parallel branch designs. This results in a flat roll-off characteristic of the out-of-band rejection curve and a large transition bandwidth. Single-capacitor branches can only achieve suppression for a single frequency band and cannot simultaneously meet the dual suppression requirements of the intermediate frequency (around 700MHz) and the far-end high frequency (≤20GHz). This often leads to the contradiction of achieving the required intermediate frequency suppression but insufficient far-end high frequency suppression, or achieving the required far-end suppression but resulting in increased passband loss. Utility Model Content

[0005] In this section, as well as in the abstract and title of this application, some simplifications or omissions may be made to avoid obscuring the purpose of this section, the abstract, and the title of this application. Such simplifications or omissions shall not be used to limit the scope of this utility model.

[0006] To address the shortcomings of existing technologies, one objective of this utility model is to provide a low-pass filter circuit.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: a low-pass filter circuit, including an inductor element connected in series between the input port and the output port via a series branch; and a capacitor element connected in parallel between the inductor element and ground via a parallel branch; wherein the number of inductor elements in the series branch is n1, the number of capacitor elements in the parallel branch is n2, and the number of inductor elements n1 and the number of capacitor elements n2 satisfy the following relationship: n2 = 2n1 + 2, and two capacitor elements and one inductor element are alternately arranged along the series branch.

[0008] In a preferred embodiment of the low-pass filter circuit of this utility model, the inductor element includes at least two secondary inductors and a center inductor disposed between the two secondary inductors, wherein the inductance value of the center inductor is H, and the inductance value of the secondary inductors is 0.5~0.95H.

[0009] In a preferred embodiment of the low-pass filter circuit of this utility model, the number of secondary inductors is set to two, and the number of center inductors is set to three.

[0010] In a preferred embodiment of the low-pass filter circuit of this utility model, the input port and the output port are respectively connected in parallel with ground with matching resistors, and the input port, the output port and the inductor are connected in series with port inductors.

[0011] In a preferred embodiment of the low-pass filter circuit of this utility model, the capacitor element includes an intermediate frequency capacitor and a high frequency capacitor. The intermediate frequency capacitor and the high frequency capacitor are connected in series in a parallel branch. Both ends of the parallel branch are grounded. The parallel branch and the series branch form a connection point, which is located between the intermediate frequency capacitor and the high frequency capacitor.

[0012] In a preferred embodiment of the low-pass filter circuit of this utility model, the intermediate frequency capacitor is distributed on one side of the series branch, the high frequency capacitor is distributed on the other side of the series branch, and the capacitance value of the intermediate frequency capacitor is greater than that of the high frequency capacitor.

[0013] In a preferred embodiment of the low-pass filter circuit of this utility model, the series branch has a central axis of symmetry, and the capacitor elements in the multiple sets of parallel branches are distributed in a mirror-symmetric manner with respect to the central axis of symmetry.

[0014] In a preferred embodiment of the low-pass filter circuit of this utility model, the intermediate frequency capacitor includes a secondary capacitor and a center capacitor. The capacitance of the secondary capacitor is smaller than that of the center capacitor. The secondary capacitors are distributed on the parallel branches near the input port and the output port, and the center capacitor is distributed on the remaining parallel branches.

[0015] In a preferred embodiment of the low-pass filter circuit of this utility model, the high-frequency capacitor includes a first capacitor, a second capacitor, and a third capacitor, wherein the capacitance of the first capacitor is greater than the capacitance of the second capacitor, the capacitance of the second capacitor is greater than the capacitance of the third capacitor, the first capacitor is distributed on a parallel branch near the input port and the output port, the second capacitor is distributed on a parallel branch near the central axis of symmetry, and the third capacitor is distributed on a parallel branch between the first capacitor and the second capacitor.

[0016] To address the shortcomings of existing technologies, another objective of this invention is to provide a low-pass filter.

[0017] The present invention also adopts the following technical solution: a low-pass filter, including a low-pass filter circuit and a housing, wherein a male bolt is provided at one end of the housing and a female bolt is provided at the other end, the low-pass filter circuit is disposed in the cavity of the housing, the input port of the low-pass filter circuit extends into the female bolt, and the output port of the low-pass filter circuit extends into the male bolt.

[0018] The beneficial effects of the low-pass filter circuit and filter of this utility model are as follows: This utility model adopts an 11th-order Chebyshev filter topology, and each parallel capacitor branch is equipped with two physical capacitors of different types, forming a dual suppression structure of mid-frequency shunt and far-end high-frequency shunt. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram showing the layout of the inductor and capacitor elements of this utility model.

[0021] Figure 2 This is a schematic diagram of the layout of the inductor element of this utility model.

[0022] Figure 3 This is a schematic diagram of the layout of the capacitor element of this utility model.

[0023] Figure 4 This is a schematic diagram showing the layout of the intermediate frequency capacitor and the high frequency capacitor of this utility model.

[0024] Figure 5 This is a simulation curve of the low-pass filter circuit of this utility model.

[0025] Figure 6This is a measured performance curve of the low-pass filter circuit of this utility model.

[0026] Figure 7 This is a schematic diagram of the structure of the low-pass filter of this utility model.

[0027] In the diagram: Inductor 100, Capacitor 200, Series Branch L1, Parallel Branch L2, Input Port Num1, Output Port Num2, Secondary Inductor 101, Center Inductor 102, Intermediate Frequency Capacitor 201, High Frequency Capacitor 202, Connection Point N, Central Axis of Symmetry M, Secondary Capacitor 201a, Center Capacitor 201b, First Capacitor 202a, Second Capacitor 202b, Third Capacitor 202c, Matching Resistor 300, Port Inductor 400, Housing 500, Male Screw 501, Female Screw 502, Cavity 503. Detailed Implementation

[0028] To enable those skilled in the art to better understand this utility model, the present utility model will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0029] The terminology used in this invention refers to those general terms currently widely used in the art in consideration of the functionality of this invention; however, these terms may vary according to the intent, precedent, or new technology of those skilled in the art. Furthermore, specific terms may be chosen by the applicant, and in such cases, their detailed meanings will be described in the detailed description of this invention. Therefore, the terminology used in this specification should not be construed as simple names, but rather based on the meaning of the terms and the overall description of this invention.

[0030] Reference Figure 1 This embodiment provides a low-pass filter circuit, including an inductor 100 and a capacitor 200.

[0031] In this configuration, inductor 100 is connected in series between input port Num1 and output port Num2 via series branch L1. Capacitor 200 is connected in parallel between inductor 100 and ground via parallel branch L2.

[0032] In the series branch L1, the number of inductors 100 is n1, and the number of capacitors 200 in the parallel branch L2 is n2. The number of inductors 100 n1 and the number of capacitors 200 n2 satisfy the following relationship: n2=2n1+2. Two capacitors 200 and one inductor 100 are arranged alternately along the series branch L1.

[0033] Furthermore, by matching the number of inductors 100 and capacitors 200, it is ensured that in each filter unit, a dual suppression structure of mid-frequency shunt and far-end high-frequency shunt can be achieved through the configuration of one inductor corresponding to two capacitors.

[0034] Furthermore, along the signal transmission direction of the series branch L1 (i.e., from the input port Num1 to the output port Num2), the inductor 100 and capacitor 200 are arranged in a specific alternating manner, and the ratio of the number of inductors 100 to capacitors 200 is satisfied. After the signal enters the input port Num1, it first passes through the two capacitors 200 on the parallel branch L2. Then, the signal passes through the inductor 100 and the next set of parallel branches L2 consisting of two capacitors 200 in sequence. This process is repeated alternately. Before the signal reaches the output port Num2, the last set of elements is fixed to two parallel capacitors 200. This ensures the impedance stability of the output of the filter circuit and allows the signal to pass through the capacitors 200 to filter out some noise before entering the inductor 100 for high-frequency blocking, effectively reducing the electromagnetic compatibility pressure on the inductor 100.

[0035] Reference Figure 2 The inductor element 100 includes at least two secondary inductors 101 and a central inductor 102 disposed between the two secondary inductors 101. The inductance value of the central inductor 102 is H, and the inductance value of the secondary inductors 101 is 0.5~0.95H.

[0036] The inductor 100 does not use inductors of uniform specifications, but is composed of at least two secondary inductors 101 and a central inductor 102 disposed between the two sets of secondary inductors 101.

[0037] In a preferred embodiment, the number of secondary inductors 101 is set to two, and the number of central inductors 102 is set to three.

[0038] Along the signal transmission direction, the five inductor elements are arranged in the order of "secondary inductor 101, center inductor 102, center inductor 102, center inductor 102, secondary inductor 101".

[0039] The inductance value of the center inductor 102 is set to the nominal value H. The inductance value of the secondary inductors 101 distributed near the input port Num1 and the output port Num2 is set to 0.5~0.95H, that is, the edge inductance is slightly lower than the center inductance.

[0040] By placing a secondary inductor 101 with a smaller inductance near the port, the characteristic impedance of the circuit can transition more smoothly between the input and output terminals, effectively reducing return loss in the passband and avoiding severe signal reflection at the interface.

[0041] In this embodiment, the center inductor 102 is a solid chip inductor, model INDQ-27nH.

[0042] Here, INDQ represents the package or product series identifier for the chip inductor, and 27nH is the nominal inductance value. Within the 500MHz passband, its inductive reactance is approximately 84.8Ω, ensuring low-loss transmission of useful signals. Against 700MHz intermediate frequency interference signals, the inductive reactance increases to approximately 118.7Ω, creating a strong blocking effect. Facing 20GHz far-end high-frequency interference, the inductive reactance surges to 3.39kΩ, almost completely blocking the high-frequency signal's advance. The continuous series connection of three inductors of the same model constructs a "stepped interception barrier," continuously attenuating the transmission capability of high-frequency interference signals and achieving a suppression of ≥30dBc at 20GHz.

[0043] Secondary inductor 101 is a physical surface-mount inductor, model number INDQ-22nH.

[0044] In this designation, INDQ is the package or product series identifier for the chip inductor, and 22nH is the nominal inductance value. Within the 500MHz passband, its inductive reactance is approximately 69.1Ω, which allows useful signals to pass smoothly while providing initial resistance to 700MHz intermediate frequency interference signals (inductive reactance approximately 96.8Ω), thus slowing down the transmission speed of intermediate frequency interference.

[0045] Reference Figure 3 and Figure 4 The capacitor element 200 includes an intermediate frequency capacitor 201 and a high frequency capacitor 202. The intermediate frequency capacitor 201 and the high frequency capacitor 202 are connected in series on the parallel branch L2. Both ends of the parallel branch L2 are grounded. The parallel branch L2 and the series branch L1 form a connection point N, which is located between the intermediate frequency capacitor 201 and the high frequency capacitor 202.

[0046] Each parallel branch L2 consists of two independent physical capacitors, an intermediate frequency capacitor 201 and a high frequency capacitor 202, connected in series. Unlike conventional filter circuits where one end is connected to the signal line and the other end is grounded, in this embodiment, both ends of the parallel branch L2 are connected to ground (GND). This double-grounded design provides two independent discharge paths to ground for the signal. The parallel branch L2 is electrically connected to the main series branch L1 through connection point N. This connection point N is located between the intermediate frequency capacitor 201 and the high frequency capacitor 202, causing the signal to be shunt at this point after being introduced from the series branch L1.

[0047] The intermediate frequency capacitor 201 is located on one side of the series branch L1, and the high frequency capacitor 202 is located on the other side of the series branch L1. The capacitance of the intermediate frequency capacitor 201 is greater than that of the high frequency capacitor 202.

[0048] The signal enters through connection point N, with a portion flowing to ground via intermediate frequency (IF) capacitor 201. Due to the large capacitance of IF capacitor 201, it exhibits low capacitive reactance for mid-frequency (IF) signals (around 700MHz), thus achieving efficient suppression of IF interference. The remaining portion of the signal flows to ground through connection point N via high-frequency capacitor 202. High-frequency capacitor 202 employs a small capacitance design, resulting in a higher self-resonant frequency and providing an extremely low-impedance discharge path for far-end high-frequency (up to 20GHz) interference.

[0049] By setting two functionally differentiated capacitors at the same parallel node (connection point N), this circuit can simultaneously meet the high out-of-band rejection requirements at both the intermediate frequency (700MHz) and the far-end high frequency (≤20GHz) without increasing the circuit size.

[0050] By placing the connection point N between the two capacitors, the designer can fine-tune the impedance characteristics of each parallel node by adjusting the specific model ratio of the intermediate frequency capacitor 201 and the high frequency capacitor 202, thereby controlling the passband loss to an extremely low level of ≤2dB.

[0051] This dual suppression structure, combined with an 11th-order Chebyshev filter topology, makes the circuit's attenuation curve steeper near the cutoff frequency (500MHz). Figure 5 As shown in the simulation curves, the transition bandwidth was significantly reduced.

[0052] To further improve the electrical performance stability of the low-pass filter circuit, this embodiment adopts a strict mirror symmetry design in both physical layout and electrical parameter configuration.

[0053] Reference Figure 4 The series branch L1 has a central axis of symmetry M, and the capacitor elements 200 on the multiple parallel branches L2 are distributed in a mirror symmetric manner with the central axis of symmetry M as the reference.

[0054] Specifically, at the geometric center of the series branch L1, a virtual axis perpendicular to the signal transmission direction is defined as the central symmetry axis M. This axis M divides the entire filter circuit into a symmetrical input half-circuit and an output half-circuit.

[0055] Combining the aforementioned quantitative relationship n2=2n1+2 and the alternating arrangement of "double capacitive single inductor", if the number of central inductors 102 is odd (such as 3), then one of the inductors in the middle is located exactly on axis M; if it is even, then axis M is located between the two middle inductors.

[0056] On the multiple sets of parallel branches L2 distributed on both sides of axis M, the corresponding capacitor elements 200 are not only mirror images in spatial position, but also maintain strict consistency in component type, nominal capacitance value, accuracy class, and package size. For example, the electrical characteristics of the first set of parallel branches L2 near the input port Num1 are exactly the same as those of the last set of parallel branches L2 near the output port Num2. This symmetry extends to each corresponding parallel node, ensuring that the impedance distribution gradient radiating from axis M to both sides is completely consistent.

[0057] Because the circuit topology and component parameters of input port Num1 and output port Num2 are mirror-symmetric, the input impedance and output impedance of the circuit remain highly consistent across the entire frequency band. This is directly reflected in the input return loss (e.g., in the scattering parameters) Figure 6 The yellow curve of S11) and the output return loss (such as Figure 6 The curves (S22 purple curve) highly overlap, which greatly facilitates the cascading matching of the filter with the preceding and following stages of the system.

[0058] Reference Figure 4 The intermediate frequency capacitor 201 includes a secondary capacitor 201a and a center capacitor 201b. The capacitance of the secondary capacitor 201a is smaller than that of the center capacitor 201b. The secondary capacitor 201a is distributed on the parallel branch L2 near the input port Num1 and the output port Num2, and the center capacitor 201b is distributed on the remaining parallel branches L2.

[0059] In each parallel branch L2, the intermediate frequency capacitor 201 not only shunts intermediate frequency interference signals, but its precise capacitance distribution also serves as the impedance tuning function for the entire circuit. In this embodiment, the intermediate frequency capacitor 201 adopts a differentiated gradient capacitance design. Based on its arrangement and capacitance value in the circuit, the intermediate frequency capacitor 201 is further divided into secondary capacitor 201a and center capacitor 201b.

[0060] Secondary capacitors 201a are distributed in the first (or first two) parallel branches L2 closest to the input port Num1, and in the last (or last two) parallel branches L2 closest to the output port Num2. As the first / last capacitive gate for signals entering and leaving the filter network, the relatively small capacitance of secondary capacitors 201a has high capacitive reactance, which can avoid excessive instantaneous disturbances to the port characteristic impedance.

[0061] The center capacitor 201b is distributed across the remaining parallel branches L2 (i.e., the intermediate stage of the circuit) except for the location near the port mentioned above. The center capacitor 201b has a large capacitance value, which is intended to provide extremely low impedance to ground, thereby enhancing the deep suppression of out-of-band intermediate frequency noise.

[0062] This capacitance gradient distribution effectively suppresses the passband ripple common in Chebyshev filters near the cutoff frequency (500MHz). Fine-tuning the edge impedance using secondary capacitor 201a flattens the amplitude-frequency response curve within the passband, ensuring signal transmission loss fluctuations are ≤2dB.

[0063] Reference Figure 4 The high-frequency capacitor 202 includes a first capacitor 202a, a second capacitor 202b, and a third capacitor 202c. The capacitance of the first capacitor 202a is greater than that of the second capacitor 202b, and the capacitance of the second capacitor 202b is greater than that of the third capacitor 202c. The first capacitor 202a is distributed on the parallel branch L2 near the input port Num1 and the output port Num2. The second capacitor 202b is distributed on the parallel branch L2 near the central axis of symmetry M. The third capacitor 202c is distributed on the parallel branch L2 between the first capacitor 202a and the second capacitor 202b.

[0064] In this embodiment, to meet the requirements of ultra-wideband suppression from 500MHz to 20GHz, the high-frequency capacitors 202 on the parallel branch L2 are precisely graded in terms of capacitance and arranged in spatial sequence.

[0065] Along the signal transmission direction, the high-frequency capacitor 202 does not employ a simple linear variation. The first capacitor 202a is distributed on the parallel branch L2 closest to the input port Num1 and the output port Num2. Since its capacitance is the largest of the three, it has the lowest capacitive reactance in the high-frequency band. Placing it at the port allows for a "first-round high-power interception" of broadband clutter entering the filter, quickly dissipating most of the high-frequency interference energy.

[0066] The second capacitor 202b is distributed on the parallel branch L2 near the central axis of symmetry M. As the "core stage" of the filter network, the use of a medium-value second capacitor 202b can ensure the suppression depth of the central stage while avoiding center frequency shift caused by excessive capacitance, thus stabilizing the center impedance of the filter network.

[0067] The third capacitor 202c is distributed in the parallel branch L2 between the first capacitor 202a and the second capacitor 202b. Since all capacitors have a self-resonant frequency (SRF), and the smaller the capacitance, the higher the SRF, this embodiment artificially creates three staggered attenuation poles on the frequency response curve by inserting the third capacitor 202c (highest SRF) between the first capacitor 202a (low SRF) and the second capacitor 202b (medium SRF). This staggered distribution of "high, medium, and low" frequency poles effectively eliminates the "suppression blind zone" formed by the high-frequency inductive effect of a single type of capacitor, enabling the circuit to maintain a suppression capability of ≥40dB or higher in the range up to 20GHz.

[0068] To ensure that this low-pass filter circuit achieves optimal amplitude-frequency characteristics at a cutoff frequency of 500MHz and maintains high suppression capability in the 20GHz far-end frequency band, the following selection and configuration were made for the capacitor components 200 at each stage in this embodiment:

[0069] The secondary capacitor 201a is model GRM18-3.6pF;

[0070] The center capacitor 201b is model GRM18-10pF;

[0071] The first capacitor, 202a, is model GRM18-1.5pF;

[0072] The second capacitor 202b is model GRM18-1pF;

[0073] The third capacitor, 202c, has a model number of GRM18-0.6pF.

[0074] In this embodiment, all capacitor elements 200 (including intermediate frequency capacitor 201 and high frequency capacitor 202) are preferably multilayer ceramic capacitors of the GRM18 series.

[0075] Specifically, the secondary capacitor 201a is distributed in the parallel branch near the input / output ports. It adopts a small capacitance value of 3.6pF, which has a relatively high capacitive reactance near 500MHz. This avoids excessive shunting effect on the 50Ω characteristic impedance of the port, thereby significantly reducing return loss and optimizing voltage standing wave ratio (VSWR).

[0076] The center capacitor 201b is located in the central region of the circuit. Its large capacitance of 10pF provides extremely low impedance to ground, effectively filtering out noise outside the passband edge. It is the core energy unit that maintains the characteristics of the 11th-order Chebyshev filter.

[0077] The first capacitor 202a is located near the input / output port. As the first barrier to high-frequency signals, the 1.5pF capacitor has the lowest capacitive reactance of the three, enabling it to discharge initial interference in the 700MHz to several GHz frequency bands with high power.

[0078] The second capacitor, 202b, is located near the central axis of symmetry, M. Its moderate capacitance of 1pF creates a stable high-frequency trap deep within the circuit, ensuring further reduction of residual high-frequency energy at this location.

[0079] The third capacitor 202c is located between the first capacitor 202a and the second capacitor 202b. 0.6pF is an extremely small capacitance value, meaning it has an extremely high self-resonant frequency (SRF point close to 20GHz). By placing it between the large capacitor branches, it effectively fills the "suppression blind zone" caused by the inductive behavior of the 1.5pF and 1pF capacitors at high frequencies, allowing the circuit to maintain an extremely high attenuation level in the 10GHz~20GHz frequency band.

[0080] By precisely combining the five capacitors of 3.6pF, 10pF, 1.5pF, 1pF, and 0.6pF, this circuit achieves a multi-point SRF overlapping distribution in terms of electrical performance. This allows the circuit to maintain highly consistent attenuation performance in the range of 700MHz to 20GHz. The mirror-symmetrical capacitance arrangement (such as the symmetrical combination of 3.6pF and 1.5pF on both sides of the port) ensures extremely low group delay and good phase linearity for bidirectional signal transmission.

[0081] Reference Figure 4 To ensure that this low-pass filter circuit can be seamlessly integrated into a standard 50Ω RF system and to minimize signal reflection at the ports, a dedicated matching compensation network is set at both the input port Num1 and the output port Num2.

[0082] Specifically, input port Num1 and output port Num2 are connected in parallel with ground with matching resistors 300, and input port Num1 and output port Num2 are connected in series with inductor 100 with port inductor 400.

[0083] The matching resistor 300 has a resistance of 50Ω, and the port inductor 400 is a solid chip inductor with the model number INDQ-0.1nH.

[0084] Specifically, 50Ω is the standard characteristic impedance of an RF system. By connecting this resistor in parallel at the port, a stable impedance reference can be established for the input and output signals, thereby ensuring that the filter maintains good termination matching over a wide bandwidth.

[0085] In high-frequency environments ranging from 500MHz to 20GHz, PCB traces and pads inevitably generate trace amounts of parasitic capacitance. The primary purpose of this 0.1nH physical inductor is not to participate in the selection of the main filtering frequency, but rather to compensate for the parasitic capacitance effect at the port.

[0086] By combining the matching resistor 300 and the port inductor 400, along with the subsequent secondary inductor 101 and secondary capacitor 201a, a multi-stage impedance smoothing system is formed, enabling the filter to have extremely low return loss within the 500MHz passband. Simultaneously, due to the presence of the port inductor 400, it works in conjunction with the high-frequency capacitor 202 to further raise the attenuation start frequency of the entire circuit at high frequencies (such as 20GHz), enhancing the steepness of far-end rejection.

[0087] Reference Figure 7 This embodiment provides a low-pass filter, including a low-pass filter circuit and a housing 500.

[0088] A male bolt 501 is provided at one end of the housing 500, and a female bolt 502 is provided at the other end. A low-pass filter circuit is provided in the cavity 503 of the housing 500. The input port Num1 of the low-pass filter circuit extends into the female bolt 502, and the output port Num2 of the low-pass filter circuit extends into the male bolt 501.

[0089] The cavity 503 formed inside the housing 500 constitutes a complete electromagnetic shielding space, which can effectively isolate the interference of external electromagnetic waves on the internal 11th-order high-precision filter network, and at the same time prevent the internal high-frequency signals from radiating outward, ensuring that the filter has extremely high electromagnetic compatibility in the 20GHz ultra-wideband range.

[0090] The entire surface of the housing is silver-plated at 7µm to improve the unloaded Q value of the cavity, thus ensuring the requirements for loss and suppression.

[0091] Male screw 501 and female screw 502 are preferably SMA, N, or BNC type RF connectors with a strictly matched characteristic impedance of 50Ω. This allows the filter to be used as a standard component, directly connected in series to existing RF transmission cables or instrument interfaces without the need for additional adapters, greatly improving the ease of field installation.

[0092] The low-pass filter circuit (typically mounted on a high-frequency PCB) is securely mounted within the cavity 503 of the housing 500. The cavity 503 is precisely sized to avoid introducing additional cavity resonant modes due to excessive cavity size, thereby ensuring the purity of the band-stop suppression.

[0093] The cavity 503 has a length of 27cm and a width of 9cm.

[0094] The input port Num1 of the low-pass filter circuit is electrically connected to the socket of the female bolt 502 through the inner core conductor, and the output port Num2 of the low-pass filter circuit is electrically connected to the pin of the male bolt 501 through the inner core conductor. The ground terminal of the low-pass filter circuit (such as the ground terminal of the aforementioned parallel branch L2) is connected to the inner wall of the housing 500 through PCB copper pour to achieve a large-area, low-impedance common ground connection.

[0095] In this embodiment, there are five inductor elements 100 and twelve capacitor elements 200. The inductor elements 100 and the capacitor elements 200 together constitute an 11th-order Chebyshev filter section.

[0096] Reference Figure 5 , Figure 5 The simulation curve is shown below. The horizontal axis represents the frequency of the test signal, which is expressed in GHz (gigahertz). The vertical axis represents the amplitude, which represents the strength or loss of the signal. On the dB scale, the smaller the value (the more negative), the weaker the signal, the greater the loss, and the better the suppression. The two data points of the simulation curve are m1 and m2.

[0097] Figure 5 In this diagram, S(2,1) represents the transmission characteristics of the output signal measured at port 2 from the input signal at port 1, and dB(S(2,1)) represents the insertion loss or transmission coefficient. If its value is close to 0dB (e.g., -1dB), it means that at this frequency, the signal can pass through the filter very well with minimal loss. If its value is a large negative number (e.g., -40dB), it means that at this frequency, the signal is greatly blocked by the filter and can hardly pass through.

[0098] Figure 5 In the equation, m1: freq = 500.1MHz, dB(S(2,1)) = -1.156, indicating that the insertion loss of the filter is -1.156dB at a frequency of 500.1MHz.

[0099] m2: freq=700.1MHz, dB(S(2,1))=-48.756, indicating that the insertion loss of the filter is -48.756dB at a frequency of 700.1MHz.

[0100] Point m1 is located at 500.1MHz, with an insertion loss of -1.156dB. This indicates that near 500MHz, the signal loses only approximately 1.156dB of energy through the filter, far less than the required 2dB, and the -3dB cutoff point has not yet been reached. Therefore, the passband performance (low loss) meets the requirements. The flattened portion of the curve from low frequency to 500MHz represents the passband, where the loss value should fluctuate primarily between -1dB and -2dB.

[0101] At point m2, located at 700.1MHz, the insertion loss drops sharply to -48.756dB, meaning that a 700MHz signal is attenuated by more than 48dB when passing through the filter (only about 0.0013% of the energy passes through). This is far better than the requirement of "20dB suppression". The portion of the curve that drops sharply after 500MHz is the stopband. The steeper and deeper the drop, the better the selectivity of the filter and the stronger its ability to block unwanted signals.

[0102] Reference Figure 6 , Figure 6 This is a measured performance curve of the low-pass filter of this utility model, obtained by testing with a vector network analyzer. The test frequency range covers 300kHz to 20.0000GHz (channel 1 start frequency 300.000kHz, end frequency 20.0000GHz), comprehensively reflecting the actual transmission characteristics, impedance matching characteristics and wideband suppression effect of the filter.

[0103] Figure 6 The horizontal axis (freq) represents the frequency of the test signal, in GHz (gigahertz), with a frequency range extending from 300kHz (close to DC) to 20GHz, covering the entire passband, transition band, and far-end stopband of the filter.

[0104] The vertical axis (dB) represents the amplitude characteristics of the signal, and the unit is decibel (dB). The smaller the value (the more negative), the greater the signal loss and the stronger the suppression effect (transmission characteristics) or the smaller the reflection and the better the matching (impedance characteristics).

[0105] Figure 6 It includes three test tracks, each corresponding to a key performance dimension of the filter.

[0106] Where Tr1S11LogM represents the return loss test trajectory of the input port (LogM indicates the logarithmic amplitude scale), corresponding to the yellow cursor parameter, reflecting the impedance matching effect of the input port. S11 is the reflection coefficient of port 1. The closer the value is to -∞dB, the smaller the signal reflection and the better the impedance matching.

[0107] Tr1S21LogM represents the signal transmission loss test trajectory, corresponding to the cyan cursor parameter, reflecting the filter's ability to pass and block signals of different frequencies. S21 is the transmission coefficient from input port 1 to output port 2. The closer the value is to 0dB, the smaller the signal transmission loss (passband characteristic); the more negative the value, the stronger the signal suppression (stopband characteristic).

[0108] Tr1S22LogM indicates the return loss test trajectory of the output port, corresponding to the purple cursor parameter, reflecting the impedance matching effect of the output port, and together with S11, verifying the impedance consistency at both ends of the filter.

[0109] The cursors in the three test tracks will be explained next.

[0110] Next, S21 represents the Tr1S21LogM trajectory, S11 represents the Tr1S11LogM trajectory, and S22 represents the Tr1S22LogM trajectory.

[0111] Cursor 1 corresponds to the cutoff frequency (515.500MHz, slightly higher than the 500MHz design threshold), verifying the passband range and transition band characteristics.

[0112] In S21 (cyan), cursor 1: -2.98506dB: transmission loss is close to the -3dB standard, indicating that the actual cutoff frequency is ≥500MHz and the passband range meets the standard.

[0113] Cursor 1 in S11 (yellow): -11.84117dB: The return loss at the input port is -11.84dB, which is still at a good matching level (the reflected signal accounts for about 8%), and there is no sudden change in the impedance of the transition band.

[0114] Cursor 1 in S22 (purple): -11.86703dB: The return loss of the output port is -11.87dB, which is consistent with the matching characteristics of the input port, and the signal transmission in the transition band is stable.

[0115] Cursor 2 corresponds to the key intermediate frequency stop band (700.000MHz, designed suppression index ≥20dBc), to verify the intermediate frequency interference suppression effect.

[0116] In S21 (cyan), cursor 2: -52.57712dB: transmission loss reaches -52.58dB, suppression effect far exceeds 20dBc requirement (interference signal can only pass about 0.00056%), and intermediate frequency shunt function fully meets the standard.

[0117] Cursor 2 in S11 (yellow): -0.34425dB: The return loss of the input port is -0.34dB, and the reflected signal accounts for about 92%, indicating that the signal in the stopband is mainly reflected and shunted, with no additional transmission loss.

[0118] Cursor 2 in S22 (purple): -0.48560dB: The return loss of the output port is -0.49dB, which is consistent with the characteristics of the input port, and the impedance matching of the stopband is stable.

[0119] Cursor 3 corresponds to the typical frequency point of the far-end high-frequency stop band (11.2501GHz, design suppression index ≥30dBc@≤20GHz), verifying the wideband suppression effect.

[0120] Cursor 3 in S21 (cyan): -41.50767dB: Transmission loss reaches -41.51dB, suppression effect far exceeds 30dBc requirement (interference signal can only pass about 0.00007%), and the remote high-frequency shunt function is effective.

[0121] Cursor 3 in S11 (yellow): -5.61587dB: The return loss of the input port is -5.62dB, and the reflected signal accounts for about 27%. Combined with capacitor shunt, high-frequency interference is efficiently attenuated.

[0122] Cursor 3 in S22 (purple): -7.69136dB: The return loss at the output port is -7.69dB, the reflected signal accounts for about 17%, the impedance matching at the far end high frequency band remains at a reasonable level, and there is no performance drift.

[0123] Cursor 4 corresponds to a typical frequency point within the passband (356.544MHz, within the DC-500MHz passband range). Three parameters verify the low loss and high matching characteristics of the passband.

[0124] Cursor 4 in S21 (cyan): -0.69047dB: The transmission loss is only 0.69dB, which is far below the design requirement of ≤2dB, indicating that the useful signal in the passband has almost no attenuation and the transmission efficiency is extremely high.

[0125] Cursor 4 in S11 (yellow): -23.69438dB: The input port return loss is -23.89dB, which is far better than the design requirement of ≥18dB. The signal reflection is minimal and the input impedance matching is excellent.

[0126] The cursor 4 in S22 (purple): -24.55854dB indicates that the return loss at the output port is -24.56dB, which is also better than the specification of ≥18dB. The output impedance matching is stable and the impedance consistency of the entire link within the passband is good.

[0127] Figure 6 The 12 cursor parameters and curve trends jointly verify that the design specifications of this utility model low-pass filter, such as passband loss ≤2dB, cutoff frequency ≥500MHz, 700MHz suppression ≥20dBc, and ≤20GHz suppression ≥30dBc, all meet the requirements. Moreover, the impedance matching is stable and the wide-band performance is stable, which fully meets the high-frequency signal processing needs of scenarios such as measurement and control systems.

[0128] Finally, it should be noted that the methods and devices described in detail above are merely embodiments, and those skilled in the art can modify these embodiments in different ways as long as they do not depart from the scope of this utility model.

Claims

1. A low-pass filter circuit, characterized in that: include, An inductor (100) is connected in series between the input port (Num1) and the output port (Num2) via a series branch (L1); A capacitor element (200) is connected in parallel between an inductor element (100) and ground via a parallel branch (L2); In the series branch (L1), the number of inductors (100) is n1, and the number of capacitors (200) in the parallel branch (L2) is n2. The number of inductors (100) n1 and the number of capacitors (200) n2 satisfy the following relationship: n2=2n1+2. Two capacitors (200) and one inductor (100) are arranged alternately along the series branch (L1).

2. The low-pass filter circuit as described in claim 1, characterized in that: The inductor (100) includes at least two secondary inductors (101) and a center inductor (102) disposed between the two secondary inductors (101), the inductance value of the center inductor (102) is H, and the inductance value of the secondary inductors (101) is 0.5~0.95H.

3. The low-pass filter circuit as described in claim 2, characterized in that: The number of secondary inductors (101) is set to two, and the number of central inductors (102) is set to three.

4. The low-pass filter circuit as described in any one of claims 1 to 3, characterized in that: The input port (Num1) and output port (Num2) are connected in parallel with ground with matching resistors (300), and the input port (Num1) and output port (Num2) are connected in series with the inductor (100) with port inductors (400).

5. The low-pass filter circuit as described in any one of claims 1 to 3, characterized in that: The capacitor element (200) includes an intermediate frequency capacitor (201) and a high frequency capacitor (202). The intermediate frequency capacitor (201) and the high frequency capacitor (202) are connected in series on a parallel branch (L2). Both ends of the parallel branch (L2) are grounded. The parallel branch (L2) and the series branch (L1) form a connection point (N). The connection point (N) is located between the intermediate frequency capacitor (201) and the high frequency capacitor (202).

6. The low-pass filter circuit as described in claim 5, characterized in that: The intermediate frequency capacitor (201) is distributed on one side of the series branch (L1), and the high frequency capacitor (202) is distributed on the other side of the series branch (L1). The capacitance of the intermediate frequency capacitor (201) is greater than that of the high frequency capacitor (202).

7. The low-pass filter circuit as described in claim 6, characterized in that: The series branch (L1) has a central axis of symmetry (M), and the capacitor elements (200) on the multiple sets of parallel branches (L2) are distributed in a mirror symmetric manner with respect to the central axis of symmetry (M).

8. The low-pass filter circuit as described in claim 7, characterized in that: The intermediate frequency capacitor (201) includes a secondary capacitor (201a) and a center capacitor (201b). The capacitance of the secondary capacitor (201a) is smaller than that of the center capacitor (201b). The secondary capacitor (201a) is distributed on the parallel branch (L2) near the input port (Num1) and the output port (Num2). The center capacitor (201b) is distributed on the remaining parallel branch (L2).

9. The low-pass filter circuit as described in claim 7 or 8, characterized in that: The high-frequency capacitor (202) includes a first capacitor (202a), a second capacitor (202b), and a third capacitor (202c). The capacitance of the first capacitor (202a) is greater than that of the second capacitor (202b), and the capacitance of the second capacitor (202b) is greater than that of the third capacitor (202c). The first capacitor (202a) is distributed on a parallel branch (L2) near the input port (Num1) and the output port (Num2). The second capacitor (202b) is distributed on a parallel branch (L2) near the central axis of symmetry (M). The third capacitor (202c) is distributed on the parallel branch (L2) between the first capacitor (202a) and the second capacitor (202b).

10. A low-pass filter, characterized in that: Including the low-pass filter circuit as described in claim 4, and further comprising: A housing (500) is provided with a male bolt (501) at one end and a female bolt (502) at the other end. The low-pass filter circuit is disposed in the cavity (503) of the housing (500). The input port (Num1) of the low-pass filter circuit extends into the female bolt (502), and the output port (Num2) of the low-pass filter circuit extends into the male bolt (501).

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