Intelligent WiFi control circuit

Abstract

The utility model discloses an intelligent WiFi control circuit, and relates to the technical field of intelligent control. The utility model aims to solve the problems that a control mode in the prior art is generally a central control mode which is controlled through a control switch, some control modes cannot detect a real-time state, an actuator part is remotely operated, a series of timing and delay control functions do not exist, and the like. The LED driving circuit comprises a power supply management circuit, a signal control LED driving circuit and a signal circuit, the power management circuit and the signal circuit are electrically connected with the signal control LED drive circuit, the signal circuit comprises a signal processing circuit and a DC-DC power conversion circuit, and the signal processing circuit is electrically connected with the DC-DC power conversion circuit. The utility model is used for intelligent control.

Description

Technical Field

[0001] This utility model relates to the field of intelligent control technology, specifically to an intelligent WiFi control circuit. Background Technology

[0002] With the rapid development of technology, the level of intelligence in homes is also constantly improving. This leads to more powerful and efficient intelligent sensing functions in smart home products, enhances the health, comfort, and convenience of various traditional products, and contributes to energy conservation and environmental protection.

[0003] To achieve intelligent equipment, the equipment must first be connected to a network. The control terminal sends control commands through the network to control the equipment. The preferred network access method is a wireless network, which has the advantages of convenient access, adaptability to various complex environments, and low networking costs. Currently, control methods generally involve a central control unit controlling the equipment via a switch. This method sometimes fails to detect real-time status and cannot remotely operate the actuators. Furthermore, it lacks a series of timing and delay control functions. Utility Model Content

[0004] The purpose of this invention is to solve the problems of existing control methods, which generally rely on central control switches for control, sometimes failing to detect real-time status, requiring remote operation of actuators, and lacking a series of timing and delay control functions. Therefore, this invention provides an intelligent WiFi control circuit.

[0005] The technical solution adopted by this utility model to solve the above problems is: an intelligent WiFi control circuit, including a power management circuit, a signal control LED driver circuit, and a signal circuit; the power management circuit and the signal circuit are electrically connected to the signal control LED driver circuit respectively, and the signal circuit includes a signal processing circuit and a DC-DC power conversion circuit, which are electrically connected.

[0006] Preferably, the power management circuit includes a rectifier bridge BR1, a voltage regulator chip U3, a 31st capacitor C31, a 33rd capacitor C33, a 34th capacitor C34, a second inductor L2, a first diode D1, a second diode D2, a 30th resistor R30, a 31st resistor R31, a 32nd resistor R32, a 33rd resistor R33, and a 40th resistor R40.

[0007] The third pin of rectifier bridge BR1 is connected to the live wire RD, and the fourth pin of rectifier bridge BR1 is connected to the neutral wire BK.

[0008] One end of the 34th capacitor C34 is connected to the first pin of the rectifier bridge BR1, and the other end of the 34th capacitor C34 is connected to the second pin of the rectifier bridge BR1.

[0009] The first pin of rectifier bridge BR1 is connected to the thirtieth resistor R30, and the second pin of rectifier bridge BR1 is connected to the fortieth resistor R40.

[0010] One end of the thirty-first capacitor C31 is connected to the first pin of the voltage regulator chip U3, and the other end of the thirty-first capacitor C31 is connected to the second pin of the voltage regulator chip U3; the rectifier bridge BR1 is connected to the voltage regulator chip U3 through the thirty-fourth capacitor C34.

[0011] Preferably, the second pin of the voltage regulating chip U3 is connected to the first diode D1 via the thirty-second resistor R32 and the thirty-first resistor R31;

[0012] The fourth pin of the voltage regulator chip U4 is connected to the second inductor L2 through the thirty-third resistor R33; the thirty-third capacitor C33 is connected in parallel with the second inductor L2 and then connected to the second pin of the voltage regulator chip U3.

[0013] One end of the second diode D2 is grounded, and the other end of the second diode D2 is connected to the second pin of the voltage regulator chip U3.

[0014] Preferably, the signal control LED driving circuit includes a power management chip U5, a voltage regulator chip U4, a push-button switch SW, a first light-emitting diode LED1, a second light-emitting diode LED2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, and a thirty-eighth resistor R38.

[0015] The first pin of the voltage regulator chip U4 is grounded, the second pin of the voltage regulator chip U4 is connected to the VDD power supply, and the third pin of the voltage regulator chip U4 is connected to the first pin of the power management chip U5.

[0016] The source of the third field-effect transistor Q3 is connected to the VDD pin, the gate of the third field-effect transistor Q3 is connected to the 26th resistor R26, and the drain of the third field-effect transistor Q3 is connected to the VZZ pin.

[0017] The source of the fourth field-effect transistor Q4 is grounded, the gate of the fourth field-effect transistor Q4 is connected to the fifth pin of the power management chip U5, and the drain of the fourth field-effect transistor Q4 is connected to the gate of the third field-effect transistor Q3.

[0018] The source of the fifth field-effect transistor Q5 is grounded, the gate of the fifth field-effect transistor Q5 is connected to the tenth pin of the power management chip U5, and the drain of the fifth field-effect transistor Q5 is connected to the VDD pin after passing through the twenty-second resistor R22 and the first light-emitting diode LED1.

[0019] Preferably, one end of the push-button switch SW is connected to the ninth pin of the power management chip U5, and the other end of the push-button switch SW is grounded;

[0020] One end of the second LED2 is connected to the thirty-eighth resistor R38, and the other end of the second LED2 is connected to the twenty-first resistor R21; the tenth pin of the power management chip U5 is grounded after passing through the twenty-fourth resistor R24.

[0021] Preferably, the signal processing circuit includes connector CON1, connector CON2, connector CON3, connector CON4, voltage regulator chip U1, eighth resistor R8, ninth resistor R9, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, thirty-seventh resistor R37, eleventh capacitor C11, first transistor Q and second transistor Q2.

[0022] The base of the first transistor Q1 is connected to the thirty-seventh resistor R37 via the eighth resistor R8. The collector of the first transistor Q1 is connected to the first pin of the voltage regulator chip U1. The emitter of the first transistor Q1 is grounded.

[0023] The base of the second transistor Q2 is connected to the 9th resistor R9 and the 37th resistor R37. The collector of the second transistor Q2 is connected to the second pin of connector CON2 through the 12th resistor R12. The emitter of the second transistor Q2 is connected to the node of the 10th resistor R10 and the second pin of the voltage regulator chip U1.

[0024] Preferably, the fifth pin of the voltage regulator chip U1 is connected to the first pin of connector CON1 and the second pin of connector CON3; the seventh pin of the voltage regulator chip U1 is connected to the first pin of connector CON3 and the second pin of CON1.

[0025] The first pin of the voltage regulator chip U1 is connected to the first pin of connector CON2 and the second pin of connector CON4 via the eleventh resistor R11.

[0026] The eleventh capacitor C11 is connected to the voltage regulator chip U1 and one end is grounded; the fourth pin of the voltage regulator chip U1 is connected to the third pin of connector CON4 and the DC-DC power conversion circuit.

[0027] Preferably, the DC-DC power conversion circuit includes a power management chip U2, a first inductor L1, a third diode D3, a sixth diode D6, a supercapacitor BAT1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a ninth capacitor C9, a first resistor R1, a second resistor R2, a third resistor R3, and a sixth resistor R6.

[0028] One end of the supercapacitor BAT1 is connected to the third diode D3, and the other end of the supercapacitor BAT1 is connected to the sixth resistor R6.

[0029] The supercapacitor BAT1 is also connected to the fourth pin of the voltage regulator chip U1; the sixth resistor R6 and the ninth capacitor C9 are connected in parallel with one end grounded.

[0030] The third capacitor C3 and the fifth capacitor C5 are connected in parallel, with one end connected to the first inductor L1 and the other end grounded; the sixth diode D6 and the fourth capacitor C4 are connected in parallel, with one end grounded.

[0031] The first capacitor C1 and the second capacitor C2 are connected in parallel. One end of the connection is connected to the sixth pin of the power management chip U2, and the other end is grounded.

[0032] Preferably, the eighth pin of the power management chip U2 is connected to the third resistor R3; the first resistor R1 and the second resistor R2 are connected in series, one end of the second resistor R2 is connected to the fifth capacitor C5, and one end of the first resistor R1 is grounded.

[0033] The node connection between the fifth pin of the power management chip U2 and the first resistor R1 and the second resistor R2;

[0034] The second pin of the power management chip U2 is connected to the first inductor L1; the third pin of the power management chip U2 is connected to the fourth capacitor C4; and the fourth pin of the power management chip U2 is grounded.

[0035] This utility model has the following beneficial technical effects:

[0036] This invention adds a smart chip module to a conventional switch circuit, and connects the circuit to a mobile phone APP to achieve intelligent control, such as remotely opening and closing valves via mobile phone, opening or closing valves at timed intervals, delaying, cyclical actions, and other operations.

[0037] This invention employs a power management circuit, a signal control LED driver circuit, and signal circuits that are interconnected via networks VZZ, VDD, and GND. Remote switching, timing, delay, and looping functions are achieved through the transmission and reception of commands between the U5 chip and the APP. This invention enables remote intelligent control via mobile APP and WeChat mini-program, primarily for remote switching, timing, delay, and looping operations. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the power management circuit of this utility model;

[0039] Figure 2 This is a schematic diagram of the signal-controlled LED driver circuit of this utility model;

[0040] Figure 3This is a schematic diagram of the signal processing circuit of this utility model;

[0041] Figure 4 This is a schematic diagram of the DC-DC power conversion circuit of this utility model;

[0042] Figure 5 This is the circuit schematic diagram of this utility model. Detailed Implementation

[0043] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. The specific embodiments described herein are merely for explaining the present utility model and are not intended to limit the present utility model.

[0044] Specific implementation method one: Combining Figures 1 to 5 This embodiment describes an intelligent WiFi control circuit, including a power management circuit, a signal control LED driver circuit, and a signal circuit. The power management circuit and the signal circuit are electrically connected to the signal control LED driver circuit. The signal circuit includes a signal processing circuit and a DC-DC power conversion circuit, which are electrically connected. This embodiment is preferably used for remote control devices, such as remotely opening and closing valves via mobile phone, timed opening or closing of valves, delays, and cyclic operations. This invention supports voice control from mainstream smart speakers such as Tmall Genie, Xiao Ai, and Baidu Smart Speaker.

[0045] In a preferred embodiment, the power management circuit includes a rectifier bridge BR1, a voltage regulator chip U3, a 31st capacitor C31, a 33rd capacitor C33, a 34th capacitor C34, a second inductor L2, a first diode D1, a second diode D2, a 30th resistor R30, a 31st resistor R31, a 32nd resistor R32, a 33rd resistor R33, and a 40th resistor R40.

[0046] The third pin of rectifier bridge BR1 is connected to the live wire RD, and the fourth pin of rectifier bridge BR1 is connected to the neutral wire BK.

[0047] One end of the 34th capacitor C34 is connected to the first pin of the rectifier bridge BR1, and the other end of the 34th capacitor C34 is connected to the second pin of the rectifier bridge BR1.

[0048] The first pin of rectifier bridge BR1 is connected to the thirtieth resistor R30, and the second pin of rectifier bridge BR1 is connected to the fortieth resistor R40.

[0049] One end of the thirty-first capacitor C31 is connected to the first pin of the voltage regulator chip U3, and the other end of the thirty-first capacitor C31 is connected to the second pin of the voltage regulator chip U3.

[0050] The rectifier bridge BR1 is connected to the voltage regulator chip U3 via the thirty-fourth capacitor C34.

[0051] The second pin of the voltage regulator chip U3 is connected to the first diode D1 via the thirty-second resistor R32 and the thirty-first resistor R31.

[0052] The fourth pin of the voltage regulator chip U4 is connected to the second inductor L2 through the thirty-third resistor R33;

[0053] The 33rd capacitor C33 and the second inductor L2 are connected in parallel and then connected to the second pin of the voltage regulator chip U3.

[0054] One end of the second diode D2 is grounded, and the other end of the second diode D2 is connected to the second pin of the voltage regulator chip U3.

[0055] Specific Implementation Method Two: Combining Figures 1 to 5 This embodiment describes a signal-controlled LED driver circuit that includes a power management chip U5, a voltage regulator chip U4, a push-button switch SW, a first light-emitting diode LED1, a second light-emitting diode LED2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, and a thirty-eighth resistor R38.

[0056] The first pin of the voltage regulator chip U4 is grounded, the second pin of the voltage regulator chip U4 is connected to the VDD power supply, and the third pin of the voltage regulator chip U4 is connected to the first pin of the power management chip U5.

[0057] The source of the third field-effect transistor Q3 is connected to the VDD pin, the gate of the third field-effect transistor Q3 is connected to the 26th resistor R26, and the drain of the third field-effect transistor Q3 is connected to the VZZ pin.

[0058] The source of the fourth field-effect transistor Q4 is grounded, the gate of the fourth field-effect transistor Q4 is connected to the fifth pin of the power management chip U5, and the drain of the fourth field-effect transistor Q4 is connected to the gate of the third field-effect transistor Q3.

[0059] The source of the fifth field-effect transistor Q5 is grounded, the gate of the fifth field-effect transistor Q5 is connected to the tenth pin of the power management chip U5, and the drain of the fifth field-effect transistor Q5 is connected to the VDD pin after passing through the twenty-second resistor R22 and the first light-emitting diode LED1.

[0060] One end of the push-button switch SW is connected to the ninth pin of the power management chip U5, and the other end of the push-button switch SW is grounded.

[0061] One end of the second light-emitting diode LED2 is connected to the thirty-eighth resistor R38, and the other end of the second light-emitting diode LED2 is connected to the twenty-first resistor R21.

[0062] The tenth pin of the power management chip U5 is grounded after passing through the twenty-fourth resistor R24.

[0063] The other components and connections are the same as in Specific Implementation Method 1.

[0064] Specific implementation method three: Combining Figures 1 to 5 This embodiment describes a signal processing circuit that includes connectors CON1, CON2, CON3, and CON4, a voltage regulator chip U1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirty-seventh resistor R37, an eleventh capacitor C11, a first transistor Q, and a second transistor Q2.

[0065] The base of the first transistor Q1 is connected to the thirty-seventh resistor R37 via the eighth resistor R8. The collector of the first transistor Q1 is connected to the first pin of the voltage regulator chip U1. The emitter of the first transistor Q1 is grounded.

[0066] The base of the second transistor Q2 is connected to the 9th resistor R9 and the 37th resistor R37. The collector of the second transistor Q2 is connected to the second pin of connector CON2 through the 12th resistor R12. The emitter of the second transistor Q2 is connected to the node of the 10th resistor R10 and the second pin of the voltage regulator chip U1.

[0067] The fifth pin of the voltage regulator chip U1 is connected to the first pin of connector CON1 and the second pin of connector CON3, respectively.

[0068] The seventh pin of the voltage regulator chip U1 is connected to the first pin of connector CON3 and the second pin of CON1.

[0069] The first pin of the voltage regulator chip U1 is connected to the first pin of connector CON2 and the second pin of connector CON4 via the eleventh resistor R11.

[0070] The eleventh capacitor C11 is connected to the voltage regulator chip U1 and one end is grounded; the fourth pin of the voltage regulator chip U1 is connected to the third pin of connector CON4 and the DC-DC power conversion circuit.

[0071] The other components and connections are the same as in Specific Implementation Method 1.

[0072] Specific implementation method four: Combination Figures 1 to 5This embodiment describes a DC-DC power conversion circuit that includes a power management chip U2, a first inductor L1, a third diode D3, a sixth diode D6, a supercapacitor BAT1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a ninth capacitor C9, a first resistor R1, a second resistor R2, a third resistor R3, and a sixth resistor R6.

[0073] One end of the supercapacitor BAT1 is connected to the third diode D3, and the other end of the supercapacitor BAT1 is connected to the sixth resistor R6.

[0074] The supercapacitor BAT1 is also connected to the fourth pin of the voltage regulator chip U1; the sixth resistor R6 and the ninth capacitor C9 are connected in parallel with one end grounded.

[0075] The third capacitor C3 and the fifth capacitor C5 are connected in parallel, with one end connected to the first inductor L1 and the other end grounded; the sixth diode D6 and the fourth capacitor C4 are connected in parallel, with one end grounded.

[0076] The first capacitor C1 and the second capacitor C2 are connected in parallel. One end of the connection is connected to the sixth pin of the power management chip U2, and the other end is grounded.

[0077] The eighth pin of the power management chip U2 is connected to the third resistor R3;

[0078] The first resistor R1 and the second resistor R2 are connected in series. One end of the second resistor R2 is connected to the fifth capacitor C5, and one end of the first resistor R1 is grounded.

[0079] The node connection between the fifth pin of the power management chip U2 and the first resistor R1 and the second resistor R2;

[0080] The second pin of the power management chip U2 is connected to the first inductor L1; the third pin of the power management chip U2 is connected to the fourth capacitor C4; and the fourth pin of the power management chip U2 is grounded.

[0081] The other components and connections are the same as in Specific Implementation Method 1.

[0082] Specific Implementation Method Five: Combining Figures 1 to 5 For a description of this implementation method, please refer to [link / reference]. Figure 1 As shown, this circuit is a power-related circuit used to convert input AC power to DC power. It mainly consists of an input interface, rectification, filtering, and voltage regulation components.

[0083] 1. Input section

[0084] F1 (Fuse): The left side has an input interface labeled "JK250-050". The live wire (BR) and neutral wire (BK) are connected first, passing through fuse F1 to prevent overcurrent in the circuit. One end of F1 is connected to the input live wire (BR), and the other end is connected to the AC-V+ pin of rectifier bridge U3.

[0085] 2. Rectifier section

[0086] U3 (Rectifier Bridge HD308M): The F1 output is connected to the AC-V+ pin of U3, and the AC-V- pin of U3 is connected to the input neutral line (BK). The rectifier bridge rectifies the input AC power, and its DC-V+ pin outputs the positive terminal of the rectified DC power, while its DC-V- pin outputs the negative terminal of the DC power.

[0087] 3. Filtering section

[0088] C10 (470μF 10V capacitor): Connected in parallel between the DC-V+ and DC-V- pins of rectifier bridge U3 to filter out the AC component in the rectified DC power, making the output DC smoother.

[0089] 4. Voltage stabilization and other components

[0090] Q1 (transistor): Its base is connected to some control lines, its emitter is grounded (GND), and its collector is connected to subsequent circuits.

[0091] C11, C12, C13, C14 (capacitors): C11 and C12 are high-frequency filter capacitors, connected in parallel in the power output section (connected between the collector of Q1 and ground, etc.); C13 and C14 are used for further filtering or voltage regulation functions, and are connected in the power output line.

[0092] D1 (Diode B52S23): Anode grounded, cathode connected to the power output line, serving as a clamp or protection mechanism.

[0093] R40 (resistor): Connected to the power output line for functions such as current limiting and voltage division.

[0094] VCC: This is the processed power output terminal, providing a stable DC power supply for subsequent circuits.

[0095] See Figure 2 As shown, this circuit is a hybrid of digital and analog functions, including power management, signal control, and LED driving. It mainly consists of a chip U5, multiple MOSFETs (Q3, Q4, Q5), resistors (R21-R26, R38), a push-button switch SW7, and an LED (LED2).

[0096] 1. Power supply pins of chip U5: Pin 8 (VCC) is connected to the power supply, and pin 9 (GND) is grounded. Control and communication pins: Pin 1 (EN), pin 3 (ADC), and pin 4 (EN1) are used for external control and data acquisition; pin 15 (TX) and pin 14 (RX) are used for communication; pin 5 (B), pin 6 (G), and pin 7 (W) are used for output control signals; pins 10-13 (IO0-IO3) are general-purpose input / output pins.

[0097] 2. MOSFET and Resistor Section: Q3 (PMOS3401): Source connected to VZZ power supply, gate connected to other control signals via R26 (1K), drain connected to VDD, forming a power switching or signal conditioning path. Q4 (NMOS): Source grounded, gate connected to control signal D via R25 (10K), drain connected to other circuit nodes for signal switching control. Q5 (NMOS3400): Source grounded, gate connected to control signal via R22 (1K), drain connected to VDD and connected in parallel with a diode (possibly for protection or level shifting).

[0098] 3. Button and LED Section: SW7 (Button Switch): One end is connected to the power supply, and the other end is grounded, used to generate external input signals. LED2: The anode is connected to VDD through R38 (3.6K), and the cathode is grounded through R21 (3.4K), used to indicate circuit status and other functions. Overall, these components are interconnected through circuit board wiring to achieve specific electrical functions, such as signal processing, power management, and status indication.

[0099] See Figure 3 As shown, this circuit is a signal processing circuit, involving functions such as voltage conversion and signal amplification.

[0100] 1. Connector CON1 (XHED-0-2P): It has 2 pins. Pin 1 is connected to other parts of the circuit, and pin 2 is marked "GND" and connected to ground.

[0101] CON2(XHED-0-3P): It has 3 pins. Pins 1 and 2 are connected to the "5V" power supply, and pin 3 is marked "GND" and connected to ground.

[0102] 2. Resistors R8 (103, i.e., 10kΩ): One end is connected to the collector of Q1 (8050L), and the other end is connected to ground. R9 (204, i.e., 200kΩ): One end is connected to the collector of Q2 (8050), and the other end is connected to the power supply marked "VZZ". It is also connected to ground through R10. R10 (153, i.e., 15kΩ): One end is connected to the junction point of R9 and the collector of Q2, and the other end is grounded. R11 (103, i.e., 10kΩ): One end is connected to the 5V pin of CON2, and the other end is connected to pin 1 (BI) of U1 (RZ7888). R12 (201, i.e., 200Ω): One end is connected to the 5V pin of CON2, and the other end is connected to pin 2 (FI) of U1 (RZ7888).

[0103] 3. Capacitor C11 (104, i.e. 0.1μF): One end is connected to the 5V pin of CON2, and the other end is grounded, serving as a filter.

[0104] 4. Transistor Q1 (8050L): Base connected to pin 7 of U1 (function pin not specified), emitter grounded, collector grounded through R8. Q2 (8050): Base connected to pin 8 (BO) of U1, emitter connected to pin 6 (FO) of U1, collector connected to R9.

[0105] 5. Chip U1 (RZ7888): Pin 1 (BI) is connected to the 5V pin of CON2 via R11.

[0106] Pin 2 (FI) is connected to the 5V pin of CON2 via R12.

[0107] Pin 3 (GND) is grounded.

[0108] Pin 4 (VDD) is connected to the 5V pin of CON2.

[0109] Pin 5 (function not explicitly labeled).

[0110] Pin 6 (FO) is connected to the emitter of Q2.

[0111] Pin 7 (without a clearly defined function) is connected to the base of Q1.

[0112] Pin 8 (BO) is connected to the base of Q2.

[0113] See Figure 4 As shown, this circuit is a DC-DC power conversion circuit based on the SW34063AG chip. It is typically used to convert the input voltage into a stable output voltage and can perform boost, buck, or inverting functions, depending on the circuit connection method. In this circuit, a buck DC-DC converter is used to convert a higher input voltage into a lower stable output voltage to power the load.

[0114] 1. Input section:

[0115] BAT1 (1F supercapacitor): As a power input, it is connected to the VZZ node via Schottky diode D3 (SS24). D3 prevents current from flowing back into BAT1.

[0116] R6 (102, i.e., 1kΩ resistor): connected in parallel with C9 (16V 22uF capacitor) between VDD and ground, used for soft start or voltage stabilization when the power supply is powered on.

[0117] 2. Energy storage and filtering section:

[0118] L1 (221uH inductor): Connected between VDD and the chip's SW pin (pin 3), it stores and releases energy during DC-DC conversion.

[0119] C3 (104, i.e., 0.1uF capacitor) and C5 (16V 100uF capacitor): connected in parallel after L1 for filtering and voltage stabilization.

[0120] D6 (SS26 Schottky diode): Connected in parallel with C4 (471, i.e., 470pF capacitor) between L1 and the chip's GND pin (pin 4), it plays a role in the freewheeling phase of the inductor current.

[0121] 3. Chip section (U2-SW34063AG)

[0122] Pin 1 (C): Related to the external compensation network.

[0123] Pin 2 (E): Error amplifier related pin, connected to the feedback network.

[0124] Pin 3 (TC): Connected to inductor L1, it is a switching node.

[0125] Pin 4 (GND): Ground.

[0126] Pin 5 (CMP): Connect feedback resistors R1 (342, i.e., 3.4kΩ) and R2 (113, i.e., 110kΩ) for feedback voltage sampling and control of output voltage stability.

[0127] Pin 6 (VCC): The chip power supply pin, which is connected to the VCC power supply after being filtered by R3 (0.33Ω resistor), C2 (35V 100uF), and C1 (104, i.e., 0.1uF).

[0128] Pin 7(D): Internal connection or floating.

[0129] Pin 8(C): Related to the external compensation network.

[0130] 4. Output section

[0131] R3 (0.33Ω resistor): Connected in series between the output VCC and chip pin 6, used for current sensing or limiting.

[0132] C1 (104, i.e., 0.1uF capacitor) and C2 (35V 100uF capacitor): connected in parallel at the output terminal for filtering, making the output voltage more stable.

[0133] The other components and connections are the same as in Specific Implementation Method 1.

[0134] The above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Various modifications and variations can be made to this utility model by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A smart WiFi control circuit, characterized in that: It includes a power management circuit, a signal control LED driver circuit, and a signal circuit; the power management circuit and the signal circuit are electrically connected to the signal control LED driver circuit, and the signal circuit includes a signal processing circuit and a DC-DC power conversion circuit, which are electrically connected.

2. The intelligent WiFi control circuit according to claim 1, characterized in that: The power management circuit includes a rectifier bridge BR1, a voltage regulator chip U3, a 31st capacitor C31, a 33rd capacitor C33, a 34th capacitor C34, a second inductor L2, a first diode D1, a second diode D2, a 30th resistor R30, a 31st resistor R31, a 32nd resistor R32, a 33rd resistor R33, and a 40th resistor R40. The third pin of rectifier bridge BR1 is connected to the live wire RD, and the fourth pin of rectifier bridge BR1 is connected to the neutral wire BK. One end of the 34th capacitor C34 is connected to the first pin of the rectifier bridge BR1, and the other end of the 34th capacitor C34 is connected to the second pin of the rectifier bridge BR1. The first pin of rectifier bridge BR1 is connected to the thirtieth resistor R30, and the second pin of rectifier bridge BR1 is connected to the fortieth resistor R40. One end of the thirty-first capacitor C31 is connected to the first pin of the voltage regulator chip U3, and the other end of the thirty-first capacitor C31 is connected to the second pin of the voltage regulator chip U3. The rectifier bridge BR1 is connected to the voltage regulator chip U3 via the thirty-fourth capacitor C34.

3. The intelligent WiFi control circuit according to claim 2, characterized in that: The second pin of the voltage regulator chip U3 is connected to the first diode D1 via the thirty-second resistor R32 and the thirty-first resistor R31. The fourth pin of the voltage regulator chip U4 is connected to the second inductor L2 through the thirty-third resistor R33; The 33rd capacitor C33 and the second inductor L2 are connected in parallel and then connected to the second pin of the voltage regulator chip U3. One end of the second diode D2 is grounded, and the other end of the second diode D2 is connected to the second pin of the voltage regulator chip U3.

4. The intelligent WiFi control circuit according to claim 1, characterized in that: The signal control LED driver circuit includes a power management chip U5, a voltage regulator chip U4, a push-button switch SW, a first light-emitting diode LED1, a second light-emitting diode LED2, a third field-effect transistor Q3, a fourth field-effect transistor Q4, a fifth field-effect transistor Q5, a twenty-first resistor R21, a twenty-second resistor R22, a twenty-fourth resistor R24, a twenty-fifth resistor R25, a twenty-sixth resistor R26, and a thirty-eighth resistor R38. The first pin of the voltage regulator chip U4 is grounded, the second pin of the voltage regulator chip U4 is connected to the VDD power supply, and the third pin of the voltage regulator chip U4 is connected to the first pin of the power management chip U5. The source of the third field-effect transistor Q3 is connected to the VDD pin, the gate of the third field-effect transistor Q3 is connected to the 26th resistor R26, and the drain of the third field-effect transistor Q3 is connected to the VZZ pin. The source of the fourth field-effect transistor Q4 is grounded, the gate of the fourth field-effect transistor Q4 is connected to the fifth pin of the power management chip U5, and the drain of the fourth field-effect transistor Q4 is connected to the gate of the third field-effect transistor Q3. The source of the fifth field-effect transistor Q5 is grounded, the gate of the fifth field-effect transistor Q5 is connected to the tenth pin of the power management chip U5, and the drain of the fifth field-effect transistor Q5 is connected to the VDD pin after passing through the twenty-second resistor R22 and the first light-emitting diode LED1.

5. The intelligent WiFi control circuit according to claim 4, characterized in that: One end of the push-button switch SW is connected to the ninth pin of the power management chip U5, and the other end of the push-button switch SW is grounded. One end of the second light-emitting diode LED2 is connected to the thirty-eighth resistor R38, and the other end of the second light-emitting diode LED2 is connected to the twenty-first resistor R21. The tenth pin of the power management chip U5 is grounded after passing through the twenty-fourth resistor R24.

6. The intelligent WiFi control circuit according to claim 1, characterized in that: The signal processing circuit includes connectors CON1, CON2, CON3, and CON4, a voltage regulator chip U1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirty-seventh resistor R37, an eleventh capacitor C11, a first transistor Q, and a second transistor Q2. The base of the first transistor Q1 is connected to the thirty-seventh resistor R37 via the eighth resistor R8. The collector of the first transistor Q1 is connected to the first pin of the voltage regulator chip U1. The emitter of the first transistor Q1 is grounded. The base of the second transistor Q2 is connected to the 9th resistor R9 and the 37th resistor R37. The collector of the second transistor Q2 is connected to the second pin of connector CON2 through the 12th resistor R12. The emitter of the second transistor Q2 is connected to the node of the 10th resistor R10 and the second pin of the voltage regulator chip U1.

7. The intelligent WiFi control circuit according to claim 6, characterized in that: The fifth pin of the voltage regulator chip U1 is connected to the first pin of connector CON1 and the second pin of connector CON3, respectively. The seventh pin of the voltage regulator chip U1 is connected to the first pin of connector CON3 and the second pin of CON1. The first pin of the voltage regulator chip U1 is connected to the first pin of connector CON2 and the second pin of connector CON4 via the eleventh resistor R11. The eleventh capacitor C11 is connected to the voltage regulator chip U1 and one end is grounded; the fourth pin of the voltage regulator chip U1 is connected to the third pin of connector CON4 and the DC-DC power conversion circuit.

8. The intelligent WiFi control circuit according to claim 1, characterized in that: The DC-DC power conversion circuit includes a power management chip U2, a first inductor L1, a third diode D3, a sixth diode D6, a supercapacitor BAT1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a ninth capacitor C9, a first resistor R1, a second resistor R2, a third resistor R3, and a sixth resistor R6. One end of the supercapacitor BAT1 is connected to the third diode D3, and the other end of the supercapacitor BAT1 is connected to the sixth resistor R6. The supercapacitor BAT1 is also connected to the fourth pin of the voltage regulator chip U1; the sixth resistor R6 and the ninth capacitor C9 are connected in parallel with one end grounded. The third capacitor C3 and the fifth capacitor C5 are connected in parallel, with one end connected to the first inductor L1 and the other end grounded; the sixth diode D6 and the fourth capacitor C4 are connected in parallel, with one end grounded. The first capacitor C1 and the second capacitor C2 are connected in parallel. One end of the connection is connected to the sixth pin of the power management chip U2, and the other end is grounded.

9. The intelligent WiFi control circuit according to claim 8, characterized in that: The eighth pin of the power management chip U2 is connected to the third resistor R3; The first resistor R1 and the second resistor R2 are connected in series. One end of the second resistor R2 is connected to the fifth capacitor C5, and one end of the first resistor R1 is grounded. The node connection between the fifth pin of the power management chip U2 and the first resistor R1 and the second resistor R2; The second pin of the power management chip U2 is connected to the first inductor L1; the third pin of the power management chip U2 is connected to the fourth capacitor C4; and the fourth pin of the power management chip U2 is grounded.

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