Power supply voltage adjustable circuit applied to radio frequency amplifier and radio frequency amplifier

Abstract

The utility model relates to the technical field of power supply design of a radio frequency amplifier, in particular to a power supply voltage adjustable circuit applied to the radio frequency amplifier and the radio frequency amplifier. The power supply voltage adjustable circuit applied to the radio frequency amplifier comprises a power supply control chip and a switch driving circuit which are in power supply connection with an external power supply, the switch driving circuit is connected with the power supply control chip; the peripheral circuit is connected with the power supply control chip; one end of the current-limiting protection circuit is connected with the voltage output end of the power supply control chip, and the other end of the current-limiting protection circuit is connected with the power supply control chip; one end of the enabling drive circuit is connected with the power supply control chip, and the other end of the enabling drive circuit is connected with a control circuit of the radio-frequency amplifier; one end of the digital output voltage regulation circuit is connected with the power supply control chip, and the other end and the switch driving circuit are connected with the voltage output end of the power supply control chip. The power supply circuit realizes high-precision adjustability and stable output of the power supply voltage of the radio-frequency amplifier, and is suitable for a communication system with high-frequency and high-stability requirements.

Description

Technical Field

[0001] This utility model relates to the field of power supply design technology for radio frequency amplifiers, specifically to an adjustable power supply voltage circuit for radio frequency amplifiers and a radio frequency amplifier. Background Technology

[0002] With the continuous development of technology, the traditional fixed power supply voltage circuit structure of radio frequency amplifiers can hardly meet the needs of technological progress. Therefore, those skilled in the art have proposed a variety of technologies for adjusting the power supply voltage of radio frequency amplifiers, such as: 1) envelope tracking technology; 2) linear power supply modulator; 3) switching power supply modulator; 4) hybrid power supply modulator; 5) multi-mode power amplifier. However, none of these existing methods are suitable for communication systems with high frequency and high stability requirements.

[0003] Therefore, those skilled in the art urgently need to provide a novel power supply voltage adjustable circuit for use in radio frequency amplifiers. Utility Model Content

[0004] Therefore, the technical problem to be solved by this utility model is to overcome the defects existing in the prior art, thereby providing a power supply voltage adjustable circuit for use in radio frequency amplifiers.

[0005] An adjustable power supply voltage circuit for use in RF amplifiers includes:

[0006] A power control chip and a switch drive circuit that are connected to an external power supply; and the switch drive circuit is connected to the power control chip.

[0007] Peripheral circuits connected to the power control chip;

[0008] A current-limiting protection circuit with one end connected to the voltage output terminal of the power control chip and the other end connected to the power control chip.

[0009] In addition, an enable drive circuit that is connected at one end to the power control chip and at the other end to the control circuit of the RF amplifier;

[0010] It also includes: a digital output voltage regulation circuit; one end of the digital output voltage regulation circuit is connected to the power control chip, and the other end, together with the switch drive circuit, is connected to the voltage output terminal of the power control chip.

[0011] Preferably, the switch driving circuit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a second energy storage unit, a first protection unit, a second protection unit, a third protection unit, a fourth protection unit, a second sampling resistor, and an input resistor;

[0012] The positive terminal of the 48V external power supply is connected to the first protection unit and grounded;

[0013] The power control chip is connected to the second protection unit through the first network connection point 48V-1 and is grounded;

[0014] Furthermore, the 48V positive terminal, the input resistor, and the first network connection point 48V-1 are connected in sequence;

[0015] The enable signal drive circuit's pin VCC is connected to the third protection unit and grounded;

[0016] The current limiting protection circuit is connected to the fourth protection unit through the second network connection point VCC-1 and is grounded;

[0017] One end of the second energy storage unit is connected to the SW1 pin of the first switching unit, the third switching unit, and the power control chip, and the other end is connected to the SW2 pin of the second switching unit, the fourth switching unit, and the power control chip.

[0018] Furthermore, the first switching unit is also connected to the first network connection point 48V-1 and the power control chip pin TG1; the second switching unit is also connected to the second network connection point VCC-1 and the power control chip pin TG2.

[0019] The third switching unit is also connected to pins BG1 and SNSP of the power control chip;

[0020] The fourth switching unit is also connected to pins BG2 and SNSP of the power control chip;

[0021] Pin SNSP is connected to the second sampling resistor and grounded.

[0022] Preferably, the input terminal of the enable drive circuit is connected to the positive terminal of the 3.3V voltage of the control circuit, and the 5V voltage output terminal of the enable drive circuit is connected to the EN pin of the power control chip.

[0023] Preferably, the current limiting protection circuit includes: capacitor C18, resistor R21, capacitor CC3, capacitor C20; a first sampling resistor, a first fuse, and a second fuse;

[0024] The pin VCC, the first sampling resistor, and the second network connection point VCC-1 are connected in sequence;

[0025] The VCC pin is connected to one end of the first fuse, and the other end of the first fuse is connected to one end of the resistor R21; the other end of the resistor R21 is connected to one end of the capacitor C18 and the ISN pin of the power control chip; the other end of the first fuse is connected to the capacitor CC3 and grounded.

[0026] The second network connection point VCC-1 is connected to one end of the second fuse, and the other end of the second fuse is connected to capacitor C20 and grounded; the other end of the second fuse is also connected to the other end of capacitor C18 and the ISP pin of the power control chip.

[0027] Preferably, the digital output voltage regulation circuit includes a digital voltage regulation circuit and a voltage acquisition circuit;

[0028] One end of the digital voltage regulation circuit is connected to the power control chip, and the other end is connected to one end of the voltage acquisition circuit.

[0029] The other end of the voltage acquisition circuit and the switch drive circuit are connected to the voltage output terminal of the power control chip.

[0030] Preferably, the voltage acquisition circuit includes: a first resistor, a ninth resistor, and a fifth resistor that can be deselected;

[0031] The first, fifth, and ninth resistors are connected in series and grounded together with the GND pin of the potentiometer in the digital adjustment circuit. The fifth resistor is detachably connected to both the first and ninth resistors. When the fifth resistor is not used, the first and ninth resistors are not connected.

[0032] The first resistor is connected to the VCC pin.

[0033] Preferably, the digital voltage regulation circuit includes: a potentiometer, a potentiometer control unit, a potentiometer protection unit, and a feedback voltage regulation unit;

[0034] The 5V voltage output terminal, potentiometer control unit, and potentiometer are connected in sequence.

[0035] The 5V voltage output terminal is connected to the VDD pin of the potentiometer;

[0036] The 5V voltage output terminal is connected to the VLOGIC pin of the potentiometer, and at the same time, the 5V voltage output terminal is connected to the potentiometer protection unit and grounded;

[0037] The feedback voltage regulation unit includes: a fourth resistor and an eighth resistor that can be deselected, and a potentiometer resistor;

[0038] The potentiometer pin W, the eighth resistor, the fourth resistor, and the input terminal of the potentiometer resistor are connected in sequence;

[0039] The pin FB of the power control chip is connected to the pin W of the potentiometer through the eighth resistor; the fourth resistor is connected to the common connection terminal of the pin FB of the power control chip and the eighth resistor; wherein the eighth resistor can be detachably connected to the pin FB of the power control chip, the pin W of the potentiometer and the fourth resistor.

[0040] When the eighth resistor is not in use: pin FB of the power control chip is not connected to pin W of the potentiometer;

[0041] The first output terminal of the potentiometer resistor is connected to the common connection terminal of the first resistor and the fifth resistor, and is also connected to the B pin of the potentiometer.

[0042] The second output terminal of the potentiometer resistor is connected to the common connection terminal of the fifth and ninth resistors, and is also connected to the potentiometer's A pin.

[0043] Specifically, the potentiometer resistor, the fourth resistor, the potentiometer pin A, and the potentiometer pin B are all detachably connected.

[0044] When the potentiometer resistor is not in use: the potentiometer resistor, potentiometer pin A, potentiometer pin B, and the fourth resistor are not connected;

[0045] Furthermore, the fifth and eighth resistors can be used simultaneously or not; the potentiometer resistor and the fifth resistor cannot be used at the same time.

[0046] A radio frequency amplifier includes: a control circuit, a first amplifier, a second amplifier, a third amplifier, and a laser resonant cavity connected in sequence for power supply;

[0047] It also includes: a power supply voltage adjustable circuit for use in RF amplifiers; the output of the power supply voltage adjustable circuit for use in RF amplifiers is connected to power supply to the first amplifier, the second amplifier and the third amplifier respectively;

[0048] The input terminal of the adjustable power supply voltage circuit used in RF amplifiers is connected to an external power supply.

[0049] The technical solution of this utility model has the following advantages:

[0050] This invention achieves high-precision adjustable and stable output of the RF amplifier power supply voltage by setting a digital output regulating voltage circuit that can dynamically adjust the feedback parameters and a switching drive circuit that optimizes the switching drive timing. In abnormal conditions, a protection mechanism can be set up to prevent voltage output. It is suitable for communication systems with high frequency and high stability requirements. Attached Figure Description

[0051] To more clearly illustrate the specific embodiments of this utility model or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0052] Figure 1This is a block diagram of the adjustable power supply voltage circuit of the present invention applied to an RF amplifier;

[0053] Figure 2 This is a schematic diagram of a switch drive circuit;

[0054] Figure 3 This is a schematic diagram of the switch driver circuit operating in Buck mode.

[0055] Figure 4 This is a schematic diagram of the switch drive circuit operating in BOOST mode.

[0056] Figure 5 This is a schematic diagram of the first conduction mode of the switch driver circuit in Buck-Boost mode.

[0057] Figure 6 This is a schematic diagram of the second conduction mode of the Buck-Boost switching drive circuit.

[0058] Figure 7 Schematic diagram of the enable drive circuit;

[0059] Figure 8 This is a schematic diagram of a current limiting protection circuit;

[0060] Figure 9 Schematic diagram of a digital output voltage regulation circuit;

[0061] Figure 10 This is a schematic diagram of a portion of the peripheral circuit.

[0062] Figure 11 This is a schematic diagram of another part of the peripheral circuit;

[0063] Figure 12 This is a block diagram of the radio frequency amplifier in Application Example 1. Detailed Implementation

[0064] The technical solution of this utility model will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.

[0065] In the description of this utility model, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0066] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0067] Furthermore, the technical features involved in the different embodiments of this utility model described below can be combined with each other as long as they do not conflict with each other.

[0068] like Figure 1 An adjustable power supply voltage circuit for use in RF amplifiers includes:

[0069] A power control chip and a switch drive circuit that are connected to an external power supply; and the switch drive circuit is connected to the power control chip.

[0070] Peripheral circuits connected to the power control chip;

[0071] A current-limiting protection circuit with one end connected to the voltage output terminal of the power control chip and the other end connected to the power control chip.

[0072] In addition, an enable drive circuit that is connected at one end to the power control chip and at the other end to the control circuit of the RF amplifier;

[0073] It also includes: a digital output voltage regulation circuit; one end of the digital output voltage regulation circuit is connected to the power control chip, and the other end, together with the switch drive circuit, is connected to the voltage output terminal of the power control chip.

[0074] The digital output voltage regulation circuit includes a digital voltage regulation circuit and a voltage acquisition circuit;

[0075] One end of the digital voltage regulation circuit is connected to the power control chip, and the other end is connected to one end of the voltage acquisition circuit.

[0076] The other end of the voltage acquisition circuit and the switch drive circuit are connected to the voltage output terminal of the power control chip.

[0077] Specifically:

[0078] In this embodiment, the power control chip uses the LT3790EFE base chip: U3;

[0079] Switch drive circuit:

[0080] The switch driving circuit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a second energy storage unit, a first protection unit, a second protection unit, a third protection unit, a fourth protection unit, a second sampling resistor, and an input resistor;

[0081] The positive terminal of the 48V external power supply is connected to the first protection unit and grounded;

[0082] The power control chip is connected to the second protection unit through the first network connection point 48V-1 and is grounded;

[0083] Furthermore, the 48V positive terminal, the input resistor, and the first network connection point 48V-1 are connected in sequence;

[0084] The enable signal drive circuit's pin VCC is connected to the third protection unit and grounded;

[0085] The current limiting protection circuit is connected to the fourth protection unit through the second network connection point VCC-1 and is grounded;

[0086] One end of the second energy storage unit is connected to the SW1 pin of the first switching unit, the third switching unit, and the power control chip, and the other end is connected to the SW2 pin of the second switching unit, the fourth switching unit, and the power control chip.

[0087] Furthermore, the first switching unit is also connected to the first network connection point 48V-1 and the power control chip pin TG1; the second switching unit is also connected to the second network connection point VCC-1 and the power control chip pin TG2.

[0088] The third switching unit is also connected to pins BG1 and SNSP of the power control chip;

[0089] The fourth switching unit is also connected to pins BG2 and SNSP of the power control chip;

[0090] Pin SNSP is connected to the second sampling resistor and grounded.

[0091] like Figure 2As shown, in this embodiment, the first switching unit, the second switching unit, the third switching unit and the fourth switching unit are all composed of a SIDR870ADP MOSFET and a 5.11Ω resistor connected together; the four MOSFETs are M1, M2, M3 and M4 respectively; the four corresponding resistors are R18, R17, R25 and R24 respectively, all of which are 0603.

[0092] The second energy storage unit uses an inductor of model SER2918H-103: L2;

[0093] The first protection unit uses a 100μF capacitor: C1;

[0094] The second protection unit uses a 47μF capacitor: C6; two 4.7μF capacitors: C7 and C8; and C6, C7 and C8 are connected in parallel; one common terminal of C6, C7 and C8 is grounded together with C1; the other common terminal of C6, C7 and C8 is connected to the first network connection point 48V-1.

[0095] The third protection unit uses three 100μF capacitors: C3, C4, and C5; C3, C4, and C5 are connected in parallel; the common terminal of C3, C4, and C5 is connected to the VCC pin.

[0096] The fourth protection unit uses two 4.7μF capacitors, C10 and C11; C10 and C11 are connected in parallel; one common terminal of C10 and C11 is connected to the second network connection point VCC-1, and the other common terminal of C10 and C11 is grounded together with the other common terminal of C3, C4 and C5.

[0097] Further, the function of the switch drive circuit in this embodiment is as follows: the upper and lower bridge arm MOSFETs M1, M2, M3 and M4 in the half-bridge topology are controlled by the signals of the power control chip pins TG1, TG2, BG1 and BG2, so as to achieve seamless switching between Buck / Boost / Buck-Boost modes through precise timing and avoid shoot-through current.

[0098] Operating modes of the switch drive circuit:

[0099] like Figure 3 Buck mode: Switching drive circuit input voltage Vin > Switching drive circuit output Vout:

[0100] In the TG1 pin control diagram, the upper bridge arm MOSFET is M1; in the BG1 pin control diagram, the lower bridge arm MOSFET is M2; and the drive signals are complementary.

[0101] Switching sequence: M2 is turned on first, L2 is turned off after the current drops to the threshold, and M1 is turned on until the end of the cycle;

[0102] like Figure 4 In Boost mode, the input voltage Vin of the switch driver circuit is less than the output voltage Vout of the switch driver circuit.

[0103] In the TG2 pin control diagram, the upper bridge arm MOSFET is M4, and in the BG2 pin control diagram, the lower bridge arm MOSFET is M3. The drive signal phase difference is 180° to reduce current ripple.

[0104] Switching sequence: M3 is turned on, L2 current rises to the preset threshold and then turns off, M4 is turned on until the end of the cycle.

[0105] like Figure 5-6 In Buck-Boost mode, the input voltage Vin of the switching driver circuit is approximately equal to the output voltage Vout of the switching driver circuit.

[0106] Four switches alternately conduct: M1 or M4 works in conjunction with M2 or M3, and the duty cycle is automatically adjusted by the internal controller of the power control chip to achieve smooth mode switching;

[0107] Enable drive circuit:

[0108] like Figure 7 The input terminal of the enable drive circuit is connected to the positive terminal of the 3.3V voltage of the control circuit, and the 5V voltage output terminal of the enable drive circuit is connected to the EN pin of the power control chip. Specifically: [Example:] Figure 3 As shown, in this embodiment, the enable drive circuit uses a high-speed, low-power dual inverting buffer, model NC7WZ07P6X: U2. U2 is used to convert the logic level signal transmitted by the microcontroller MCU in the control circuit into a high-level drive signal required by the EN pin of the power control chip, thereby enhancing the drive capability. At the same time, it enables the power control chip to be controlled by the microcontroller MCU. When an abnormal fault occurs, the microcontroller can shut down the VCC output of the microcontroller to ensure that other components in the overall circuit are not damaged.

[0109] like Figure 3 As shown, pin Y1 of U2 in the enable drive circuit is connected to pin EN of the power control chip; the positive terminal of the 3.3V voltage is connected to capacitor C19 and grounded; one end of inductor L1 is connected to the positive terminal of the 3.3V voltage, and the other end is connected to pin VCC of U2; and inductor L1 is connected to capacitor C22 and grounded.

[0110] Current limiting protection circuit:

[0111] like Figure 8 The current limiting protection circuit includes: capacitor C18, resistor R21, capacitor CC3, capacitor C20; a first sampling resistor, a first fuse, and a second fuse;

[0112] The pin VCC, the first sampling resistor, and the second network connection point VCC-1 are connected in sequence;

[0113] The VCC pin is connected to one end of the first fuse, and the other end of the first fuse is connected to one end of the resistor R21; the other end of the resistor R21 is connected to one end of the capacitor C18 and the ISN pin of the power control chip; the other end of the first fuse is connected to the capacitor CC3 and grounded.

[0114] The second network connection point VCC-1 is connected to one end of the second fuse, and the other end of the second fuse is connected to capacitor C20 and grounded; the other end of the second fuse is also connected to the other end of capacitor C18 and the ISP pin of the power control chip.

[0115] In this embodiment, the current limiting protection circuit uses the ISP and ISN pins of the power control chip to detect the output current of the power control chip.

[0116] In this embodiment, the first sampling resistor is an mΩ-level sampling resistor: RS1. RS1 can be selected according to the requirements of the power control chip output voltage and current limiting voltage set by the user.

[0117] Figure 8 The first fuse is FB1; the second fuse is FB2.

[0118] Digital output voltage regulation circuit:

[0119] By designing a voltage acquisition circuit, and simultaneously providing real-time voltage feedback from the FB pin of the power control chip, a stable voltage output is achieved. Specifically... Figure 9 As shown,

[0120] The voltage acquisition circuit includes: a first resistor, a ninth resistor, and a fifth resistor that can be deselected;

[0121] The first, fifth, and ninth resistors are connected in series and grounded together with the GND pin of the potentiometer in the digital adjustment circuit. The fifth resistor is detachably connected to both the first and ninth resistors. When the fifth resistor is not used, the first and ninth resistors are not connected.

[0122] The first resistor is connected to the VCC pin.

[0123] In such Figure 9 In this embodiment, the first resistor is a 68kΩ resistor with a model number of 0603: R1;

[0124] The fifth resistor is a 7.5kΩ resistor, model number 0603: R5;

[0125] The ninth resistor is a 1.77kΩ resistor, model number 0603: R9;

[0126] The digital voltage regulation circuit includes: a potentiometer, a potentiometer control unit, a potentiometer protection unit, and a feedback voltage regulation unit;

[0127] The 5V voltage output terminal, the potentiometer control unit, and the potentiometer are connected in sequence. In this embodiment, the potentiometer control unit consists of a resistor R13 connected to pin SDA and a resistor connected to pin SCL. Resistors R13 and R15 are both connected to the 5V voltage output terminal. Resistors R13 and R15 are both 0805 resistors with a resistance of 4.99kΩ.

[0128] The 5V voltage output terminal is connected to the VDD pin of the potentiometer;

[0129] The 5V voltage output terminal is connected to the VLOGIC pin of the potentiometer, and at the same time, the 5V voltage output terminal is connected to the potentiometer protection unit and grounded; the potentiometer protection unit consists of three capacitors C13, C14 and C12 connected in parallel, wherein capacitors C13 and C14 are both 100μF capacitors of type 0805; capacitor C12 is a 10μF, 10V electrolytic capacitor;

[0130] The feedback voltage regulation unit includes: a fourth resistor and an eighth resistor that can be deselected, and a potentiometer resistor;

[0131] The potentiometer pin W, the eighth resistor, the fourth resistor, and the input terminal of the potentiometer resistor are connected in sequence;

[0132] The pin FB of the power control chip is connected to the pin W of the potentiometer through the eighth resistor; the fourth resistor is connected to the common connection terminal of the pin FB of the power control chip and the eighth resistor; wherein the eighth resistor can be detachably connected to the pin FB of the power control chip, the pin W of the potentiometer and the fourth resistor.

[0133] When the eighth resistor is not in use: pin FB of the power control chip is not connected to pin W of the potentiometer;

[0134] The first output terminal of the potentiometer resistor is connected to the common connection terminal of the first resistor and the fifth resistor, and is also connected to the B pin of the potentiometer.

[0135] The second output terminal of the potentiometer resistor is connected to the common connection terminal of the fifth and ninth resistors, and is also connected to the potentiometer's A pin.

[0136] Specifically, the potentiometer resistor, the fourth resistor, the potentiometer pin A, and the potentiometer pin B are all detachably connected.

[0137] When the potentiometer resistor is not in use: the potentiometer resistor, potentiometer pin A, potentiometer pin B, and the fourth resistor are not connected;

[0138] Furthermore, the fifth and eighth resistors can be used simultaneously or not; the potentiometer resistor and the fifth resistor cannot be used at the same time.

[0139] In this embodiment, a 5kΩ potentiometer resistor is specifically used: R3;

[0140] The fourth resistor is a 0805 resistor with a resistance of 0Ω: R4;

[0141] The eighth resistor is a 0Ω resistor: R8;

[0142] It should be noted that in Figure 9 The output voltage of pin VCC is the output voltage of the power control chip. During debugging, resistors R5 and R8 are removed, and the output voltage of the power control chip is adjusted through potentiometer resistor R3 until it reaches the ideal state. Then, the feedback voltage of pin FB is tested. Based on the feedback voltage, the integrated high-resolution digital potentiometer AD5259BRMZ5-R7 is used to input the corresponding control through the I²C interface: pin SDA or SCL input to make pin W output a fixed voltage. At this time, resistor R3 is removed, and resistors R5 and R8 are added to achieve a stable sampling voltage for pin FB, ensuring the stability of the output voltage of the power control chip. Figure 9 Pins AD0 and AD1 are unused and will not be described in detail. In this embodiment, the potentiometer used is the integrated high-resolution digital potentiometer AD5259BRMZ5-R7:U1.

[0143] Peripheral circuit:

[0144] like Figure 10-11 The peripheral circuitry in this embodiment;

[0145] The overvoltage protection circuit in the peripheral circuit includes capacitor C2, resistor R2 and R7;

[0146] Resistors R2 and R7 form a resistor voltage divider network; specifically: the common terminal of the parallel capacitor C2 and resistor R7 is grounded, and the other common terminal is connected to one end of resistor R2 and then connected to the OVLO pin of the power control chip; the other end of resistor R2 is connected to the VDD pin.

[0147] It should be noted that in practical applications, the overvoltage protection circuit uses a resistor divider network to detect whether the fluctuation of other voltages in the overall circuit, except for the output voltage of the power control chip, reaches the OVLO threshold of 3V. If OVLO > 3V, it will be triggered immediately, setting the SS pin of the power control chip to a low level and immediately shutting off the voltage output of the power control chip.

[0148] Note: The resistance values ​​of R2 and R7 are selected according to the different VDD voltages.

[0149] like Figure 10This is a schematic diagram of the first part of the adaptation circuit in the peripheral circuit. It is easy to see from the figure that the power control chip has the following pins: CTRL, SS, PWM, C / 10#, SH0RT#, VREF, ISMON, IVINMON, EN / UVLO, IVINP, IVINN, VIN, INTVCC, TG1, BST1, SW1, BG1, BG2, SGND, OVLO, FB, VC, RT, SYNC, CLKOUT, CCM, PWMOUT, SGND, TEST1, SNSN, SNSP, ISN, ISP, TG2, NC, BST2, SW2, and two pins PGND.

[0150] like Figure 10-11 The adaptability circuit in the peripheral circuit shown is not difficult to see:

[0151] Pin CTRL is connected to VREF;

[0152] Pin SS is connected to Vref through resistor R6, and is also connected to capacitor CSS1 and grounded; resistor R6 is a 100kΩ 0603 resistor; capacitor CSS1 is a 33nF 0603 capacitor.

[0153] Pins PWM, C / 10#, and SH0RT# are connected to resistors R10, R11, and R14 respectively, and together they are connected to INTVCC.

[0154] Pin VREF is connected to capacitor C9 and grounded; capacitor C9 is a 100nF capacitor, model 0603.

[0155] Pins IVINP and ICINN are connected to both ends of capacitor C17, and the connection point between pin IVINP and capacitor C17 is connected to the positive terminal of the 48V voltage via resistor R19; the connection point between pin IVINP and capacitor C17 is connected to the first network connection point 48V-1 via resistor R22. Resistor R19 is a 0Ω 0805 resistor; resistor R22 is a 51Ω 0603 resistor.

[0156] The VIN pin and one end of capacitor C21 are connected to the positive terminal of the 48V voltage, and the other end of capacitor C21 is grounded; capacitor C24 is a 4.7μF capacitor of type 0805DE.

[0157] Pin BST1 is connected sequentially to one end of Zener diode D2, one end of capacitor C23, and then to diode D1 and resistor R26. After connecting to these terminals, pin BST1, along with one end of capacitor C24, is connected to pin INTVCC. The other end of capacitor C24 is grounded. Capacitor C24 is a 4.7μF 0805 capacitor; resistor R26 is a 5.11Ω 0603 resistor; and capacitor C23 is a 100nF 0603 capacitor.

[0158] Pin SW1 is connected to the other end of Zener diode D2 and the other end of capacitor C23 in sequence, and then connected to pin SW1.

[0159] Both pins PGND are grounded;

[0160] The series circuit of pin VC and RC, the series circuit of pin RT and resistor R12, the series circuit of pin CCM and capacitor C15, pin SGND, TEST1 and SNSN are connected in parallel and grounded.

[0161] Pin BST1 is connected sequentially to one end of Zener diode D4, one end of capacitor C25, and then to diode D3 and resistor R27. After connecting to these terminals, pin BST1, along with one end of capacitor C26, is connected to pin INTVCC. The other end of capacitor C26 is grounded. Capacitor C26 is a 4.7μF 0805 capacitor; resistor R27 is a 5.11Ω 0603 resistor; and capacitor C25 is a 100nF 0603 capacitor.

[0162] Pin SW1 is connected to the other end of Zener diode D4 and the other end of capacitor C25 in sequence, and then connected to pin SW1.

[0163] The operational process and principles in practical applications:

[0164] The LT3790EFE base chip first reaches a ready state by being powered by an external power supply;

[0165] Based on the actual application requirements, the function of the switch driver module is preset. The control circuit in the RF amplifier transmits the logic level signal output by the microcontroller MCU to control the LT3790EFE base chip to the enable driver circuit.

[0166] The enable driver circuit is connected to the LT3790EFE base chip to convert the logic level signal (3.3V) into a high-level drive signal (5V) and transmit it to the LT3790EFE base chip, so that the LT3790EFE base chip can start working based on the logic level signal.

[0167] The output voltage of the power control chip is output through the switching drive circuit. The voltage value collected by the voltage acquisition circuit is fed back to the power control chip in real time to ensure that the output voltage of the power control chip reaches the ideal result. The current limiting protection circuit collects the current value output by the power control chip in real time. If the current value exceeds the set value, the voltage output of the power control chip will be shut off, thereby achieving a stable voltage output.

[0168] Example 2

[0169] like Figure 12 A radio frequency amplifier includes: a control circuit, a first amplifier, a second amplifier, a third amplifier, and a laser resonant cavity connected in sequence for power supply;

[0170] It also includes: a power supply voltage adjustable circuit for use in RF amplifiers; the output of the power supply voltage adjustable circuit for use in RF amplifiers is connected to power supply to the first amplifier, the second amplifier and the third amplifier respectively;

[0171] The input terminal of the adjustable power supply voltage circuit used in RF amplifiers is connected to an external power supply.

[0172] It should be noted that in practical applications, the principle of the RF amplifier is as follows: the control circuit provides the basic energy input, which is amplified by the amplifier. The adjustable power supply circuit provides energy to multiple amplifiers and transmits the amplified energy to the laser resonant cavity, so that the gas is discharged uniformly.

[0173] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the protection scope of this invention.

Claims

1. A power supply voltage adjustable circuit for use in radio frequency amplifiers, characterized in that, include: A power control chip and a switch drive circuit that are connected to an external power supply; and the switch drive circuit is connected to the power control chip. Peripheral circuits connected to the power control chip; A current-limiting protection circuit with one end connected to the voltage output terminal of the power control chip and the other end connected to the power control chip. In addition, an enable drive circuit that is connected at one end to the power control chip and at the other end to the control circuit of the RF amplifier; It also includes: a digital output voltage regulation circuit; One end of the digital output voltage regulation circuit is connected to the power control chip, and the other end, together with the switch drive circuit, is connected to the voltage output terminal of the power control chip.

2. The adjustable power supply voltage circuit for an RF amplifier according to claim 1, characterized in that, The switch driving circuit includes a first switch unit, a second switch unit, a third switch unit, a fourth switch unit, a second energy storage unit, a first protection unit, a second protection unit, a third protection unit, a fourth protection unit, a second sampling resistor, and an input resistor; The positive terminal of the 48V external power supply is connected to the first protection unit and grounded; The power control chip is connected to the second protection unit through the first network connection point 48V-1 and is grounded; Furthermore, the 48V positive terminal, the input resistor, and the first network connection point 48V-1 are connected in sequence; The enable signal drive circuit's pin VCC is connected to the third protection unit and grounded; The current limiting protection circuit is connected to the fourth protection unit through the second network connection point VCC-1 and is grounded; One end of the second energy storage unit is connected to the SW1 pin of the first switching unit, the third switching unit, and the power control chip, and the other end is connected to the SW2 pin of the second switching unit, the fourth switching unit, and the power control chip. Furthermore, the first switching unit is also connected to the first network connection point 48V-1 and the power control chip pin TG1; the second switching unit is also connected to the second network connection point VCC-1 and the power control chip pin TG2. The third switching unit is also connected to pins BG1 and SNSP of the power control chip; The fourth switching unit is also connected to pins BG2 and SNSP of the power control chip; Pin SNSP is connected to the second sampling resistor and grounded.

3. The adjustable power supply voltage circuit for an RF amplifier according to claim 1, characterized in that, The input terminal of the enable drive circuit is connected to the positive terminal of the 3.3V voltage of the control circuit, and the 5V voltage output terminal of the enable drive circuit is connected to the EN pin of the power control chip.

4. The adjustable power supply voltage circuit for an RF amplifier according to claim 1, characterized in that, The current limiting protection circuit includes: capacitor C18, resistor R21, capacitor CC3, capacitor C20; a first sampling resistor, a first fuse, and a second fuse; The pin VCC, the first sampling resistor, and the second network connection point VCC-1 are connected in sequence; The VCC pin is connected to one end of the first fuse, and the other end of the first fuse is connected to one end of the resistor R21; the other end of the resistor R21 is connected to one end of the capacitor C18 and the ISN pin of the power control chip; the other end of the first fuse is connected to the capacitor CC3 and grounded. The second network connection point VCC-1 is connected to one end of the second fuse, and the other end of the second fuse is connected to capacitor C20 and grounded; the other end of the second fuse is also connected to the other end of capacitor C18 and the ISP pin of the power control chip.

5. The adjustable power supply voltage circuit for an RF amplifier according to claim 1, characterized in that, The digital output voltage regulation circuit includes a digital voltage regulation circuit and a voltage acquisition circuit; One end of the digital voltage regulation circuit is connected to the power control chip, and the other end is connected to one end of the voltage acquisition circuit. The other end of the voltage acquisition circuit and the switch drive circuit are connected to the voltage output terminal of the power control chip.

6. The adjustable power supply voltage circuit for an RF amplifier according to claim 5, characterized in that, The voltage acquisition circuit includes: a first resistor, a ninth resistor, and a fifth resistor that can be deselected; The first, fifth, and ninth resistors are connected in series and grounded together with the GND pin of the potentiometer in the digital adjustment circuit. The fifth resistor is detachably connected to both the first and ninth resistors. When the fifth resistor is not used, the first and ninth resistors are not connected. The first resistor is connected to the VCC pin.

7. The adjustable power supply voltage circuit for an RF amplifier according to claim 5, characterized in that, The digital voltage regulation circuit includes: a potentiometer, a potentiometer control unit, a potentiometer protection unit, and a feedback voltage regulation unit; The 5V voltage output terminal, potentiometer control unit, and potentiometer are connected in sequence. The 5V voltage output terminal is connected to the VDD pin of the potentiometer; The 5V voltage output terminal is connected to the VLOGIC pin of the potentiometer, and at the same time, the 5V voltage output terminal is connected to the potentiometer protection unit and grounded; The feedback voltage regulation unit includes: a fourth resistor and an eighth resistor that can be deselected, and a potentiometer resistor; The potentiometer pin W, the eighth resistor, the fourth resistor, and the input terminal of the potentiometer resistor are connected in sequence; The pin FB of the power control chip is connected to the pin W of the potentiometer through the eighth resistor; the fourth resistor is connected to the common connection terminal of the pin FB of the power control chip and the eighth resistor; wherein the eighth resistor can be detachably connected to the pin FB of the power control chip, the pin W of the potentiometer and the fourth resistor. When the eighth resistor is not in use: pin FB of the power control chip is not connected to pin W of the potentiometer; The first output terminal of the potentiometer resistor is connected to the common connection terminal of the first resistor and the fifth resistor, and is also connected to the B pin of the potentiometer. The second output terminal of the potentiometer resistor is connected to the common connection terminal of the fifth and ninth resistors, and is also connected to the potentiometer's A pin. Specifically, the potentiometer resistor, the fourth resistor, the potentiometer pin A, and the potentiometer pin B are all detachably connected. When the potentiometer resistor is not in use: the potentiometer resistor, potentiometer pin A, potentiometer pin B, and the fourth resistor are not connected; Furthermore, the fifth and eighth resistors can be used simultaneously or not; the potentiometer resistor and the fifth resistor cannot be used at the same time.

8. A radio frequency amplifier, characterized in that, include: The control circuit, first amplifier, second amplifier, third amplifier, and laser resonant cavity are connected in sequence for power supply. It also includes: the power supply voltage adjustable circuit for use in an RF amplifier as described in any one of claims 1 to 7; The output of the power supply voltage adjustable circuit used in the radio frequency amplifier is connected to the power supply of the first amplifier, the second amplifier, and the third amplifier, respectively. The input terminal of the adjustable power supply voltage circuit used in RF amplifiers is connected to an external power supply.

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