Driving circuit, LLC resonant converter and power supply equipment

Abstract

The utility model relates to the technical field of power electronics, in particular to a drive circuit, an LLC resonant converter and power supply equipment, which comprises a front buffer drive circuit, a main drive circuit and an output current-limiting circuit, the front buffer drive circuit comprises an operational amplifier U1, the main drive circuit comprises a drive chip U2, and the output current-limiting circuit is connected with the operational amplifier U1. The input end of the operational amplifier U1 is used for receiving a driving signal, the output end of the operational amplifier U1 is connected with the input end of the driving chip U2, the output end of the driving chip U2 is connected with the input end of the output current limiting circuit, and the output end of the output current limiting circuit is used for being connected with an LLC resonant cavity. The utility model can reduce the transmission delay of the driving signal.

Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, specifically to a drive circuit, an LLC resonant converter, and a power supply device. Background Technology

[0002] With the rapid development of the new energy vehicle sector, electronic devices have placed higher demands on the performance of power systems. Among them, LLC resonant converters are widely used in new energy charging piles, industrial automation equipment and other scenarios due to their significant advantages such as zero-voltage switching characteristics, high efficiency over a wide load range and low electromagnetic interference.

[0003] However, the driving circuit of LLC resonant converters currently typically uses traditional driving chips to directly drive the switching devices. The rising / falling edge slope of the driving signal is insufficient, which prolongs the switching transition time of the switching transistor and easily leads to a large transmission delay of the driving signal, affecting the switching speed and synchronization performance of the switching devices. Utility Model Content

[0004] The purpose of this invention is to provide a driving circuit, an LLC resonant converter, and a power supply device to reduce the transmission delay of driving signals.

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] In a first aspect, this utility model provides a driving circuit, including a pre-buffer driving circuit, a main driving circuit, and an output current limiting circuit. The pre-buffer driving circuit includes an operational amplifier U1, and the main driving circuit includes a driving chip U2. The input terminal of the operational amplifier U1 is used to receive driving signals, and the output terminal of the operational amplifier U1 is connected to the input terminal of the driving chip U2. The output terminals of the driving chip U2 are all connected to the input terminals of the output current limiting circuit, and the output terminal of the output current limiting circuit is used to connect to an LLC resonant cavity.

[0007] In conjunction with the first aspect, optionally, the operational amplifier U1 is model AD8041.

[0008] In conjunction with the first aspect, the optional driver chip U2 is model IXDN404N.

[0009] In conjunction with the first aspect, optionally, the first pin of the operational amplifier U1 is connected to the first pin and the eighth pin of the driver chip U2, respectively. The eighth pin of the operational amplifier U1 is also connected to the first pin and the eighth pin of the driver chip U2, respectively. The third pin of the operational amplifier U1 is connected to a drive signal. The second pin and the sixth pin of the operational amplifier U1 are connected in series with a resistor R1 and then connected to the second pin and the third pin of the driver chip U2. The fourth pin and the fifth pin of the operational amplifier U1 are both grounded. The fourth pin and the fifth pin of the driver chip U2 are both grounded. The sixth pin of the driver chip U2 is connected in series with a capacitor C3 and then grounded. The seventh pin of the driver chip U2 is connected in series with a capacitor C4 and then grounded. The sixth pin and the seventh pin of the driver chip U2 are also connected to an output current limiting circuit.

[0010] In conjunction with the first aspect, optionally, the output current limiting circuit includes a first output current limiting circuit and a second output current limiting circuit. The first output current limiting circuit includes a diode D2, the cathode of which is the input terminal of the first output current limiting circuit. The input terminal of the first output current limiting circuit is connected to the seventh pin of the driver chip U2. Resistors R2, R3, and R4 are connected in parallel across the two ends of the diode D2. The anode of the diode D2 is connected to one end of a resistor R10, and the other end of the resistor R10 is the output terminal of the first output current limiting circuit. A resistor R11 is connected in parallel across the two ends of the resistor R10. The anode of D2 is also connected to the output terminal of the first output current limiting circuit; the second output current limiting circuit includes diode D1, the cathode of which is the input terminal of the second output current limiting circuit, the input terminal of which is connected to the sixth pin of the driver chip U2, resistors R5, R6 and R7 are connected in parallel across the two ends of diode D1, the anode of which is connected to one end of resistor R8, the other end of which is the output terminal of the second output current limiting circuit, resistor R9 is connected in parallel across the two ends of resistor R8, and the anode of diode D1 is also connected to the output terminal of the second output current limiting circuit.

[0011] In conjunction with the first aspect, optionally, a power supply circuit is also included, which is connected to the power supply terminal of the driver chip U2.

[0012] Secondly, this utility model provides an LLC resonant converter, including a driving circuit as described in any one of the first aspects, and further including an LLC main circuit and a control circuit; the driving circuit is used to process the driving signal output by the control circuit and transmit the processed driving signal to the LLC main circuit to drive the LLC main circuit to perform power conversion, and the LLC main circuit feeds back the output signal to the control circuit.

[0013] Thirdly, this utility model provides a power supply device, including the LLC resonant converter as described in the second aspect.

[0014] The beneficial effects of this utility model are: This utility model sets a pre-buffered driving circuit before the main driving circuit, which quickly increases the rising and falling edge speeds of the driving signal, making the signal edge steeper, reducing the transmission delay of the driving signal, and avoiding the impact of the transmission delay of the driving signal on the switching speed and synchronization performance of the switching device. Attached Figure Description

[0015] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0016] Figure 1 This is a circuit diagram of the driving circuit of this utility model;

[0017] Figure 2 This is a block diagram of the LLC resonant converter of this utility model. Detailed Implementation

[0018] The technical solution of this utility model will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments and specific features in the embodiments are detailed descriptions of the technical solution of this application, rather than limitations thereof.

[0019] In the description of this utility model, the terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features or the order of the technical features.

[0020] In the description of this utility model, the terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this utility model. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0021] Example 1:

[0022] Significant delays in drive signal transmission affect the switching speed and synchronization performance of switching devices. For example, inconsistent delays between channels in a multi-channel driver chip can lead to timing mismatches between the switching transistors on both sides of the bridge arm in a full-bridge LLC topology, causing a "shoot-through" risk and potentially resulting in device burnout.

[0023] This utility model provides a driving circuit, including a pre-buffer driving circuit, a main driving circuit, and an output current limiting circuit. The pre-buffer driving circuit includes an operational amplifier U1, and the main driving circuit includes a driving chip U2. The input terminal of the operational amplifier U1 is used to receive driving signals, and the output terminal of the operational amplifier U1 is connected to the input terminal of the driving chip U2. The output terminal of the driving chip U2 is also connected to the input terminal of the output current limiting circuit, and the output terminal of the output current limiting circuit is used to connect to the LLC resonant cavity.

[0024] In one illustrative embodiment, such as Figure 1 As shown, the operational amplifier U1 is model AD8041;

[0025] The driver chip U2 is model number IXDN404N.

[0026] The first pin of operational amplifier U1 is connected to the first and eighth pins of driver chip U2, respectively. The eighth pin of operational amplifier U1 is also connected to the first and eighth pins of driver chip U2, respectively. The third pin of operational amplifier U1 is connected to the drive signal. The second and sixth pins of operational amplifier U1 are connected in series with resistor R1 and then connected to the second and third pins of driver chip U2. The fourth and fifth pins of operational amplifier U1 are both grounded. The fourth and fifth pins of driver chip U2 are both grounded. The sixth pin of driver chip U2 is connected in series with capacitor C3 and then grounded. The seventh pin of driver chip U2 is connected in series with capacitor C4 and then grounded. The sixth and seventh pins of driver chip U2 are also connected to output current limiting circuits.

[0027] The output current limiting circuit includes a first output current limiting circuit and a second output current limiting circuit. The first output current limiting circuit includes a diode D2, with the cathode of diode D2 serving as the input terminal. The input terminal of the first output current limiting circuit is connected to pin 7 of the driver chip U2. Resistors R2, R3, and R4 are connected in parallel across diode D2. The anode of diode D2 is connected to one end of resistor R10, and the other end of resistor R10 serves as the output terminal of the first output current limiting circuit. Resistor R11 is connected in parallel across resistor R10. The anode of diode D2 is also connected to... The output terminal of the first output current limiting circuit is connected; the second output current limiting circuit includes a diode D1, the cathode of which is the input terminal of the second output current limiting circuit, and the input terminal of the second output current limiting circuit is connected to the sixth pin of the driver chip U2. Resistors R5, R6 and R7 are connected in parallel across the two ends of the diode D1, and the anode of the diode D1 is connected to one end of a resistor R8. The other end of the resistor R8 is the output terminal of the second output current limiting circuit. Resistor R9 is connected in parallel across the two ends of the resistor R8, and the anode of the diode D1 is also connected to the output terminal of the second output current limiting circuit.

[0028] It also includes a power supply circuit, which is connected to the power supply terminal of the driver chip U2. That is, the first pin and the eighth pin of the driver chip U2 are connected to the power supply voltage, and the first pin and the eighth pin of the driver chip U2 are connected in series with capacitor C2 and then grounded. A capacitor C1 is connected in parallel across the two ends of capacitor C2.

[0029] Example 2:

[0030] like Figure 2 As shown, this utility model provides an LLC resonant converter, including a driving circuit as described in any one of Embodiment 1, and further including an LLC main circuit and a control circuit; the driving circuit is used to process the driving signal output by the control circuit and transmit the processed driving signal to the LLC main circuit to drive the LLC main circuit to perform power conversion, and the LLC main circuit feeds back the output signal to the control circuit.

[0031] The LLC main circuit includes an input rectifier and filter circuit, an H-bridge inverter circuit, a resonant cavity circuit, and an output rectifier and filter circuit. The input rectifier and filter circuit converts AC power to DC power and filters it. The H-bridge inverter circuit converts DC power to high-frequency AC power. The resonant cavity circuit performs energy transmission and conversion. The output rectifier and filter circuit converts high-frequency AC power to stable DC power to supply the load.

[0032] The control circuit monitors the operating status parameters of the LLC main circuit in real time, dynamically adjusts the amplitude, duty cycle and frequency of the drive signal according to the preset control algorithm, and filters and amplifies the collected data to ensure monitoring accuracy. Based on the monitoring parameters, it dynamically generates the control parameters of the drive signal to achieve efficient control of the LLC main circuit.

[0033] Example 3:

[0034] This utility model provides a power supply device, including an LLC resonant converter as described in Embodiment 2.

[0035] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A driving circuit, characterized in that, It includes a pre-buffered driving circuit, a main driving circuit, and an output current limiting circuit. The pre-buffered driving circuit includes an operational amplifier U1, and the main driving circuit includes a driving chip U2. The input terminal of the operational amplifier U1 is used to receive driving signals, and the output terminal of the operational amplifier U1 is connected to the input terminal of the driving chip U2. The output terminals of the driving chip U2 are all connected to the input terminals of the output current limiting circuit, and the output terminal of the output current limiting circuit is used to connect to the LLC resonant cavity.

2. The driving circuit according to claim 1, characterized in that, The operational amplifier U1 is model AD8041.

3. The driving circuit according to claim 2, characterized in that, The driver chip U2 is model number IXDN404N.

4. The driving circuit according to claim 3, characterized in that, The first pin of the operational amplifier U1 is connected to the first and eighth pins of the driver chip U2, respectively. The eighth pin of the operational amplifier U1 is also connected to the first and eighth pins of the driver chip U2, respectively. The third pin of the operational amplifier U1 is connected to the drive signal. The second and sixth pins of the operational amplifier U1 are connected in series with a resistor R1 and then connected to the second and third pins of the driver chip U2. The fourth and fifth pins of the operational amplifier U1 are both grounded. The fourth and fifth pins of the driver chip U2 are both grounded. The sixth pin of the driver chip U2 is connected in series with a capacitor C3 and then grounded. The seventh pin of the driver chip U2 is connected in series with a capacitor C4 and then grounded. The sixth and seventh pins of the driver chip U2 are also connected to output current limiting circuits.

5. The driving circuit according to claim 4, characterized in that, The output current limiting circuit includes a first output current limiting circuit and a second output current limiting circuit. The first output current limiting circuit includes a diode D2, the cathode of which is the input terminal of the first output current limiting circuit. The input terminal of the first output current limiting circuit is connected to the seventh pin of the driver chip U2. Resistors R2, R3, and R4 are connected in parallel across the two ends of the diode D2. The anode of the diode D2 is connected to one end of a resistor R10, and the other end of the resistor R10 is the output terminal of the first output current limiting circuit. A resistor R11 is connected in parallel across the two ends of the resistor R10. The anode of the diode D2 is also... The first output current limiting circuit is connected to the output terminal of the first output current limiting circuit; the second output current limiting circuit includes a diode D1, the cathode of the diode D1 is the input terminal of the second output current limiting circuit, the input terminal of the second output current limiting circuit is connected to the sixth pin of the driver chip U2, resistors R5, R6 and R7 are connected in parallel across the two ends of the diode D1, the anode of the diode D1 is connected to one end of resistor R8, the other end of resistor R8 is the output terminal of the second output current limiting circuit, resistor R9 is connected in parallel across the two ends of resistor R8, and the anode of the diode D1 is also connected to the output terminal of the second output current limiting circuit.

6. The driving circuit according to claim 1, characterized in that, It also includes a power supply circuit, which is connected to the power supply terminal of the driver chip U2.

7. An LLC resonant converter, characterized in that, The device includes the drive circuit as described in any one of claims 1-6, and further includes an LLC main circuit and a control circuit; the drive circuit is used to process the drive signal output by the control circuit and transmit the processed drive signal to the LLC main circuit to drive the LLC main circuit to perform power conversion, and the LLC main circuit feeds back the output signal to the control circuit.

8. A power supply device, characterized in that, Including the LLC resonant converter as described in claim 7.

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