An integrated chip structure

Abstract

This utility model relates to the field of integrated circuit packaging technology, and specifically to an integrated chip structure, including a main control chip, a switching transistor, a gallium nitride (GaN) power chip, a lead frame, and a molding compound. The switching transistor is electrically connected to the main control chip and the GaN power chip. The lead frame includes a first pin group, a second pin group, and three electrically isolated base islands: a first base island, a second base island, and a third base island. The main control chip is disposed on the first base island, the GaN power chip is disposed on the second base island, and the switching transistor is disposed on the third base island. The first, second, and third base islands are encapsulated within the molding compound. At least a portion of the side of the second base island facing away from the GaN power chip is exposed outside the molding compound. The first and third base islands are arranged side-by-side, with the first pin group located on opposite sides of the second base island. The second pin group is disposed on the side of the first and third base islands furthest from the second base island. This application can improve heat dissipation and reduce the impact on pins that are highly susceptible to temperature changes.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit packaging technology, and in particular to an integrated chip structure. Background Technology

[0002] In many charger designs, the power and frequency are precisely controlled by the coordinated operation of gallium nitride power devices, main control chips, and switching transistors.

[0003] In existing circuit designs, to simplify the charger's circuit layout, designers often integrate gallium nitride (GaN) power devices, the main control chip, and the switching transistor into a single integrated chip structure. However, GaN power devices generate a significant amount of heat during operation. When integrated with the main control chip and switching transistor in the same integrated chip structure, the heat dissipation of the GaN power devices becomes ineffective, making it difficult for the integrated chip structure to effectively assist the peripheral circuitry in achieving higher power output. Utility Model Content

[0004] The technical problem to be solved by this utility model embodiment is to provide an integrated chip structure to solve the problem that the heat dissipation effect of gallium nitride power devices in the existing integrated chip structure is poor, and the integrated chip structure is difficult to assist the peripheral circuit to achieve a large power output.

[0005] This utility model discloses an integrated chip structure, including a main control chip, a switching transistor, a gallium nitride (GaN) power chip, a lead frame, and a plastic package. The switching transistor is electrically connected to the main control chip and the GaN power chip, respectively. The main control chip outputs a PWM signal and drives the switching transistor to generate a negative voltage. The negative voltage drives the GaN power chip to turn on and off. The lead frame includes a first pin group, a second pin group, and electrically isolated first, second, and third base islands. The first pin group and the second pin group are exposed in the plastic package. The main control chip is disposed on the first base island, the gallium nitride power chip is disposed on the second base island, and the switching transistor is disposed on the third base island. The first base island, the second base island, and the third base island are encapsulated in the plastic package, and at least part of the side of the second base island facing away from the gallium nitride power chip is exposed outside the plastic package. The first base island and the third base island are arranged side by side and are respectively located on both sides of the second base island with the first pin group. The second pin group is arranged on the side of the first base island and the third base island away from the second base island.

[0006] Optionally, the first pin group includes a reference ground pin exposed in the molding compound, the width of which is greater than the width of the other pins.

[0007] Optionally, the first pin group further includes a drain pin exposed in the molding compound, wherein the width of the drain pin is smaller than the width of the reference ground pin but larger than the width of the other pins.

[0008] Optionally, the portion of the second base island exposed outside the encapsulation is rectangular, with the long side of the rectangle extending along the side-by-side arrangement direction of the first and third base islands.

[0009] Optionally, the integrated chip structure further includes a first metal lead, and the second pin group includes a voltage feedback pin exposed on the plastic package, the voltage feedback pin being electrically connected to the main control chip through the first metal lead.

[0010] Optionally, the main control chip is located close to the first pin group, and the voltage feedback pin is located close to the main control chip.

[0011] Optionally, the integrated chip structure further includes a second metal lead, and the second pin group further includes a current detection pin exposed on the plastic package, the current detection pin being electrically connected to the switching transistor through the second metal lead.

[0012] Optionally, the current sensing pin is positioned close to the second base island.

[0013] Optionally, the integrated chip structure further includes multiple third metal leads, and the drain pin is electrically connected to the drain of the gallium nitride power chip through the third metal leads.

[0014] Optionally, the main control chip is mounted on the first base island using insulating adhesive, the switching transistor is mounted on the third base island using first conductive adhesive, and the gallium nitride power chip is mounted on the second base island using second conductive adhesive.

[0015] Compared with the prior art, the beneficial effects of the integrated chip structure provided by this utility model embodiment are as follows: The integrated chip structure provided by this utility model embodiment includes a main control chip, a switching transistor, a gallium nitride power chip, a lead frame, and a plastic package. The lead frame is provided with a first pin group, a second pin group, and a first base island, a second base island, and a third base island that are electrically isolated from each other. The first and second pin groups are exposed outside the plastic package and can be connected to peripheral circuits. The main control chip is located on the first base island, the gallium nitride power chip is located on the second base island, and the switching transistor is located on the third base island. The first, second, and third base islands are encapsulated in the plastic package, providing support and heat conduction for the main control chip, the switching transistor, and the gallium nitride power chip, respectively. The second base island has at least a partial exposure of the side facing away from the gallium nitride power chip within the molding compound. This allows the heat generated by the gallium nitride power chip to dissipate, improving heat dissipation and extending the lifespan of the integrated chip structure. It also allows the integrated chip structure to assist peripheral circuits in achieving higher power output. Meanwhile, the first and third base islands are arranged side by side and are located on opposite sides of the second base island, with the first pin group positioned on the same side as the second base island. The second pin group is located on the side of the first and third base islands furthest from the second base island. This base island layout allows designers to place pins that are more affected by temperature in the second pin group, away from the second base island where heat is higher. Therefore, this application can improve heat dissipation while reducing the impact on pins that are more affected by temperature. Attached Figure Description

[0016] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. In the accompanying drawings:

[0017] Figure 1 This is a schematic diagram of the bonding wires inside the integrated chip structure provided in this embodiment of the utility model;

[0018] Figure 2 This is a schematic diagram of the planar structure of the integrated chip structure provided in this embodiment of the utility model;

[0019] Figure 3 This is a planar structural schematic diagram of the integrated chip structure provided in another embodiment of the present invention.

[0020] The labels for the attached figures are as follows:

[0021] 110. Main control chip; 120. Switching transistor; 130. Gallium nitride power chip; 140. Lead frame; 141. First pin group; 1411. Reference ground pin; 1412. Drain pin; 142. Second pin group; 1421. Voltage feedback pin; 1422. Current detection pin; 143. First base island; 144. Second base island; 145. Third base island; 150. Molded package; 160. First metal lead; 170. Second metal lead; 180. Third metal lead. Detailed Implementation

[0022] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The preferred embodiments of this utility model will now be described in detail with reference to the accompanying drawings.

[0023] This utility model embodiment provides an integrated chip structure, such as Figures 1 to 3 The integrated chip structure includes a main control chip 110, a switching transistor 120, a gallium nitride power chip 130, a lead frame 140, and a plastic package 150. The switching transistor 120 is electrically connected to the main control chip 110 and the gallium nitride power chip 130. The main control chip 110 outputs a PWM signal and drives the switching transistor 120 to generate a negative voltage. The negative voltage is used to drive the gallium nitride power chip 130 to turn on and off. The lead frame 140 includes a first pin group 141, a second pin group 142, and electrically isolated first base islands 143, second base islands 144, and third base islands 145. The first pin group 141 and the second pin group 142 are exposed in the plastic package 150. The package 150 is configured such that the main control chip 110 is disposed on the first base island 143, the gallium nitride power chip 130 is disposed on the second base island 144, and the switching transistor 120 is disposed on the third base island 145. The first base island 143, the second base island 144, and the third base island 145 are packaged in the plastic package 150, and at least part of the side of the second base island 144 facing away from the gallium nitride power chip 130 is exposed outside the plastic package 150. The first base island 143 and the third base island 145 are arranged side by side and are respectively located on both sides of the second base island 144 with the first pin group 141. The second pin group 142 is arranged on the side of the first base island 143 and the third base island 145 away from the second base island 144.

[0024] The integrated chip structure provided in this embodiment of the utility model comprises a main control chip 110, a switching transistor 120, a gallium nitride power chip 130, a lead frame 140, and a molding compound 150. The lead frame 140 includes a first pin group 141, a second pin group 142, and electrically isolated first base islands 143, second base islands 144, and third base islands 145. The first pin groups 141 and 142 are exposed outside the molding compound 150 and can be connected to external circuits. The main control chip 110 is disposed on the first base island 143, the gallium nitride power chip 130 is disposed on the second base island 144, and the switching transistor 120 is disposed on the third base island 145. The first base islands 143, 144, and 145 are encapsulated within the molding compound 150, providing support and heat dissipation for the main control chip 110, the switching transistor 120, and the gallium nitride power chip 130, respectively. The second base island 144 is at least partially exposed on the side facing away from the gallium nitride power chip 130 within the molding compound 150. This allows the heat generated by the gallium nitride power chip 130 to be dissipated, improving heat dissipation and extending the lifespan of the integrated chip structure. It also allows the integrated chip structure to assist peripheral circuits in achieving higher power output. Meanwhile, the first base island 143 and the third base island 145 are arranged side by side and are located on opposite sides of the second base island 144, along with the first pin group 141. The second pin group 142 is located on the side of the first base island 143 and the third base island 145 away from the second base island 144. This base island layout allows designers to place pins that are more affected by temperature in the second pin group 142, away from the second base island 144 where heat is greater. Therefore, this application can improve heat dissipation while reducing the impact on pins that are more affected by temperature.

[0025] Since the gallium nitride power chip 130 generates a lot of heat during operation, especially when assisting in achieving higher power output, the part of the second base island 144 exposed to the plastic package 150 is used to dissipate the heat generated by the gallium nitride power chip 130. The temperature of the second base island 144 is relatively high. The second pin group 142 is arranged in a position away from the second base island 144 to reduce the impact of heat on the second pin group 142. Designers can arrange the pins that are more affected by temperature in the second pin group 142 to reduce the impact of heat on these pins.

[0026] refer to Figure 1 and Figure 3 In an optional embodiment of this application, the portion of the second base island 144 exposed outside the molding compound 150 is rectangular, with the long side of the rectangle extending along the side-by-side arrangement direction of the first base island 143 and the third base island 145.

[0027] The portion of the second base island 144 exposed outside the molding compound 150 is shaped into a rectangle, providing a larger exposed area and increasing the heat dissipation area. This facilitates heat transfer to the surrounding environment, increases heat conduction efficiency, and helps reduce the operating temperature of the integrated chip structure. The long side of the rectangle extends along the parallel arrangement direction of the first base island 143 and the third base island 145, which also means that the long side of the second base island 144 extends along the parallel arrangement direction of the first base island 143 and the third base island 145. This facilitates the connection of the second base island 144 with the main control chip 110 and the switching transistor 120, simplifying the wiring layout.

[0028] refer to Figures 1 to 3 In an optional embodiment of this application, the first pin group 141 includes a reference ground pin 1411 exposed on the molding compound 150, and the width of the reference ground pin 1411 is greater than the width of the other pins.

[0029] In a circuit, the reference ground pin 1411 typically carries a large amount of current, including the chip's quiescent current, dynamic current, and potential transient current. A wider reference ground pin 1411 can significantly reduce grounding impedance. A low-impedance ground connection ensures that current can flow smoothly from the chip to the ground plane, reducing voltage drop, while also providing a larger heat dissipation area to dissipate heat. Setting the width of the reference ground pin 1411 to be greater than the width of other pins also makes the reference ground pin 1411 easier to identify, and appropriately setting the width of each pin also contributes to the miniaturization of the integrated chip structure.

[0030] It should be noted that the reference ground pin 1411 can be defined as the GND pin or other symbolic names, without any restrictions.

[0031] refer to Figures 1 to 3 In an optional embodiment of this application, the first pin group 141 further includes a drain pin 1412 exposed in the molding compound 150. The width of the drain pin 1412 is smaller than the width of the reference ground pin 1411 and larger than the width of the other pins.

[0032] The primary function of the drain pin 1412 is to output current. It typically carries a large current. A wider drain pin 1412 reduces its impedance, minimizing thermal effects and voltage drops caused by excessive current. A wider drain pin 1412 also provides a larger heat dissipation area, helping to more effectively conduct heat generated inside the integrated chip structure to the outside, and provides a larger soldering area for external application circuit boards, improving the stability of the electrical connection between the drain pin 1412 and the external application circuit board.

[0033] It should be noted that the drain pin 1412 can be defined as the D (drain) pin, or other symbol names, without restriction.

[0034] Optionally, the integrated chip structure also includes multiple third metal leads 180, through which the drain pin 1412 is electrically connected to the drain of the gallium nitride power chip 130. The third metal leads 180 effectively connect the drain pin 1412 to the gallium nitride power chip 130, ensuring smooth current flow in the circuit and thus enabling normal circuit operation. Furthermore, by using multiple third metal leads 180 to connect the drain pin 1412 to the drain of the gallium nitride power chip 130, the multiple third metal leads 180 can distribute the current, with each third metal lead 180 carrying a portion of the current, thereby improving the overall current carrying capacity. This design can support higher operating currents, meeting the needs of high-power applications, while reducing the risk of overheating and damage to the third metal leads 180 due to excessive current.

[0035] refer to Figures 1 to 3 In an optional embodiment of this application, the integrated chip structure further includes a first metal lead 160, and the second pin group 142 includes a voltage feedback pin 1421 exposed in the plastic package 150. The voltage feedback pin 1421 is electrically connected to the main control chip 110 through the first metal lead 160.

[0036] The main function of voltage feedback pin 1421 is to feed back the externally detected voltage to the main control chip 110 to achieve power regulation and other functions of the integrated chip circuit. The first metal lead 160 enables stable signal transmission between voltage feedback pin 1421 and the main control chip 110. Positioning voltage feedback pin 1421 away from the second base island 144 increases the distance between them, reducing the impact of heat dissipated by the second base island 144 on the accuracy of the voltage signal transmitted by voltage feedback pin 1421.

[0037] It should be noted that the voltage feedback pin 1421 can be defined as the FB (FeedBack) pin or other symbol names, without any restrictions.

[0038] Optionally, the main control chip 110 is positioned close to the first pin group 141, and the voltage feedback pin 1421 is positioned close to the main control chip 110.

[0039] Specifically, the main control chip 110 is positioned close to the first pin group 141, which can shorten the distance between the main control chip 110 and the first pin group 141; the voltage feedback pin 1421 is positioned close to the main control chip 110, which can shorten the distance between the voltage feedback pin 1421 and the main control chip 110, shorten the signal transmission path between the voltage feedback pin 1421 and the main control chip 110, and reduce the length of the first metal lead 160. The shorter signal path can reduce the signal attenuation during transmission and ensure the strength and quality of the feedback signal.

[0040] refer to Figures 1 to 3 In an optional embodiment of this application, the integrated chip structure further includes a second metal lead 170, and the second pin group 142 further includes a current detection pin 1422 exposed in the molding compound 150. The current detection pin 1422 is electrically connected to the switching transistor 120 through the second metal lead 170.

[0041] The main function of the current sensing pin 1422 is to transmit the external sensed current to the main control chip 110, which helps the main control chip 110 monitor current changes in real time and ensures that the integrated chip structure operates under normal current conditions. The second metal lead 170 enables stable signal transmission between the current sensing pin 1422 and the main control chip 110. Placing the current sensing pin 1422 away from the second base island 144 increases the distance between the second base island 144 and the current sensing pin 1422, reducing the impact of heat dissipated by the second base island 144 on the accuracy of the current signal transmitted by the current sensing pin 1422.

[0042] It should be noted that the current sensing pin 1422 can be defined as the CS (Current Sense) pin or other symbol names, without any restrictions.

[0043] Optionally, the current sensing pin 1422 is positioned close to the second base island 144. This arrangement shortens the signal transmission distance, reduces signal attenuation and interference during transmission, improves signal stability and accuracy, reduces wiring length, lowers the complexity of the integrated chip structure wiring, and makes the overall integrated chip structure more compact, which is beneficial for the miniaturization of the integrated chip structure. Furthermore, due to the shortened signal transmission distance, the current sensing pin 1422, positioned close to the second base island 144, can improve the response speed of the main control chip 110 to current changes, enabling faster current monitoring and control.

[0044] refer to Figures 1 to 3 In an optional embodiment of this application, the main control chip 110 is mounted on the first base island 143 with insulating adhesive, the switching transistor 120 is mounted on the third base island 145 with first conductive adhesive, and the gallium nitride power chip 130 is mounted on the second base island 144 with second conductive adhesive.

[0045] The main control chip 110 is mounted with insulating adhesive, which ensures good electrical isolation between the main control chip 110 and the first base island 143, preventing leakage and short circuits. The switching transistor 120 and the gallium nitride power chip 130 are mounted on their respective base islands with conductive adhesive. The pins required by the switching transistor 120 and the gallium nitride power chip 130 are electrically connected to their respective base islands, reducing contact resistance. Furthermore, the conductive adhesive typically has good thermal conductivity, which can more effectively conduct the heat generated by the chip to the base island and the molding compound 150, improving heat dissipation efficiency, reducing the chip's operating temperature, thereby extending the chip's lifespan and improving reliability.

[0046] It should be understood that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Those skilled in the art can modify the technical solutions described in the above embodiments, or make equivalent substitutions for some of the technical features; and all such modifications and substitutions should fall within the protection scope of the appended claims of this utility model.

Claims

1. An integrated chip structure, characterized in that, The device includes a main control chip, a switching transistor, a gallium nitride (GaN) power chip, a lead frame, and a plastic package. The switching transistor is electrically connected to both the main control chip and the GaN power chip. The main control chip outputs a PWM signal and drives the switching transistor to generate a negative voltage. This negative voltage drives the GaN power chip to turn on and off. The lead frame includes a first pin group, a second pin group, and three electrically isolated base islands. The first and second pin groups are exposed within the plastic package. The main control chip is located on the first base island, the GaN power chip is located on the second base island, and the switching transistor is located on the third base island. The first, second, and third base islands are encapsulated within the plastic package, with at least a portion of the side of the second base island facing away from the GaN power chip exposed within the plastic package. The first and third base islands are arranged side-by-side and are located on opposite sides of the second base island, with the second pin group positioned on the side of the first and third base islands away from the second base island.

2. The integrated chip structure according to claim 1, characterized in that, The first pin group includes a reference ground pin exposed on the molding compound, the width of which is greater than the width of the other pins.

3. The integrated chip structure according to claim 2, characterized in that, The first pin group also includes a drain pin exposed in the molding compound, wherein the width of the drain pin is smaller than the width of the reference ground pin but larger than the width of the other pins.

4. The integrated chip structure according to claim 1, characterized in that, The portion of the second base island exposed outside the encapsulated body is rectangular, with the long side of the rectangle extending along the side-by-side arrangement of the first and third base islands.

5. The integrated chip structure according to claim 1, characterized in that, The integrated chip structure further includes a first metal lead, and the second pin group includes a voltage feedback pin exposed on the plastic package. The voltage feedback pin is electrically connected to the main control chip through the first metal lead.

6. The integrated chip structure according to claim 5, characterized in that, The main control chip is positioned close to the first pin group, and the voltage feedback pin is positioned close to the main control chip.

7. The integrated chip structure according to claim 1, characterized in that, The integrated chip structure also includes a second metal lead, and the second pin group also includes a current detection pin exposed on the plastic package. The current detection pin is electrically connected to the switching transistor through the second metal lead.

8. The integrated chip structure according to claim 7, characterized in that, The current sensing pin is positioned close to the second base island.

9. The integrated chip structure according to claim 3, characterized in that, The integrated chip structure also includes multiple third metal leads, and the drain pin is electrically connected to the drain of the gallium nitride power chip through the third metal leads.

10. The integrated chip structure according to any one of claims 1-9, characterized in that, The main control chip is mounted on the first base island using insulating adhesive, the switching transistor is mounted on the third base island using first conductive adhesive, and the gallium nitride power chip is mounted on the second base island using second conductive adhesive.

Images