A cavity packaging structure of a photoelectric detection chip
By using a fully enclosed cavity packaging structure and photothermal dual-curing adhesive, the problem of contaminants affecting the packaging of photodetectors is solved, resulting in a photodetector chip with high reliability and heat dissipation performance, suitable for a variety of electronic devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- XIAMEN ZIXIN SEMI TECH CO LTD
- Filing Date
- 2025-04-24
- Publication Date
- 2026-05-29
Smart Images
Figure CN224306213U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the technical field of semiconductor packaging, specifically relating to a cavity packaging structure for a photoelectric detection chip. Background Technology
[0002] A photodetector is a device that converts optical signals into electrical signals, and it is widely used in optical communication, optoelectronic measurement, laser applications, security detection, and other fields. The working principle of a photodetector is based on the photoelectric effect, where photons interact with matter to generate current or voltage. Depending on their working principle and structure, photodetectors can be classified into types such as photomultiplier tubes, photoresistors, photodiodes, PIN diodes, and photovoltaic cells. With the development of optoelectronic materials, electronic technology, and semiconductor technology, the performance of photodetectors has continuously improved, exhibiting advantages such as high sensitivity, high response speed, and low noise.
[0003] Packaging and manufacturing technologies are crucial to the performance and stability of photodetectors. The purpose of packaging is to ensure that the photodetector can operate safely in a long-term environment, protecting its sensitive internal structure and ensuring that its performance is unaffected by external conditions and physical factors. Existing packaging technologies include open / semi-hermetic packaging and packaging with vents. Open / semi-hermetic structures cannot effectively isolate external contaminants (such as dust and moisture), leading to misjudgments or decreased sensitivity in the photosensitive area. Vent designs are intended to expel gases from the cavity, but they are prone to contaminant residue and increase manufacturing complexity and the probability of failure. Utility Model Content
[0004] This invention addresses the shortcomings of existing technologies by providing a cavity packaging structure for a photoelectric detection chip.
[0005] To achieve the above objectives, the technical solution of this utility model is as follows:
[0006] A cavity packaging structure for a photoelectric detection chip includes a packaging body, a photoelectric detection chip, and a transparent cover plate. The packaging body includes a packaging substrate and a sidewall disposed on the packaging substrate. The transparent cover plate is disposed on the sidewall and connected by a curing adhesive to form a closed cavity. The photoelectric detection chip is disposed in the cavity. The front side of the packaging substrate has an electrode connection point, and the back side has an electrode lead-out end. The front side of the photoelectric detection chip has a planar photosensitive area, and the back side is fixed to the packaging substrate and electrically connected to the electrode connection point. The edge of the transparent cover plate is recessed relative to the edge of the sidewall. The curing adhesive is disposed between the transparent cover plate and the top surface of the sidewall and is stacked on the side edge of the transparent cover plate.
[0007] Optionally, the plane of the planar photosensitive area is arranged parallel to the top surface of the sidewall, and the plane of the planar photosensitive area is arranged parallel to the transparent cover plate.
[0008] Optionally, the width of the sidewall is 0.4 to 0.8 mm, and the edge of the transparent cover is recessed inward by 0.05 to 0.15 mm relative to the edge of the sidewall.
[0009] Optionally, the curing adhesive is a photothermal dual-curing adhesive, and its thickness between the transparent cover plate and the top surface of the side wall is 50-100 μm.
[0010] Optionally, the cured adhesive is stacked on the edge side of the transparent cover to form a sloping surface with a lower thickness greater than the upper thickness.
[0011] Optionally, the photodetector chip is a photomultiplier tube, and the planar photosensitive area is a surface array composed of multiple photosensitive units; the photodetector chip is provided with a positive terminal and a negative terminal, and the electrode connection point includes a positive connection point and a negative connection point, the positive terminal and the positive connection point are bonded by wire bonding, and the negative terminal and the negative connection point are bonded by wire bonding.
[0012] Optionally, the front side of the packaging substrate is provided with a first metal layer and a first ink layer in sequence. The first metal layer has a first positive electrode region and a first negative electrode region. The first ink layer partially covers the first metal layer. The exposed first positive electrode region forms the positive electrode connection point and the heat dissipation region. The exposed first negative electrode region forms the negative electrode connection point. The photoelectric detection chip is fixed on the heat dissipation region.
[0013] Optionally, the electrode leads include a positive lead and a negative lead; a second metal layer and a second ink layer are sequentially provided on the back side of the packaging substrate, the second metal layer having a second positive electrode region and a second negative electrode region, the second positive electrode region and the second negative electrode region corresponding one-to-one with the first positive electrode region and the first negative electrode region and connected through conductive vias respectively; the second ink layer partially covers the second metal layer, the exposed second positive electrode region forms the positive lead, and the exposed second negative electrode region forms the negative lead.
[0014] Optionally, the heat dissipation area has a plurality of conductive vias arranged in a concentrated manner below it.
[0015] Optionally, the first ink layer and the second ink layer are insulating inks, wherein the thickness of the first ink layer is 20-40 μm and the thickness of the second ink layer is 25-40 μm.
[0016] The beneficial effects of this utility model are as follows:
[0017] The cavity packaging structure of the photoelectric detection chip achieves a fully enclosed structure, which can effectively protect the photosensitive area of the photoelectric detection chip from damage by external environment and physical factors, avoid the influence of dust and other contaminants on the photosensitive area, and improve its reliability and stability; it is conducive to heat dissipation of the device, improves working efficiency and lifespan; it is highly adaptable and can be adapted to different electronic components and circuit boards, with high flexibility and versatility.
[0018] Other features and beneficial effects of this invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing this invention. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the structure of the photoelectric detection chip in the embodiment;
[0020] Figure 2 This is a cross-sectional schematic diagram of the cavity packaging structure of the photoelectric detection chip in the embodiment;
[0021] Figure 3 A schematic diagram of the front structure of the cavity packaging structure of the photoelectric detection chip in the embodiment;
[0022] Figure 4 This is a schematic diagram of the back structure of the cavity packaging structure of the photoelectric detection chip in the embodiment.
[0023] Figure 5 This is a schematic diagram of the front structure of the packaging substrate for an embodiment, showing the shape of the first metal layer and the location of the conductive vias;
[0024] Figure 6 This is a rear perspective view of the packaging substrate for an embodiment, showing the shape of the second metal layer and the location of the conductive vias;
[0025] Figure 7 for Figure 5 Cross-sectional view along the a-a' direction. Detailed Implementation
[0026] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments. The accompanying drawings are merely illustrative to facilitate understanding of the present invention, and their specific proportions can be adjusted according to design requirements. The vertical relationships of relative elements and the definitions of front / back in the graphics described herein should be understood by those skilled in the art to refer to the relative positions of the components; therefore, they can all be flipped to present the same component, and all of this should fall within the scope disclosed in this specification.
[0027] The photodetector chip 1 in this embodiment is a silicon photomultiplier (SiPM), composed of an array of avalanche diodes operating in Geiger mode. It features high gain, high sensitivity, low bias voltage, insensitivity to magnetic fields, and a compact structure. Each SiPM chip consists of a large number (hundreds to thousands) of avalanche diode (APD) units. Each unit comprises an APD and a large-value quenching resistor connected in series. These units are connected in parallel to form a planar array as a photosensitive area 1a. A positive terminal 11 and a negative terminal 12 are provided outside the photosensitive area 1a to facilitate external circuit connection, such as... Figure 1 As shown, the dot matrix photosensitive area 1a realizes the imaging function based on the reflected light signal from the emitted light source, and completes the recognition of the shape of the front-end object. It can be applied to vehicle-mounted LiDAR, robot image recognition, etc.
[0028] Cavity packaging of photoelectric detector chips involves creating a cavity within the package, fixing the photoelectric detector chip inside the cavity, and isolating the cavity from the external environment through sealing technology. This effectively protects the photoelectric detector chip from external environmental influences such as humidity, temperature changes, and mechanical damage. A detailed explanation follows. (Reference) Figures 2 to 4 The cavity packaging structure of the photodetector chip in this embodiment includes a photodetector chip 1, a packaging body 2, and a transparent cover plate 3. The packaging body 2 includes a packaging substrate 21 and sidewalls 22 disposed on the packaging substrate 21. The sidewalls 22 enclose a cavity. The transparent cover plate 3 is disposed on the sidewalls 22 and connected to the cavity via a curing adhesive 4 to form a closed cavity C. The photodetector chip 1 is disposed within the cavity C and its back is fixed to the packaging substrate 21. The edge of the transparent cover plate 3 is recessed relative to the edge of the sidewalls 22. The curing adhesive 4 is disposed between the top surface of the transparent cover plate 3 and the sidewalls 22 and stacked on the edge side of the transparent cover plate 3. The plane of the planar photosensitive area 1a is parallel to the top surface of the sidewalls 22, and the plane of the planar photosensitive area 1a is parallel to the transparent cover plate 3. This means the curing adhesive 4 has a uniform thickness, effectively avoiding the influence of vertical tilt on the optical path.
[0029] Specifically, the substrate of the packaging substrate 21 can be BT resin, ceramic, etc. For example, the packaging substrate 21 and the sidewall 22 can be integrally manufactured by laminating multiple ceramic layers together and then sintering them at high temperature; alternatively, the sidewall can be made by electroplating a metal dam onto a ceramic substrate; another example is a BT substrate laminate, with the upper layer being a substrate with a pre-cut cavity area and the lower layer being a substrate with pre-cut circuitry, with an adhesive film between the two substrates, and formed by hot pressing at high temperature. The sidewall 22 encloses a cavity with a rounded square cross-section, and the sidewall 22 has an upper surface parallel to the surface of the packaging substrate 21, with a width of 0.4 to 0.8 mm, for example, 0.55 mm. The photodetector chip 1 is fixed to the upper surface of the packaging substrate 21, with the plane of the planar photosensitive area 1a facing upwards and parallel to the upper surface of the sidewall 22. The glass cover 3 is made of glass with a light transmittance greater than 95%. It is bonded to the side wall 22 using curing adhesive 4. Its size is smaller than that of the encapsulation body 2. After bonding, the edge of the transparent cover 3 is recessed inward by 0.05 to 0.15 mm relative to the edge of the side wall 22, leaving space for the side stacking of the curing adhesive 4. The curing adhesive 4 is a photothermal dual-curing adhesive. After curing, the thickness between the transparent cover 3 and the top surface of the side wall 22 is 50 to 100 μm. It is stacked on the edge side of the transparent cover 3 to form a sloping surface 41 with a lower thickness higher than the upper thickness. This stacked part is located on the top surface of the side wall 22, extending outward relative to the edge of the transparent cover 3. This can improve the adhesion of the adhesive to the glass and enhance the protection and fixation of the side.
[0030] In this embodiment, the curing adhesive 4 is a photothermal dual-curing adhesive. UV curing is used for initial curing, avoiding the risk of the transparent cover plate 3 falling off or creating air leakage channels due to gas expansion within the cavity during the high-temperature curing process of thermal curing. The combination of rapid photocuring and high-temperature thermal curing combines the speed of photocuring with the high-temperature resistance of thermal curing, ensuring a strong bond and airtightness. Furthermore, the curing adhesive 4 can have vents when dispensing. During the pressing process when the transparent cover plate 3 is applied, air within the cavity will be expelled through these vents, eventually being pressed down until the curing adhesive extends and seals the vents, ultimately forming a sealed chamber. With this structure, there is no need to provide vents on the encapsulation substrate 21, allowing the photodetector chip 1 to be housed within a completely sealed cavity C.
[0031] Combination Figures 5 to 7The front side of the packaging substrate 21 is sequentially provided with a first metal layer 211 and a first ink layer 212. The first metal layer 211 has a first positive electrode region 211a and a first negative electrode region 211b. The first ink layer 212 partially covers the first metal layer 211. The exposed first positive electrode region 211a forms a positive electrode connection point A1 and a heat dissipation region D. The exposed first negative electrode region 211b forms a negative electrode connection point B1. The positive electrode connection point A1 and the positive terminal 11, and the negative electrode connection point B1 and the negative terminal 12 are electrically connected by leads 5. The first positive electrode regions 211a are arranged in a sheet. The back side (insulated) of the photodetector chip 1 is fixed on the heat dissipation region D, so that heat dissipation can be achieved through the first metal layer 211. A second metal layer 213 and a second ink layer 214 are sequentially disposed on the back side of the packaging substrate 21. The second metal layer 213 has a second positive electrode region 213a and a second negative electrode region 213b. The second positive electrode region 213a corresponds to the first positive electrode region 211a, and the second negative electrode region 213b corresponds to the first negative electrode region 211b, and they are connected through conductive vias 215 respectively. The second ink layer 214 partially covers the second metal layer 213, and the exposed second positive electrode region 213a forms the positive electrode lead-out terminal A2, and the exposed second negative electrode region 213b forms the negative electrode lead-out terminal B2. For example, there can be two or more positive electrode leads-out terminals A2, and there can be one negative electrode lead-out terminal B2. Thus, the lead-out and heat dissipation of the circuit within the enclosed cavity are realized. Furthermore, the heat dissipation area D has multiple conductive vias 215 arranged in a concentrated manner, which allows the heat generated by the photoelectric detection chip 1 to be quickly diffused out of the cavity through the first positive electrode area 211a, the conductive vias 215 and the second positive electrode area 213a, thus avoiding heat accumulation.
[0032] The conductive via 215 can be, for example, a conductive via filled with a conductive metal material, or a conductive via with a conductive metal material layer formed on the sidewall and filled with epoxy resin, depending on the size and requirements. The first ink layer 212 and the second ink layer 214 are insulating inks, wherein the thickness of the first ink layer is 20-40 μm, and the thickness of the second ink layer 214 is 25-40 μm to shield the metal layer circuitry and form a flat surface. The materials of the metal layer and the conductive via are, for example, Cu or Ni / Cu stacks.
[0033] The cavity packaging structure of the aforementioned photoelectric detection chip achieves a fully enclosed structure, which can effectively protect the photosensitive area of the photoelectric detection chip from damage by external environment and physical factors, avoid the influence of dust and other contaminants on the photosensitive area, and improve its reliability and stability; it is conducive to heat dissipation of the device, improves working efficiency and lifespan; it is highly adaptable and can be adapted to different electronic components and circuit boards, with high flexibility and versatility.
[0034] The above embodiments are only used to further illustrate the cavity packaging structure of a photoelectric detection chip of the present invention. However, the present invention is not limited to the embodiments. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall fall within the protection scope of the technical solution of the present invention.
Claims
1. A cavity packaging structure for a photoelectric detection chip, characterized in that: The package includes a main body, a photodetector chip, and a transparent cover. The main body includes a package substrate and a sidewall disposed on the package substrate. The transparent cover is disposed on the sidewall and connected by a curing adhesive to form a closed cavity. The photodetector chip is disposed in the cavity. The front side of the package substrate has an electrode connection point, and the back side has an electrode lead-out end. The front side of the photodetector chip has a planar photosensitive area, and the back side is fixed to the package substrate and electrically connected to the electrode connection point. The edge of the transparent cover is recessed relative to the edge of the sidewall. The curing adhesive is disposed between the transparent cover and the top surface of the sidewall and is stacked on the side edge of the transparent cover.
2. The cavity packaging structure of the photoelectric detection chip according to claim 1, characterized in that: The plane of the planar photosensitive area is parallel to the top surface of the side wall, and the plane of the planar photosensitive area is parallel to the transparent cover plate.
3. The cavity packaging structure of the photoelectric detection chip according to claim 1, characterized in that: The width of the sidewall is 0.4 to 0.8 mm, and the edge of the transparent cover is recessed inward by 0.05 to 0.15 mm relative to the edge of the sidewall.
4. The cavity packaging structure of the photoelectric detection chip according to claim 1, characterized in that: The curing adhesive is a photothermal dual-curing adhesive, and its thickness between the transparent cover plate and the top surface of the side wall is 50-100 μm.
5. The cavity packaging structure of the photoelectric detection chip according to claim 1, characterized in that: The cured adhesive is stacked on the edge side of the transparent cover to form a sloping surface with a lower thickness greater than the upper thickness.
6. The cavity packaging structure of the photoelectric detection chip according to claim 1, characterized in that: The photodetector chip is a photomultiplier tube, and the planar photosensitive area is a surface array composed of multiple photosensitive units. The photodetector chip is provided with a positive terminal and a negative terminal, and the electrode connection points include a positive connection point and a negative connection point. The positive terminal and the positive connection point are bonded by wire bonding, and the negative terminal and the negative connection point are bonded by wire bonding.
7. The cavity packaging structure of the photoelectric detection chip according to claim 6, characterized in that: The front side of the packaging substrate is provided with a first metal layer and a first ink layer in sequence. The first metal layer has a first positive electrode region and a first negative electrode region. The first ink layer partially covers the first metal layer. The exposed first positive electrode region forms the positive electrode connection point and the heat dissipation region. The exposed first negative electrode region forms the negative electrode connection point. The photoelectric detection chip is fixed on the heat dissipation region.
8. The cavity packaging structure of the photoelectric detection chip according to claim 7, characterized in that: The electrode leads include a positive lead and a negative lead; a second metal layer and a second ink layer are sequentially provided on the back of the packaging substrate, the second metal layer has a second positive electrode region and a second negative electrode region, the second positive electrode region and the second negative electrode region correspond one-to-one with the first positive electrode region and the first negative electrode region and are respectively connected through conductive vias; the second ink layer partially covers the second metal layer, the exposed second positive electrode region forms the positive lead, and the exposed second negative electrode region forms the negative lead.
9. The cavity packaging structure of the photoelectric detection chip according to claim 8, characterized in that: The heat dissipation area has a plurality of conductive through holes arranged in a concentrated manner below it.
10. The cavity packaging structure of the photoelectric detection chip according to claim 8, characterized in that: The first ink layer and the second ink layer are insulating inks, wherein the thickness of the first ink layer is 20-40 μm and the thickness of the second ink layer is 25-40 μm.