A packaging structure

CN224306311UActive Publication Date: 2026-05-29SHANGHAI CHAOFENG TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SHANGHAI CHAOFENG TECH CO LTD
Filing Date
2025-06-04
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing packaging structures occupy a large area, have high costs, high power losses, and complex wiring, making it difficult to balance the contradiction between performance, cost, and size.

Method used

A BUCK topology switching power supply chip with a conductive frame is used. The chip has built-in drive circuit and power devices. The power and signal terminals are located in the upper and lower halves respectively and are connected by conductive bumps. This reduces wire bonding, increases the area of ​​the power terminal pad, reduces the distance between the power input terminal and the power ground terminal, and reduces parasitic inductance and resistance.

Benefits of technology

It achieves a more compact, low-loss packaging structure, reduces the circuit board footprint, enhances current capability and heat dissipation, reduces interference from the switching terminal to other signals, and improves power conversion efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a packaging structure, comprising: a conductive frame; a BUCK topology type switching power supply chip on the conductive frame, the BUCK topology type switching power supply chip is provided with a plurality of conductive bumps; the BUCK topology type switching power supply chip comprises a driving circuit and a power device, the driving circuit drives the power device; the conductive frame is divided into a plurality of power terminals and a plurality of signal terminals, the power terminals are electrically connected with the power device through corresponding conductive bumps respectively, and the signal terminals are electrically connected with the driving circuit through corresponding conductive bumps respectively. The application can solve the problems of the existing packaging structure, such as large occupied area, high cost, etc., increase the heat dissipation area, reduce the thermal resistance, and reduce the parasitic resistance and parasitic inductance, and reduce the power consumption.
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Description

Technical Field

[0001] This utility model relates to the field of integrated circuit packaging technology, and more specifically, to a packaging structure. Background Technology

[0002] As people use electronic devices more and more, the application of fast charging technology is becoming more and more widespread. For example, mobile devices, tablets and other electronic devices. With the iterative development of consumer electronics technology, fast charging technology has undergone multiple generations of upgrades from 5V2A to 9V2A, 12V2A and 20V5A. While improving charging efficiency, it also puts forward higher requirements for the miniaturization and integration of charging devices.

[0003] The implementation of fast charging technology requires not only compatible electronic devices but also a highly critical charger. In current technology, the core control module of a fast charger typically uses a BUCK topology switching power supply chip as the key component for power conversion. Currently, the mainstream packaging solutions fall into two categories: first, using a separate BUCK controller chip paired with two discretely packaged power transistors (such as MOSFETs), with electrical connections achieved via a circuit board; second, simply encapsulating the BUCK controller chip and power transistors to form a large-size integrated package module. However, both solutions suffer from problems such as large footprint, high material costs, high power loss, and complex wiring.

[0004] With the widespread adoption of multi-port chargers, high-power power banks, and other products, higher demands are being placed on the integration, power consumption control, and space utilization of power management chips. Existing packaging solutions are struggling to balance the trade-offs between performance, cost, and size, necessitating a more compact, low-loss, and easy-to-wire chip packaging structure to adapt to the further development of fast charging technology. Utility Model Content

[0005] The purpose of this invention is to provide a packaging structure to solve the problems of excessive area and high cost of existing packaging structures.

[0006] This utility model provides a packaging structure, including:

[0007] Conductive framework;

[0008] A BUCK topology type switching power supply chip located on a conductive frame, the BUCK topology type switching power supply chip is provided with multiple conductive bumps;

[0009] BUCK topology switching power supply chips include a driver circuit and power devices, with the driver circuit driving the power devices;

[0010] The conductive frame is divided into several power terminals and several signal terminals. The power terminals are electrically connected to power devices through corresponding conductive bumps, and the signal terminals are electrically connected to drive circuits through corresponding conductive bumps.

[0011] Preferably, the power terminal includes a power input terminal, a power ground terminal, and a switching operation terminal.

[0012] Preferably, the power device includes an upper metal-oxide-semiconductor field-effect transistor (MOSFET) and a lower metal-oxide-semiconductor field-effect transistor (MOSFET). The power input terminal is electrically connected to the drain of the upper MOSFET, the power ground terminal is electrically connected to the source of the lower MOSFET, and the switching terminal is electrically connected to the source of the upper MOSFET and the drain of the lower MOSFET.

[0013] Preferably, the power input terminal is connected to the drain of the upper metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads, the power ground terminal is connected to the source of the lower metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads, and the switching terminal is connected to the source of the upper metal-oxide-semiconductor field-effect transistor and the drain of the lower metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads.

[0014] Preferably, the packaging structure further includes a molding compound, which includes a first surface, and power terminals and several signal terminals are exposed from the first surface of the molding compound.

[0015] Preferably, the signal terminal is located on the upper part of the first surface of the molding compound, and the power terminal is located on the lower part of the first surface of the molding compound.

[0016] Preferably, the area of ​​each power terminal is larger than the area of ​​each signal terminal.

[0017] Preferably, the area of ​​the conductive bump connected to a power terminal is larger than the area of ​​the conductive bump connected to a signal terminal.

[0018] Preferably, the number of conductive bumps connected to a power terminal is greater than the number of conductive bumps connected to a signal terminal.

[0019] Preferably, the number of conductive bumps connected to a power terminal is N times the number of conductive bumps connected to a signal terminal.

[0020] Preferably, N is greater than or equal to 6.

[0021] Preferably, the power terminal includes a first power input terminal, a second power input terminal VIN2, a first power ground terminal, a second power ground terminal, and a switch action terminal, with the switch action terminal located between the first power ground terminal and the second power ground terminal.

[0022] Preferably, the power terminals include a first power input terminal and a second power input terminal symmetrically arranged; and a first power ground terminal and a second power ground terminal symmetrically arranged.

[0023] Preferably, the package structure includes opposing first and second sides, as well as opposing third and fourth sides. A first power input terminal is located on the first side, a second power input terminal is located on the second side, a first power ground terminal is located in the angle region between the first and third sides, and a second power ground terminal is located in the angle region between the second and third sides. The first power ground terminal and the second power ground terminal are symmetrically arranged.

[0024] Preferably, the package structure includes a third side, and the size of the switch action terminal exposed in the direction of the third side is smaller than the size of the first power input terminal, the second power input terminal, the first power ground terminal, and the second power ground terminal exposed in the direction of the third side.

[0025] Preferably, the exposed dimension of the switch actuation terminal in the third side direction is 0.2mm-0.5mm.

[0026] Preferably, the center-to-center distance between two adjacent signal terminals located on the same side is 0.3mm-0.5mm.

[0027] Preferably, the lateral distance between the power ground terminal and the switch operating terminal is greater than 0.3 mm, and the lateral distance between the power input terminal and the switch operating terminal is greater than or equal to 0.3 mm.

[0028] Preferably, the first surface of the encapsulation structure is rectangular.

[0029] Preferably, the first surface of the encapsulation structure is square with a side length of 3mm.

[0030] Preferably, the packaging structure is any one of QFN package, QFP package, and LGA package.

[0031] Preferably, the exposed portions of the signal and power terminals on the sides have wettable side wing structures.

[0032] Preferably, the BUCK topology switching power supply chip is a step-down DC-DC converter chip.

[0033] Preferably, the BUCK topology switching power supply chip is a charging chip.

[0034] Preferably, the driving circuit is located in the upper part of the switching power supply chip, and the power device is located in the lower part of the switching power supply chip.

[0035] The present invention provides a packaging structure that, compared with existing packaging structures, integrates the drive circuit and power devices into the same BUCK topology switching power supply chip and encapsulates them in the same package. The present invention does not require packaging wire bonding, has lower impedance, stronger current capability, and lower parasitic inductance. At the same time, the conductive frame is divided into several power terminals and several signal terminals, with the signal terminals and power terminals in the upper and lower halves respectively, resulting in less interference between the signal terminals and power terminals.

[0036] This invention also features an increased area of ​​the conductive bumps and pad surface corresponding to the power end to meet the demands of high power and high current. This not only improves heat dissipation but also reduces parasitic resistance, enhances current carrying capacity, and reduces thermal resistance.

[0037] Preferably, the BUCK topology switching power supply chip adopts a QFN package structure, which not only has a smaller size to effectively reduce the area occupied by the circuit board, but also reduces the distance between its power input terminal and power ground terminal, thereby reducing parasitic inductance and hot-loop path and reducing the power loss of the BUCK topology switching power supply chip.

[0038] The packaging structure also features a lateral reduction in the pad width of the switch action terminal and a reduction in the lateral distance between the power input terminal and the power ground terminal and the switch action terminal. Furthermore, by placing the switch action terminal between the first power ground terminal and the second power ground terminal, the interference of the switch action terminal to other operating signals is significantly reduced. Attached Figure Description

[0039] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings.

[0040] Figure 1 A schematic diagram of a portion of the conductive frame in the packaging structure of an embodiment of this utility model is shown;

[0041] Figure 2 A schematic diagram of the packaging structure of an embodiment of the present invention is shown;

[0042] Figure 3 A schematic diagram of the chip and multiple conductive bumps in the packaging structure of an embodiment of the present invention is shown;

[0043] Figure 4 A top perspective view of the packaging structure according to an embodiment of the present invention is shown;

[0044] Figure 5 A partial dimensional schematic diagram of the top perspective view of the packaging structure according to an embodiment of the present invention is shown. Detailed Implementation

[0045] The present invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown.

[0046] It should be understood that when describing a structure, referring to a component or module as being "before" another component or module can mean that it is directly located at the front end of and connected to the circuit of the other component or module, or that other components or modules are included between it and the other component or module. Furthermore, the position and adjacency of some modules can be adjusted as needed.

[0047] In order to describe a situation that is directly in front of another component or module, this article will use the expressions "directly in front of" or "in front of and adjacent to".

[0048] The following description of certain embodiments of the present invention includes many specific details, such as the specific circuit composition of the modules, the types, quantities, and connections of the components, to provide a clearer understanding of the present invention. However, as those skilled in the art will understand, the present invention may be implemented without adhering to these specific details.

[0049] This utility model describes a packaging structure, including a conductive frame and a BUCK topology type switching power supply chip located on the conductive frame. The BUCK topology type switching power supply chip is provided with multiple conductive bumps, and the BUCK topology type switching power supply chip is correspondingly connected to the conductive frame through the multiple conductive bumps.

[0050] This utility model can be presented in various forms, some of which will be described below.

[0051] A packaging structure, characterized in that it comprises:

[0052] Conductive framework; Figure 1 A schematic diagram of a portion of the conductive frame in the packaging structure of an embodiment of this utility model is shown;

[0053] A BUCK topology type switching power supply chip located on a conductive frame has multiple conductive bumps, such as... Figure 2 As shown;

[0054] BUCK topology switching power supply chips include a driver circuit and power devices, with the driver circuit driving the power devices;

[0055] like Figure 1As shown, the conductive frame is divided into several power terminals 4, 5, 6, 7, 8 and several signal terminals 1, 2, 3, 9, 10, 12, 13, 14, 15, 16. However, the number of signal terminals in this utility model is not limited to the number disclosed in this utility model, and may be other numbers.

[0056] Power terminals 4, 5, 6, 7, and 8 are electrically connected to the power devices through their corresponding conductive bumps, while signal terminals 1, 2, 3, 9, 10, 12, 13, 14, 15, and 16 are electrically connected to the drive circuit through their corresponding conductive bumps.

[0057] The drive circuit is located in the upper part of the package structure, and the power device is located in the lower part of the package structure.

[0058] No bonding wires are required, resulting in lower impedance, stronger current capability, and lower parasitic inductance.

[0059] The driver and power devices are packaged in the same package, with the signal terminal and power terminal located in the upper and lower halves respectively, and there is no interference between them.

[0060] The power terminals include power input terminals VIN1 and VIN2, power ground terminals PGND1 and PGND2, and switch operation terminal SW.

[0061] like Figure 1 and Figure 3 As shown, the power device includes an upper metal-oxide-semiconductor field-effect transistor (MOSFET) and a lower metal-oxide-semiconductor field-effect transistor (MOSFET). The power input terminals VIN1 and VIN2 are electrically connected to the drain of the upper MOSFET, and the power ground terminals PGND1 and PGND2 are electrically connected to the source of the lower MOSFET. The switching terminal SW is electrically connected to the source of the upper MOSFET and the drain of the lower MOSFET.

[0062] like Figure 1 and Figure 3 As shown, the power input terminals VIN1 and VIN2 are connected to the drain of the upper metal-oxide-semiconductor field-effect transistor (MOSFET) through multiple conductive bumps and corresponding pads, the power ground terminals PGND1 and PGND2 are connected to the source of the lower MOSFET through multiple conductive bumps and corresponding pads, and the switching terminal SW is connected to the source of the upper MOSFET and the drain of the lower MOSFET through multiple conductive bumps and corresponding pads.

[0063] The conductive frame in the package structure includes 16 corresponding pads and bonding regions (shaded areas in the figure) that are connected to the 16 pads and extend toward the central region of the package structure.

[0064] like Figure 1 As shown, the packaging structure also includes a molding compound, which includes a first surface, and power terminals and several signal terminals are exposed from the first surface of the molding compound.

[0065] The signal terminal is located on the upper part of the first surface of the molding compound, and the power terminal is located on the lower part of the first surface of the molding compound.

[0066] Furthermore, the conductive frame is made of metal, for example, and has a supporting function to support the charging chip to be packaged. The charging chip is, for example, a BUCK topology type switching power supply chip, used to realize the step-down DC-DC conversion function, converting the input DC voltage (usually higher than the target voltage) into a stable low-voltage DC output through switching control and energy storage elements (inductors, capacitors).

[0067] Specifically, see Figure 2 As shown, among the 16 pads, pads 1 to 3 and pads 9 to 16 located in the upper half of the package structure are connected to the signal terminals and are not used to carry large currents; their area is moderate. Pads 4 to 8 located in the lower half of the package structure are connected to the power terminals and need to carry large currents. Therefore, the area of ​​each pad in pads 4 to 8 is larger than the area of ​​each pad in pads 1 to 3 and pads 9 to 16.

[0068] Furthermore, the package structure is, for example, rectangular, including opposing first side 101 and second side 102, and opposing third side 103 and fourth side 104. Sixteen pads are located near the four sides. Specifically, pads 1 to 4 are located on the first side 101, pads 8 to 11 are located on the second side 102, pad 5 is located in the angled region between the first side 101 and the third side 103, pad 7 is located in the angled region between the second side 102 and the third side 103, pad 6 is located on the third side 103, and pad 6 is located between pad 5 and pad 7; pads 12 to 16 are located on the fourth side 104.

[0069] Although the diagram shows each terminal in the form of pads, of course, each terminal can also be in the form of pins or other forms, and their size and area correspond to the pads, which will not be described in detail here.

[0070] Figure 3 The diagram shows a chip and multiple conductive bumps in the packaging structure of an embodiment of the present invention. The charging chip is, for example, a BUCK topology type switching power supply chip. The BUCK topology type switching power supply chip adopts a FLIP-CHIP design and has multiple conductive bumps (BUMPs) at the pad positions. The conductive bumps are composed of cylinders and hemispheres and are responsible for the connection and support between the BUCK topology type switching power supply chip and the conductive frame, so as to realize the electrical connection and fixation between the BUCK topology type switching power supply chip and the conductive frame.

[0071] Conductive bumps 201, 202, 203, VIN1, and PGND1 are arranged sequentially on the first side 21 of the BUCK topology switching power supply chip. Conductive bumps 211, 210, 209, VIN2, and PGND2 are arranged sequentially on the second side 22 of the BUCK topology switching power supply chip. Conductive bumps 212, 213, 214, 215, and 216 are arranged sequentially on the fourth side 24 of the BUCK topology switching power supply chip. The switching actuation terminal SW is located on the third side 23 of the BUCK topology switching power supply chip. Specifically, the power input terminal VIN of the BUCK topology type switching power supply chip includes a first power input terminal VIN1 and a second power input terminal VIN2. The first power input terminal VIN1, for example, is electrically connected to three conductive bumps, and the second power input terminal VIN2, for example, is also electrically connected to three conductive bumps. The first power input terminal VIN1 and the second power input terminal VIN2 are symmetrically arranged on the first and second sides of the chip. Similarly, the power ground terminal PGND includes a first power ground terminal PGND1 and a second power ground terminal PGND2. The first power ground terminal PGND1, for example, is electrically connected to three conductive bumps, and the second power ground terminal PGND2, for example, is also electrically connected to three conductive bumps. The first power ground terminal PGND1 is located at the angle between the first and third sides of the BUCK topology type switching power supply chip. The second power ground terminal PGND2 is located at the angle between the second and third sides of the BUCK topology type switching power supply chip, and the first power ground terminal PGND1 and the second power ground terminal PGND1 are symmetrical. The switch actuation terminal SW is electrically connected to 12 conductive bumps arranged in two 2*3 arrays. The conductive bumps connected to the switch actuation terminal SW are located near the third side 23 and extend towards the center of the chip. Conductive bumps 201, 202, 203, 211, 210, 209, 212, 213, 214, 215, and 216 each include one conductive bump.

[0072] Of course, the number of conductive bumps mentioned above is just an example; the larger the pad area, the more conductive bumps can be set accordingly.

[0073] Figure 4A perspective view of the package structure according to an embodiment of the present invention is shown. The package structure includes 16 pads, of which the signal pads are pads 1-3 and pads 9-16. The package structure includes opposing first sides 101 and second sides 102, and opposing third sides 103 and fourth sides 104. A first power input terminal VIN1 is located on the first side, and a second power input terminal VIN2 is located on the second side 102. The first power input terminals VIN1 and VIN2 are symmetrically arranged. A first power ground terminal PGND1 is located in the angled region between the first side 101 and the third side 103, and a second power ground terminal PGND2 is located in the angled region between the second side 102 and the third side 103. The first power ground terminal PGND1 and the second power ground terminal PGND2 are symmetrically arranged.

[0074] Combination Figure 3 As shown in the chip schematic, conductive bump 201 is connected to pad 1, conductive bump 202 is connected to pad 2, conductive bump 203 is connected to pad 3, the first power input terminal VIN1 is connected to pad 4, the first power ground terminal PGND1 is connected to pad 5, the switch action terminal SW is connected to pad 6, the second power ground terminal PGND2 is connected to pad 7, the second power input terminal VIN2 is connected to pad 8, conductive bump 209 is connected to pad 9, conductive bump 210 is connected to pad 10, conductive bump 211 is connected to pad 11, conductive bump 212 is connected to pad 12, conductive bump 213 is connected to pad 13, conductive bump 214 is connected to pad 14, conductive bump 215 is connected to pad 15, and conductive bump 216 is connected to pad 16.

[0075] Figure 5A partial dimensional schematic diagram of the packaging structure according to an embodiment of the present invention is shown. The dashed lines in the diagram are used to mark the center lines of the corresponding pads. The packaging structure of this embodiment is, for example, square, with a side length C of 3mm. The pads corresponding to the signal terminals include, for example, pads 1 to 3 and pads 9 to 16. Specifically, the signal terminals include, for example, an enable terminal EN, a low-voltage power supply terminal VCC, a frequency setting terminal RT, and a signal ground terminal AGND. The center-to-center distance between two adjacent signal terminals on the same side is e, which is, for example, 0.3mm-0.5mm, preferably 0.45mm. The length L of the pad corresponding to the signal terminal, taking pad 12 as an example, is, for example, 0.25mm-0.35mm, preferably 0.35mm. The center-to-center distance between pad 4 corresponding to the first power input terminal VIN1 and the adjacent pad 3 corresponding to the signal terminal, and the center-to-center distance between pad 8 corresponding to the second power input terminal VIN2 and the adjacent pad 9 corresponding to the signal terminal, is e2, which is, for example, 0.475mm. The length L2 of pads 4 and 8 corresponding to the first power input terminal VIN1 and the second power input terminal VIN2 is, for example, 0.85mm-0.95mm, preferably 0.9mm. The width b3 of pad 8 on the second side 102 is 0.25mm, and the width b2 of pad 8 is 0.3mm-0.4mm, preferably 0.35mm. Pad 5 is located at the angle between the first side 101 and the third side 103. The outline of pad 5 is, for example, rectangular, and it has two protruding ends extending to the first side 101 and two protruding ends extending to the third side 103. Pad 7 is symmetrical to pad 5 and is located at the angle between the second side 102 and the third side 103. Taking pad 7 as an example, its width b in the third side direction is 0.15mm-0.25mm, preferably 0.2mm, and the width L3 of pad 7 in the second side direction is 0.6mm-0.8mm, preferably 0.7mm. The length L1 of the pad 6 in the second side direction is 1.5mm-1.6mm, preferably 1.55mm, and the width a of the pad 6 in the third side direction is less than 0.5mm, preferably 0.35mm.

[0076] The size of pad 6 in the direction of the third side 103 is smaller than the size of the first power input terminal VIN1, the second power input terminal VIN2, the first power ground terminal PGND1, and the second power ground terminal PGND2 in the direction of the third side 103. The size of pad 6 in the direction of the third side 103 is 0.2mm-0.5mm.

[0077] In this package structure, pads with high current requirements, such as pads 4, 5, 6, 7, and 8, are all located in the lower half of the package structure, which effectively reduces the impact of high current on the pad signals in the upper half. Furthermore, the pads for the power ground (PGND) and the power input (VIN) are arranged adjacent to each other, reducing the distance between the power input and power ground, decreasing parasitic inductance and hot-loop paths, lowering power loss in the BUCK topology switching power supply chip, and improving its performance. Furthermore, the pad width of the switching actuation terminal (SW) is specifically narrowed, and the lateral distance between the power input and power ground terminals and the switching actuation terminal (SW) is reduced, reducing interference from the switching actuation terminal (SW) to other operating signals. Specifically, the switching actuation terminal (SW) is located between power ground (PGND1) and power ground (PGND2).

[0078] Furthermore, the Figure 4 The red rectangle in the middle represents the molding compound, and the outer part of the molding compound is the connecting rib of the conductive frame, which will be cut off in the final packaged structure.

[0079] This utility model provides a BUCK topology type switching power supply chip packaging structure. Compared with existing packaging structures, it places all power signal terminals on the same side of the packaging structure, which can effectively reduce interference to other signals. Furthermore, it also significantly increases the pad area of ​​the power terminals to meet the needs of high power and high current. Specifically, its power input terminal VIN (first power input terminal VIN1 and second power input terminal VIN2), power ground terminal PGND (first power ground terminal PGND1 and second power ground terminal PGND2), and switching terminal SW all have large pad areas, which not only increases the heat dissipation effect but also reduces parasitic resistance, enhances current carrying capacity, and reduces thermal resistance.

[0080] Furthermore, the package structure of this BUCK topology switching power supply chip can be any one of QFN package, QFP package, or LGA package.

[0081] The present invention provides a packaging structure for a BUCK topology switching power supply chip, which not only has a smaller size, effectively reducing the area occupied by the circuit board, but also reduces the distance between its power input terminal VIN and power ground terminal PGND, thereby reducing parasitic inductance and hot-loop path and lowering the power loss of the BUCK topology switching power supply chip.

[0082] This package structure also specifically reduces the width of the pad for the switch action terminal SW laterally, controlling its width to 0.2mm-0.5mm. The exposed dimension of the switch action terminal on the third side is 0.2mm-0.5mm. This package structure reduces the lateral distance between the power input terminal VIN and the switch action terminal SW, and the lateral distance between the power ground terminal PGND and the switch action terminal SW, controlling this lateral distance to above 0.3mm. Furthermore, the switch action terminal SW is positioned between the first power ground terminal PGND1 and the second power ground terminal PGND2, significantly reducing the interference of the switch action terminal SW on other operating signals.

[0083] The exposed portions of the signal and power terminals on the sides are wettable side wing structures.

[0084] The above description does not provide detailed technical specifications regarding the positional arrangement and connection methods of the components. However, those skilled in the art should understand that various technical means can be used to form the desired connection relationships. Furthermore, to achieve the same function, those skilled in the art can design structures that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be advantageously combined.

[0085] The embodiments of this utility model have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of this utility model. The scope of this utility model is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this utility model, and all such substitutions and modifications should fall within the scope of this utility model.

Claims

1. A packaging structure, characterized in that, include: Conductive framework; A BUCK topology type switching power supply chip located on the conductive frame, the BUCK topology type switching power supply chip having multiple conductive bumps; The BUCK topology switching power supply chip includes a driving circuit and a power device, wherein the driving circuit drives the power device. The conductive frame is divided into several power terminals and several signal terminals. The power terminals are electrically connected to the power devices through corresponding conductive bumps, and the signal terminals are electrically connected to the driving circuit through corresponding conductive bumps.

2. The packaging structure according to claim 1, characterized in that, The power terminal includes a power input terminal, a power ground terminal, and a switching operation terminal.

3. The packaging structure according to claim 2, characterized in that, The power device includes an upper metal-oxide-semiconductor field-effect transistor (MOSFET) and a lower metal-oxide-semiconductor field-effect transistor (MOSFET). The power input terminal is electrically connected to the drain of the upper MOSFET, the power ground terminal is electrically connected to the source of the lower MOSFET, and the switching terminal is electrically connected to the source of the upper MOSFET and the drain of the lower MOSFET.

4. The packaging structure according to claim 3, characterized in that, The power input terminal is connected to the drain of the upper metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads; the power ground terminal is connected to the source of the lower metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads; and the switching terminal is connected to the source of the upper metal-oxide-semiconductor field-effect transistor and the drain of the lower metal-oxide-semiconductor field-effect transistor through multiple conductive bumps and corresponding pads.

5. The packaging structure according to claim 2, characterized in that, The packaging structure further includes a molding compound, the molding compound having a first surface, and the power terminal and several signal terminals exposed from the first surface of the molding compound.

6. The packaging structure according to claim 5, characterized in that, The signal terminal is located on the upper part of the first surface of the encapsulation, and the power terminal is located on the lower part of the first surface of the encapsulation.

7. The packaging structure according to claim 2, characterized in that, The area of ​​each power terminal is larger than the area of ​​each signal terminal.

8. The packaging structure according to claim 2, characterized in that, The area of ​​the conductive bump connected to one of the power terminals is greater than the area of ​​the conductive bump connected to one of the signal terminals.

9. The packaging structure according to claim 2, characterized in that, The number of conductive bumps connected to one of the power terminals is greater than the number of conductive bumps connected to one of the signal terminals.

10. The packaging structure according to claim 2, characterized in that, The number of conductive bumps connected to one of the power terminals is N times the number of conductive bumps connected to one of the signal terminals.

11. The packaging structure according to claim 10, characterized in that, The N is greater than or equal to 6.

12. The packaging structure according to claim 2, characterized in that, The power terminal includes a first power input terminal, a second power input terminal, a first power ground terminal, a second power ground terminal, and a switch action terminal, wherein the switch action terminal is located between the first power ground terminal and the second power ground terminal.

13. The packaging structure according to claim 12, characterized in that, The power terminals include a first power input terminal and a second power input terminal symmetrically arranged; the first power ground terminal and the second power ground terminal are also symmetrically arranged.

14. The packaging structure according to claim 13, characterized in that, It includes a first side and a second side, as well as a third side and a fourth side. A first power input terminal is located on the first side, a second power input terminal is located on the second side, a first power ground terminal is located in the angle region between the first side and the third side, and a second power ground terminal is located in the angle region between the second side and the third side. The first power ground terminal and the second power ground terminal are symmetrically arranged.

15. The packaging structure according to claim 4, characterized in that, The packaging structure includes a third side, and the power terminal includes a first power input terminal, a second power input terminal, a first power ground terminal, a second power ground terminal, and a switch action terminal. The size of the switch action terminal exposed in the direction of the third side is smaller than the size of the first power input terminal, the second power input terminal, the first power ground terminal, and the second power ground terminal exposed in the direction of the third side.

16. The packaging structure according to claim 15, characterized in that, The size of the switch actuating end exposed in the direction of the third side is 0.2mm-0.5mm.

17. The packaging structure according to claim 1, characterized in that, The center-to-center distance between two adjacent signal terminals on the same side is 0.3mm-0.5mm.

18. The packaging structure according to claim 15, characterized in that, The lateral distance between the power ground terminal and the switch operating terminal is greater than 0.3 mm, and the lateral distance between the power input terminal and the switch operating terminal is greater than or equal to 0.3 mm.

19. The packaging structure according to claim 1, characterized in that, The first surface of the encapsulation structure is rectangular.

20. The packaging structure according to claim 19, characterized in that, The first surface of the encapsulation structure is square with a side length of 3mm.

21. The packaging structure according to claim 1, characterized in that, The packaging structure can be any one of QFN, QFP, or LGA packaging.

22. The packaging structure according to claim 1, characterized in that, The exposed portions of the signal terminal and the power terminal on the side are wettable side wing structures.

23. The packaging structure according to claim 1, characterized in that, The BUCK topology switching power supply chip is a step-down DC-DC converter chip.

24. The packaging structure according to claim 1, characterized in that, The BUCK topology type switching power supply chip is a charging chip.

25. The packaging structure according to claim 1, characterized in that, The driving circuit is located in the upper part of the switching power supply chip, and the power device is located in the lower part of the switching power supply chip.