A dual-channel voice simultaneous transmission wireless transceiving system

Abstract

The utility model discloses a kind of dual-path voice simultaneous transmission wireless transceiving systems, including transmitting part and receiving part, the transmitting part includes sequentially connected low-frequency amplification circuit, frequency synthesis oscillation circuit, resonant hybrid circuit and impedance matching transmitting circuit, the receiving part includes sequentially connected signal receiving circuit, frequency modulation circuit, mixing frequency discriminator circuit and power amplifier circuit, the impedance matching transmitting circuit is connected with the signal receiving circuit communication, the low-frequency amplification circuit receives dual-path voice input signal, the power amplifier circuit outputs dual-path voice signal;The utility model is characterized in that: the immediacy of communication is higher.

Description

Technical Field

[0001] This utility model relates to the field of wireless transmission communication, and more specifically to a dual-channel voice simultaneous interpretation wireless transceiver system. Background Technology

[0002] With social development and progress, human activities increasingly rely on the services provided by wireless communication technology. Wireless communication technology, with its speed, convenience, and portability, has attracted significant attention and developed rapidly. Among these, wireless transmission of voice signals is a fundamental requirement. However, in ordinary wireless voice signal transmission, only one voice signal can usually be transmitted at a time. This significantly reduces the efficiency and immediacy of communication, and traditional stereo wireless voice transmission schemes suffer from complex circuitry, low spectrum utilization, and an inability to flexibly allocate transmission bandwidth. Therefore, there is an urgent need for a dual-channel simultaneous voice transmission wireless transceiver system to solve the problems encountered in daily life and improve communication efficiency. Utility Model Content

[0003] The technical problem to be solved by this utility model is that the existing dual-channel voice wireless transceiver system has low communication immediacy.

[0004] This utility model solves the above-mentioned technical problems through the following technical means: a dual-channel voice simultaneous interpretation wireless transceiver system, including a transmitting part and a receiving part. The transmitting part includes a low-frequency amplifier circuit, a frequency synthesis oscillation circuit, a resonant mixing circuit, and an impedance matching transmitting circuit connected in sequence. The receiving part includes a signal receiving circuit, a frequency modulation circuit, a frequency mixing and discrimination circuit, and a power amplifier circuit connected in sequence. The impedance matching transmitting circuit is communicatively connected to the signal receiving circuit. The low-frequency amplifier circuit receives dual-channel voice input signals, and the power amplifier circuit outputs dual-channel voice signals.

[0005] This invention features a low-frequency amplifier circuit that receives dual-channel voice input signals and a power amplifier circuit that outputs dual-channel voice signals. The input terminals of the two voice signals are the same, and the two voice signals are input simultaneously. After processing by the transmitting and receiving sections, the two stable voice signals are output, resulting in high real-time communication.

[0006] Further, the low-frequency amplifier circuit includes capacitors C1, C2, and C3; resistors R1 to R4 numbered sequentially; microphone MK1; resistors R9, R10, and R12; capacitors C13, C14, and C6; transistor VT4; and transistor VT5. Microphone MK1 receives two amplitude-modulated dual-channel voice input signals. One end of microphone MK1 is connected to one end of capacitor C13 and one end of resistor R1. The other end of capacitor C13 is connected to one end of resistor R9 and the base of transistor VT4. The other end of resistor R9, one end of resistor R2, the collector of transistor VT4, and one end of capacitor C14 are connected. The other end of capacitor C14 is connected to the base of resistor R10. One end of the capacitor is connected to the base of transistor VT5. The other end of resistor R10, one end of resistor R3, the positive terminal of capacitor C6, and the collector of transistor VT5 are connected. The negative terminal of capacitor C6 is connected to the frequency synthesis oscillation circuit. One end of resistor R12, the emitter of transistor VT5, the emitter of transistor VT4, and the other end of microphone MK1 are connected and grounded. The other end of resistor R12 is connected to one end of resistor R4. The other ends of resistors R1 to R4, the positive terminals of capacitors C1 and C2, and one end of capacitor C3 are all connected. One end of capacitor C3 is connected to the resonant mixing circuit. The negative terminals of capacitors C1 and C2, and the other end of capacitor C3 are grounded. The frequency synthesis oscillation circuit is connected to the negative terminal of capacitor C6.

[0007] Furthermore, the resonant hybrid circuit includes resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, capacitor C7, inductor L3, transistors VT1 to VT3 (numbered sequentially), capacitor C12, capacitor C15, resistors 14 to R17 (numbered sequentially), capacitor C20, capacitor C21, and capacitor C22. One end of resistor R6, one end of resistor R14, one end of capacitor C15, and the base of transistor VT1 are connected and connected to the frequency synthesis oscillation circuit. The collector of transistor VT1, one end of capacitor C4, one end of inductor L1, and one end of capacitor C12 are connected. The emitter of transistor VT1, the other end of capacitor C15, one end of resistor R15, and one end of capacitor C20 are connected. The other end of capacitor C12, one end of resistor R7, one end of resistor R16, and capacitor C22 are connected. One end of C21 is connected to the base of transistor VT2; the collector of transistor VT2, one end of capacitor C5, one end of inductor L2, and one end of capacitor C7 are connected; the other end of capacitor C7, one end of resistor R17, one end of capacitor C22, and the base of transistor VT3 are connected; the collector of transistor VT3 is connected to one end of inductor L3; the other ends of resistor R14, resistor R17, capacitor C20, capacitor C21, capacitor C22, and the emitter of transistor VT3 are all connected together; the other ends of resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, and inductor L3 are all connected together; the other end of inductor L3 and the emitter of transistor VT3 are connected to the impedance matching emitter circuit.

[0008] Furthermore, the impedance matching transmitting circuit includes capacitors C8 to C11 (numbered sequentially), inductors L4, L5, and L6, resistor R8, capacitors C16 to C19 (numbered sequentially), indicator LED1, and antenna E1. One end of capacitor C8 is connected to one end of inductor L3, and the other end of capacitor C8, one end of inductor L4, and one end of capacitor C16 are connected together. The other end of inductor L4 is connected to one end of capacitor C9, and the other end of capacitor C9, one end of inductor L5, and one end of capacitor C17 are connected together. The other end of 5, one end of inductor L6, and one end of capacitor C18 are connected. The other end of inductor L6, antenna E1, and one end of capacitor C19 are connected. One end of resistor R8, the positive terminal of capacitor C10, and one end of capacitor C11 are all connected to the other end of inductor L3 and connected to the +6V power supply. The other end of resistor R8 is connected to the anode of indicator LED1. The emitter of transistor VT3, the other ends of capacitors C16 to C19, the cathode of indicator LED1, the negative terminal of capacitor C10, and the other end of capacitor C11 are all connected and grounded.

[0009] Furthermore, the signal receiving circuit includes an antenna E2, capacitors C31 to C36 numbered sequentially, a transformer T3, resistors R31 to R35 numbered sequentially, a transistor VT6, and a transistor VT7. The antenna E2 is connected to one end of capacitor C31. The other end of capacitor C31, one end of capacitor C32, and the same-name terminal of the main winding of transformer T3 are connected. The other end of capacitor C32 is connected to the opposite-name terminal of the main winding of transformer T3. One end of capacitor C33 is connected to the same-name terminal of the secondary winding of transformer T3. The other end of capacitor C33, one end of resistor R31, and the base of transistor VT6 are connected. The other end of resistor R31... The collector of transistor VT6, the emitter of transistor VT7, one end of capacitor C35, one end of resistor R33, and one end of resistor R35 are connected together. The emitter of transistor VT6, one end of capacitor C34, and one end of resistor R32 are connected together. The collector of transistor VT7 is connected to one end of resistor R34. The other end of resistor R34 and the other end of resistor R35 are connected to capacitor C36. The other ends of resistor R34 and resistor R35 are both connected to the frequency modulation circuit. The opposite-name terminal of the secondary coil of transformer T3, the other end of capacitor C34, the other end of resistor R32, the other end of capacitor C35, and the other end of resistor R33 are all connected and grounded.

[0010] Furthermore, the frequency modulation circuit includes a transformer T2, a chip U1, a capacitor C37, a resistor R36, a capacitor C49, sequentially numbered crystal oscillators JT3 to JT6, sequentially numbered capacitors C39 to C42, resistors R61, R41, R44, and capacitor C51. The same-name terminal of the primary winding of the transformer T2 is connected to the other end of resistor R34, and the opposite-name terminal of the primary winding of the transformer T2 is connected to the other end of resistor R35. The same-name terminal of the secondary winding of the transformer T2 is connected to the first pin of the chip U1. The secondary winding of the transformer T2... One end of the capacitor C42 is connected to pin 13 of chip U1; one end of capacitor C42 is connected to pin 2 of chip U1; the other end of capacitor C42 is grounded; one end of crystal oscillator JT4 is connected to pin 7 of chip U1; the other end of crystal oscillator JT4, pin 6 of chip U1, and pin 8 of chip U1 are all connected; one end of resistor R41 is connected to one end of crystal oscillator JT4; the other end of resistor R41 is connected to pin 10 of chip U1; one end of capacitor C51 is connected to pin 11 of chip U1; the other end of capacitor C51 is connected to pin 12 of chip U1.

[0011] One end of capacitor C37, one end of resistor R36, one end of capacitor C49, and pin 15 of chip U1 are connected; the other end of capacitor C49, one end of crystal oscillator JT3, and pin 16 of chip U1 are connected; one end of crystal oscillator JT6 is connected to pin 18 of chip U1; the other end of crystal oscillator JT6, pin 17, and pin 19 of chip U1 are connected; one end of capacitor C40 is connected to pin 21 of chip U1; the other end of capacitor C40, one end of capacitor C39, and pin 20 of chip U1 are connected; one end of capacitor C41 and pin 22 of chip U1 are connected... One end of the sliding rheostat R62 is connected; one end of the resistor R61 is connected to the twenty-third pin of the chip U1; one end of the crystal oscillator JT5 and one end of the resistor R44 are both connected to the twenty-fourth pin of the chip U1; the other ends of the capacitor C37, the resistor R36, the crystal oscillator JT3, the eighteenth pin of the chip U1, the capacitor C39, the capacitor C41, the sliding rheostat R62, the control terminal of the sliding rheostat R62, the resistor R61, the crystal oscillator JT5, and the resistor R44 are all connected to the neutral point of the main winding of the transformer T2.

[0012] Furthermore, the chip U1 is model number MC3362.

[0013] Furthermore, the frequency mixer and discriminator circuit includes a transformer T1, a resistor R38, a capacitor C43, a transistor VT8, a capacitor C46, ​​a resistor R63, a capacitor C64, a crystal oscillator JT2, a resistor R39, a capacitor C68, a variable capacitor C48, a capacitor C44, a capacitor C61, and a capacitor C62. The same-name terminal of the primary winding of the transformer T1 is connected to the fourth pin of the chip U1, and the opposite-name terminal of the primary winding of the transformer T1 is connected to the third pin of the chip U1. The same-name terminal of the secondary winding of the transformer T1, one end of the resistor R38, one end of the capacitor C43, one end of the resistor R39, and one end of the capacitor C44 are connected. The other end of the capacitor C44 is grounded, and the other end of the capacitor C43 is connected to the opposite-name terminal of the secondary winding of the transformer T1. The collector of the transistor VT8 is connected to... The neutral point of the secondary coil of transformer T1 is connected. The emitter of transistor VT8, one end of capacitor C46, ​​one end of resistor R63, and one end of capacitor C64 are connected. The other end of capacitor C64, the base of transistor VT8, one end of crystal oscillator JT2, and the other end of resistor R39 are connected. The other end of crystal oscillator JT2, one end of capacitor C68, and one end of variable capacitor C48 are connected. The other end of capacitor C46, ​​the other end of resistor R63, the other end of capacitor C68, and the other end of variable capacitor C48 are connected and grounded. The other end of resistor R38, the seventh pin of chip U1, the positive terminal of capacitor C61, and one end of capacitor C62 are all connected to the neutral point of the primary coil of transformer T2. The negative terminal of capacitor C61 and the other end of capacitor C62 are connected and grounded.

[0014] Furthermore, the power amplifier circuit includes a chip U2 and capacitors C55 to C58 numbered sequentially. The sixth pin of chip U2 is connected to the twenty-third pin of chip U1, and the eighth pin of chip U2 is grounded. The third pin of chip U2, one end of capacitor C62, the positive terminal of capacitor C57, and one end of capacitor C58 are connected to a +6V power supply. The negative terminal of capacitor C57 and the other end of capacitor C58 are connected to ground. The positive terminal of capacitor C55 is connected to the fourth pin of chip U2, and the negative terminal of capacitor C55 is grounded. The two ends of capacitor C56 are connected to two filters. The output terminals of the two filters are each connected to a speaker, and the two speakers each output a voice signal.

[0015] Furthermore, the model number of chip U1 is MC3362, and the model number of chip U2 is LM386.

[0016] The advantages of this utility model are:

[0017] (1) The low-frequency amplifier circuit of this utility model receives dual voice input signals and the power amplifier circuit outputs dual voice signals. The input terminals of the two voice signals are the same. The two voice signals are input at the same time. After being processed by the transmitting part and the receiving part, the two voice signals are output as stable signals, and the communication is highly real-time.

[0018] (2) The low-frequency amplifier circuit of this utility model amplifies the weak voice signal captured by the microphone and inputs it to the next stage, ensuring that the amplified signal is not distorted during the amplification process.

[0019] (3) This utility model modulates two different frequencies through a frequency synthesis oscillation circuit and loads them onto the dual-channel voice input signal, thereby increasing the frequency of the voice signal, facilitating signal transmission, and achieving high spectrum utilization and communication efficiency.

[0020] (4) In the resonant hybrid circuit of this utility model, transistor VT1 and capacitor C4 select the third frequency, transistor VT2 and capacitor C5 form a class C amplifier to amplify the signal, and transistor VT3 and inductor L3 form a buffer amplifier circuit to buffer and amplify the signal.

[0021] (5) The impedance matching transmitting circuit of this utility model filters out small signal interference through step-by-step filtering. The Π-type impedance matching network minimizes the input impedance so that the antenna can obtain the maximum output power and greatly reduce the antenna radiation loss.

[0022] (6) The signal receiving circuit of this utility model receives a small high-frequency signal. The transformer T3 and capacitor C32 form a frequency selection circuit to select the required frequency for reception, exclude signals of other frequency bands received by the antenna, so that the circuit resonant frequency is consistent with the received signal frequency, and reduce interference from other signals. Transistors VT6 and VT7 form a two-stage amplifier circuit to amplify the received signal and input it to the next stage.

[0023] (7) The frequency modulation circuit of this utility model uses chip U1 to generate a local oscillation that is consistent with the internal frequency of the transmitting part, which facilitates high-frequency small signal demodulation.

[0024] (8) The frequency mixing and frequency discrimination circuit of this utility model separates the intermediate signals through frequency mixing and frequency discrimination, which makes it easier for the subsequent stage to perform power amplification of the signal and then restore the voice signal, prevents signal overlap, and avoids inaccurate output results.

[0025] (9) The power amplifier circuit of this utility model amplifies the already separated signals output by the frequency mixing and frequency discrimination circuit through power amplification, increases the output current, and filters out the two different frequency signals loaded on the dual-channel voice input signals by connecting two filters at the output end, restores the original dual-channel voice signals, and outputs the voice signals through the speakers respectively. Attached Figure Description

[0026] Figure 1 This is a structural block diagram of the transmitting section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of the present utility model.

[0027] Figure 2 This is a structural block diagram of the receiving section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of the present utility model.

[0028] Figure 3 This is a schematic diagram of the low-frequency amplifier circuit in the transmitting section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of the present utility model.

[0029] Figure 4 This is a schematic diagram of the frequency synthesis oscillation circuit in the transmitting section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of this utility model.

[0030] Figure 5 A schematic diagram of the resonant hybrid circuit in the transmitting section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in this embodiment of the present invention;

[0031] Figure 6 This is a schematic diagram of the impedance matching transmitting circuit in the transmitting section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of this utility model.

[0032] Figure 7 This is a schematic diagram of the signal receiving circuit in the receiving section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of this utility model.

[0033] Figure 8 is a schematic diagram of the frequency modulation circuit in the receiving section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of this utility model.

[0034] Figure 9 This is a schematic diagram of the mixing and frequency discrimination circuit in the receiving section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of the present utility model.

[0035] Figure 10 This is a schematic diagram of the power amplifier circuit in the receiving section of a dual-channel voice simultaneous interpretation wireless transceiver system disclosed in an embodiment of this utility model. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below in conjunction with the embodiments of this utility model. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this utility model.

[0037] like Figure 1 and Figure 2 As shown, a dual-channel voice simultaneous interpretation wireless transceiver system includes a transmitting section and a receiving section. The transmitting section includes a low-frequency amplifier circuit 1, a frequency synthesis oscillation circuit 2, a resonant mixing circuit 3, and an impedance matching transmitting circuit 4 connected in sequence. The receiving section includes a signal receiving circuit 5, a frequency modulation circuit 6, a frequency mixing and discrimination circuit 7, and a power amplifier circuit 8 connected in sequence. The impedance matching transmitting circuit 4 is communicatively connected to the signal receiving circuit 5. The low-frequency amplifier circuit 1 receives dual-channel voice input signals, and the power amplifier circuit 8 outputs dual-channel voice signals.

[0038] like Figure 3As shown, the low-frequency amplifier circuit 1 includes capacitors C1, C2, and C3; resistors R1 to R4 numbered sequentially; microphone MK1; resistors R9, R10, and R12; capacitors C13, C14, and C6; transistor VT4; and transistor VT5. Microphone MK1 receives two amplitude-modulated dual-channel voice input signals. The front end of microphone MK1 can be connected to a 30kHz amplitude modulation circuit and a 40kHz amplitude modulation circuit. The amplitude-modulated dual-channel voice signals are then transmitted to the low-frequency amplifier circuit 1 through microphone MK1. One end of microphone MK1 is connected to one end of capacitor C13 and one end of resistor R1. The other end of capacitor C13 is connected to one end of resistor R9 and the base of transistor VT4. The other end of resistor R9 and one end of resistor R2... The collector of transistor VT4 is connected to one end of capacitor C14. The other end of capacitor C14 is connected to one end of resistor R10 and the base of transistor VT5. The other end of resistor R10, one end of resistor R3, the positive terminal of capacitor C6, and the collector of transistor VT5 are connected. The negative terminal of capacitor C6 is connected to frequency synthesis oscillation circuit 2. One end of resistor R12, the emitter of transistor VT5, the emitter of transistor VT4, and the other end of microphone MK1 are connected and grounded. The other end of resistor R12 is connected to one end of resistor R4. Resistors R1 to the other end of resistor R4, the positive terminals of capacitors C1 and C2, and one end of capacitor C3 are all connected. One end of capacitor C3 is connected to resonant mixing circuit 3. The negative terminals of capacitors C1 and C2, and the other end of capacitor C3 are grounded. Transistors VT4 and VT5 amplify the input voice signal in two stages. Resistors and capacitors form a filtering circuit to ensure the stability of signal transmission and filter out signal interference.

[0039] like Figure 4 As shown, the frequency synthesis oscillation circuit 2 includes a resistor R11, a crystal oscillator JT1, and a diode VD1. One end of the resistor R11 is connected to the negative terminal of the capacitor C6, and the other end of the resistor R11 is connected to one end of the crystal oscillator JT1 and the cathode of the diode VD1. The other end of the crystal oscillator JT1 and the anode of the diode VD1 are both connected to the resonant hybrid circuit 3. The frequency of the crystal oscillator JT1 is one-third of 48.5MHz. The frequency synthesis oscillation circuit 2 modulates two different frequencies and applies them to the dual-channel voice input signals to increase the frequency of the voice signals and facilitate signal transmission.

[0040] like Figure 5As shown, the resonant hybrid circuit 3 includes resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, capacitor C7, inductor L3, transistors VT1 to VT3 numbered sequentially, capacitor C12, capacitor C15, resistors R14 to R17 numbered sequentially, capacitor C20, capacitor C21, and capacitor C22. One end of resistor R6, one end of resistor R14, one end of capacitor C15, and the base of transistor VT1 are connected and connected to the other end of crystal oscillator JT1. The collector of transistor VT1, one end of capacitor C4, one end of inductor L1, and one end of capacitor C12 are connected. The emitter of transistor VT1, the other end of capacitor C15, one end of resistor R15, and one end of capacitor C20 are connected. The other end of capacitor C12, one end of resistor R7, one end of resistor R16, and capacitor C22 are connected. One end of 21 is connected to the base of transistor VT2; the collector of transistor VT2, one end of capacitor C5, one end of inductor L2, and one end of capacitor C7 are connected; the other end of capacitor C7, one end of resistor R17, one end of capacitor C22, and the base of transistor VT3 are connected; the collector of transistor VT3 is connected to one end of inductor L3; the other ends of resistor R14, resistor R17, capacitor C20, capacitor C21, capacitor C22, and the emitter of transistor VT3 are all connected together; the other ends of resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, and inductor L3 are all connected together; the other end of inductor L3 and the emitter of transistor VT3 are connected to impedance matching emitter circuit 4. Transistor VT1 and capacitor C4 form a frequency multiplier circuit to select the third frequency of the resonant hybrid circuit 3. Transistor VT2 and capacitor C5 form a class C amplifier for power amplification. Transistor VT3 and inductor L3 form a buffer amplifier circuit to further buffer and amplify the signal. In this way, the signal after step-by-step amplification can meet the radiation frequency of the antenna, so that the antenna E2 of the receiving part can receive the signal transmitted by the transmitting part. Without signal amplification, the signal is too weak. In addition, there is a certain distance between the transmitting part and the receiving part during transmission, which can easily make it difficult for the receiving part to receive the voice signal.

[0041] like Figure 6As shown, the impedance matching transmitting circuit 4 includes capacitors C8 to C11 (numbered sequentially), inductors L4, L5, and L6, resistor R8, capacitors C16 to C19 (numbered sequentially), indicator LED1, and antenna E1. One end of capacitor C8 is connected to one end of inductor L3, and the other end of capacitor C8, one end of inductor L4, and one end of capacitor C16 are connected. The other end of inductor L4 is connected to one end of capacitor C9, and the other end of capacitor C9, one end of inductor L5, and one end of capacitor C17 are connected. Inductor L5... The other end of the inductor is connected to one end of the inductor L6 and one end of the capacitor C18. The other end of the inductor L6 is connected to the antenna E1 and one end of the capacitor C19. One end of the resistor R8, the positive terminal of the capacitor C10, and one end of the capacitor C11 are all connected to the other end of the inductor L3 and connected to the +6V power supply. The other end of the resistor R8 is connected to the anode of the indicator LED1. The emitter of the transistor VT3, the other ends of capacitors C16 to C19, the cathode of the indicator LED1, the negative terminal of capacitor C10, and the other end of capacitor C11 are all connected to and grounded. The impedance matching transmitter circuit 4 filters out small signal interference through step-by-step filtering. The Π-type impedance matching network minimizes the input impedance, so that the antenna can obtain the maximum output power and greatly reduce the antenna radiation loss.

[0042] like Figure 7As shown, the signal receiving circuit 5 includes an antenna E2, capacitors C31 to C36 numbered sequentially, a transformer T3, resistors R31 to R35 numbered sequentially, a transistor VT6, and a transistor VT7. Antenna E2 is connected to one end of capacitor C31. The other end of capacitor C31, one end of capacitor C32, and the same-name terminal of the main winding of transformer T3 are connected. The other end of capacitor C32 is connected to the opposite-name terminal of the main winding of transformer T3. One end of capacitor C33 is connected to the same-name terminal of the secondary winding of transformer T3. The other end of capacitor C33, one end of resistor R31, and the base of transistor VT6 are connected. The other end of resistor R31, the... The collector of transistor VT6, the emitter of transistor VT7, one end of capacitor C35, one end of resistor R33, and one end of resistor R35 are connected together. The emitter of transistor VT6, one end of capacitor C34, and one end of resistor R32 are connected together. The collector of transistor VT7 is connected to one end of resistor R34. The other end of resistor R34 and the other end of resistor R35 are connected to capacitor C36. The other ends of resistor R34 and resistor R35 are both connected to frequency modulation circuit 6. The opposite-name terminal of the secondary coil of transformer T3, the other end of capacitor C34, the other end of resistor R32, the other end of capacitor C35, and the other end of resistor R33 are all connected and grounded. The signal receiving circuit 5 receives a small high-frequency signal. The transformer T3 and capacitor C32 form a frequency selection circuit to select the required frequency for reception, eliminating signals from other frequency bands received by the antenna, so that the circuit resonant frequency is consistent with the received signal frequency, reducing interference from other signals. Transistors VT6 and VT7 form a two-stage amplifier circuit to amplify the received signal and input it to the next stage.

[0043] As shown in Figure 8, the frequency modulation circuit 6 includes a transformer T2, a chip U1, a capacitor C37, a resistor R36, a capacitor C49, crystal oscillators JT3 to JT6 numbered sequentially, capacitors C39 to C42 numbered sequentially, resistors R61, R41, R44, and capacitor C51. The chip U1 is model MC3362. The same-name terminal of the primary winding of transformer T2 is connected to the other end of resistor R34, and the opposite-name terminal of the primary winding of transformer T2 is connected to the other end of resistor R35. The same-name terminal of the secondary winding of transformer T2 is connected to the first pin of chip U1, and the opposite-name terminal of the secondary winding of transformer T2 is connected to the thirteenth pin of chip U1. One end of capacitor C42 is connected to the second pin of chip U1, and the other end of capacitor C42 is grounded. One end of crystal oscillator JT4 is connected to the seventh pin of chip U1, and the other end of crystal oscillator JT4, the sixth pin of chip U1, and the eighth pin of chip U1 are all connected. One end of resistor R41 is connected to one end of crystal oscillator JT4, and the other end of resistor R41 is connected to the tenth pin of chip U1. One end of capacitor C51 is connected to the eleventh pin of chip U1, and the other end of capacitor C51 is connected to the twelfth pin of chip U1.

[0044] One end of capacitor C37, one end of resistor R36, one end of capacitor C49, and pin 15 of chip U1 are connected; the other end of capacitor C49, one end of crystal oscillator JT3, and pin 16 of chip U1 are connected; one end of crystal oscillator JT6 is connected to pin 18 of chip U1; the other end of crystal oscillator JT6, pin 17, and pin 19 of chip U1 are connected; one end of capacitor C40 is connected to pin 21 of chip U1; the other end of capacitor C40, one end of capacitor C39, and pin 20 of chip U1 are connected; one end of capacitor C41 and pin 22 of chip U1 are connected... One end of the sliding rheostat R62 is connected; one end of the resistor R61 is connected to the twenty-third pin of the chip U1; one end of the crystal oscillator JT5 and one end of the resistor R44 are both connected to the twenty-fourth pin of the chip U1; the other ends of the capacitor C37, the resistor R36, the crystal oscillator JT3, the eighteenth pin of the chip U1, the capacitor C39, the capacitor C41, the sliding rheostat R62, the control terminal of the sliding rheostat R62, the resistor R61, the crystal oscillator JT5, and the resistor R44 are all connected to the neutral point of the main winding of the transformer T2. The frequency modulation circuit 6 uses chip U1 to generate a local oscillation consistent with the internal frequency of the transmitting section, facilitating the demodulation of high-frequency small signals. The input high-frequency signal, after passing through the signal receiving circuit 5, enters the first mixer built into the MC3362 for amplification and conversion into a first intermediate frequency (IF) signal of 10.7 MHz. After being filtered by an external bandpass ceramic filter, the first IF signal is further amplified and mixed in the second mixer built into the MC3362, converting it into a second IF signal of 455 kHz. The second IF signal is then filtered again by an external bandpass ceramic filter and input to the internal limiting amplifier and frequency detection circuit, before being output to the next stage mixer-discriminator circuit 7. The mixer-discriminator circuit 7 recovers the message signal and separates the signal, which is then output by the speaker.

[0045] like Figure 9As shown, the frequency mixer and frequency discriminator circuit 7 includes a transformer T1, a resistor R38, a capacitor C43, a transistor VT8, a capacitor C46, ​​a resistor R63, a capacitor C64, a crystal oscillator JT2, a resistor R39, a capacitor C68, a variable capacitor C48, a capacitor C44, a capacitor C61, and a capacitor C62. The same-name terminal of the primary winding of the transformer T1 is connected to the fourth pin of the chip U1, and the opposite-name terminal of the primary winding of the transformer T1 is connected to the third pin of the chip U1. The same-name terminal of the secondary winding of the transformer T1, one end of the resistor R38, one end of the capacitor C43, one end of the resistor R39, and one end of the capacitor C44 are connected together. The other end of the capacitor C44 is grounded, and the other end of the capacitor C43 is connected to the opposite-name terminal of the secondary winding of the transformer T1. The collector of the transistor VT8 is connected to the variable frequency discriminator JT2. The neutral point of the secondary coil of transformer T1 is connected. The emitter of transistor VT8, one end of capacitor C46, ​​one end of resistor R63, and one end of capacitor C64 are connected. The other end of capacitor C64, the base of transistor VT8, one end of crystal oscillator JT2, and the other end of resistor R39 are connected. The other end of crystal oscillator JT2, one end of capacitor C68, and one end of variable capacitor C48 are connected. The other end of capacitor C46, ​​the other end of resistor R63, the other end of capacitor C68, and the other end of variable capacitor C48 are connected and grounded. The other end of resistor R38, pin 7 of chip U1, the positive terminal of capacitor C61, and one end of capacitor C62 are all connected to the neutral point of the primary coil of transformer T2. The negative terminal of capacitor C61 and the other end of capacitor C62 are connected and grounded. The mixer and frequency discriminator circuit 7 separates the intermediate signals through mixing and discrimination, facilitating the subsequent power amplification of the signals for voice signal restoration, preventing signal overlap, and avoiding inaccurate output results.

[0046] like Figure 10 As shown, the power amplifier circuit 8 includes chip U2 and capacitors C55 to C58 numbered sequentially. Chip U2 is an LM386. Pin 6 of chip U2 is connected to pin 23 of chip U1, and pin 8 of chip U2 is grounded. Pin 3 of chip U2, one end of capacitor C62, the positive terminal of capacitor C57, and one end of capacitor C58 are connected to a +6V power supply. The negative terminal of capacitor C57 and the other end of capacitor C58 are connected to ground. The positive terminal of capacitor C55 is connected to pin 4 of chip U2, and the negative terminal of capacitor C55 is grounded. Two filters are connected to the two ends of capacitor C56. The outputs of the two filters are each connected to a speaker, and each speaker outputs a separate audio signal. The power amplifier circuit 8 amplifies the separated signals output from the mixer-discriminator circuit 7, increasing the output current. By connecting two filters at the output, it filters out the two different frequency signals applied to the dual-channel audio input signals, restoring the original dual-channel audio signals, which are then output through the speakers.

[0047] Through the above technical solution, the low-frequency amplifier circuit 1 of this utility model receives dual-channel voice input signals, and the power amplifier circuit 8 outputs dual-channel voice signals. The input terminals of the two voice signals are the same, and the two voice signals are input simultaneously. After being processed by the transmitting and receiving parts, the two stable voice signals are output, resulting in high communication immediacy.

[0048] The above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.

Claims

1. A dual-channel simultaneous voice interpretation wireless transceiver system, characterized in that, The device includes a transmitting section and a receiving section. The transmitting section includes a low-frequency amplifier circuit, a frequency synthesis oscillation circuit, a resonant mixing circuit, and an impedance matching transmitting circuit connected in sequence. The receiving section includes a signal receiving circuit, a frequency modulation circuit, a frequency mixing and discrimination circuit, and a power amplifier circuit connected in sequence. The impedance matching transmitting circuit is communicatively connected to the signal receiving circuit. The low-frequency amplifier circuit receives dual-channel voice input signals, and the power amplifier circuit outputs dual-channel voice signals.

2. The dual-channel voice simultaneous interpretation wireless transceiver system according to claim 1, characterized in that, The low-frequency amplifier circuit includes capacitors C1, C2, and C3; resistors R1 to R4 numbered sequentially; microphone MK1; resistors R9, R10, and R12; capacitors C13, C14, and C6; transistor VT4; and transistor VT5. Microphone MK1 receives two amplitude-modulated dual-channel voice input signals. One end of microphone MK1 is connected to one end of capacitor C13 and one end of resistor R1. The other end of capacitor C13 is connected to one end of resistor R9 and the base of transistor VT4. The other end of resistor R9, one end of resistor R2, the collector of transistor VT4, and one end of capacitor C14 are connected. The other end of capacitor C14 is connected to one end of resistor R10. The base of transistor VT5 is connected, the other end of resistor R10, one end of resistor R3, the positive terminal of capacitor C6, and the collector of transistor VT5 are connected, the negative terminal of capacitor C6 is connected to the frequency synthesis oscillation circuit, one end of resistor R12, the emitter of transistor VT5, the emitter of transistor VT4, and the other end of microphone MK1 are connected and grounded, the other end of resistor R12 is connected to one end of resistor R4, the other ends of resistors R1 to R4, the positive terminals of capacitors C1 and C2, and one end of capacitor C3 are all connected, one end of capacitor C3 is connected to the resonant mixing circuit, the negative terminals of capacitors C1 and C2, and the other end of capacitor C3 are grounded, and the frequency synthesis oscillation circuit is connected to the negative terminal of capacitor C6.

3. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 2, characterized in that, The resonant hybrid circuit includes resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, capacitor C7, inductor L3, transistors VT1 to VT3 (numbered sequentially), capacitor C12, capacitor C15, resistors 14 to R17, capacitor C20, capacitor C21, and capacitor C22. One end of resistor R6, one end of resistor R14, one end of capacitor C15, and the base of transistor VT1 are connected and connected to the frequency synthesis oscillation circuit. The collector of transistor VT1, one end of capacitor C4, one end of inductor L1, and one end of capacitor C12 are connected. The emitter of transistor VT1, the other end of capacitor C15, one end of resistor R15, and one end of capacitor C20 are connected. The other end of capacitor C12, one end of resistor R7, one end of resistor R16, and capacitor C21 are connected. One end of the transistor is connected to the base of transistor VT2; the collector of transistor VT2, one end of capacitor C5, one end of inductor L2, and one end of capacitor C7 are connected; the other end of capacitor C7, one end of resistor R17, one end of capacitor C22, and the base of transistor VT3 are connected; the collector of transistor VT3 is connected to one end of inductor L3; the other ends of resistor R14 to resistor R17, capacitor C20, capacitor C21, capacitor C22, and the emitter of transistor VT3 are all connected together; the other ends of resistor R6, capacitor C4, inductor L1, resistor R7, capacitor C5, inductor L2, and inductor L3 are all connected together; the other end of inductor L3 and the emitter of transistor VT3 are connected to the impedance matching emitter circuit.

4. The dual-channel voice simultaneous interpretation wireless transceiver system according to claim 3, characterized in that, The impedance matching transmitting circuit includes capacitors C8 to C11 (numbered sequentially), inductors L4, L5, and L6, resistor R8, capacitors C16 to C19 (numbered sequentially), indicator LED1, and antenna E1. One end of capacitor C8 is connected to one end of inductor L3. The other end of capacitor C8, one end of inductor L4, and one end of capacitor C16 are connected together. The other end of inductor L4 is connected to one end of capacitor C9. The other end of capacitor C9, one end of inductor L5, and one end of capacitor C17 are connected together. The other end of inductor L5... One end of the inductor L6 and one end of the capacitor C18 are connected; the other end of the inductor L6, the antenna E1, and one end of the capacitor C19 are connected; one end of the resistor R8, the positive terminal of the capacitor C10, and one end of the capacitor C11 are all connected to the other end of the inductor L3 and connected to the +6V power supply; the other end of the resistor R8 is connected to the anode of the indicator LED1; the emitter of the transistor VT3, the other ends of capacitors C16 to C19, the cathode of the indicator LED1, the negative terminal of capacitor C10, and the other end of capacitor C11 are all connected and grounded.

5. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 4, characterized in that, The signal receiving circuit includes an antenna E2, capacitors C31 to C36 numbered sequentially, a transformer T3, resistors R31 to R35 numbered sequentially, a transistor VT6, and a transistor VT7. Antenna E2 is connected to one end of capacitor C31. The other end of capacitor C31, one end of capacitor C32, and the same-name terminal of the main winding of transformer T3 are connected. The other end of capacitor C32 is connected to the opposite-name terminal of the main winding of transformer T3. One end of capacitor C33 is connected to the same-name terminal of the secondary winding of transformer T3. The other end of capacitor C33, one end of resistor R31, and the base of transistor VT6 are connected. The other end of resistor R31 and the transistor... The collector of transistor VT6, the emitter of transistor VT7, one end of capacitor C35, one end of resistor R33, and one end of resistor R35 are connected together. The emitter of transistor VT6, one end of capacitor C34, and one end of resistor R32 are connected together. The collector of transistor VT7 is connected to one end of resistor R34. The other end of resistor R34 and the other end of resistor R35 are connected to capacitor C36. The other ends of resistor R34 and resistor R35 are both connected to the frequency modulation circuit. The opposite-name terminal of the secondary coil of transformer T3, the other end of capacitor C34, the other end of resistor R32, the other end of capacitor C35, and the other end of resistor R33 are all connected and grounded.

6. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 5, characterized in that, The frequency modulation circuit includes a transformer T2, a chip U1, a capacitor C37, a resistor R36, a capacitor C49, sequentially numbered crystal oscillators JT3 to JT6, sequentially numbered capacitors C39 to C42, resistors R61, R41, R44, and capacitor C51. The same-name terminal of the primary winding of transformer T2 is connected to the other end of resistor R34, and the opposite-name terminal of the primary winding of transformer T2 is connected to the other end of resistor R35. The same-name terminal of the secondary winding of transformer T2 is connected to the first pin of chip U1, and the opposite-name terminal of the secondary winding of transformer T2 is connected to the first pin of chip U1. One end of capacitor C42 is connected to pin 13 of chip U1, and the other end of capacitor C42 is connected to ground. One end of crystal oscillator JT4 is connected to pin 7 of chip U1, and the other end of crystal oscillator JT4, pin 6 of chip U1, and pin 8 of chip U1 are all connected. One end of resistor R41 is connected to one end of crystal oscillator JT4, and the other end of resistor R41 is connected to pin 10 of chip U1. One end of capacitor C51 is connected to pin 11 of chip U1, and the other end of capacitor C51 is connected to pin 12 of chip U1. One end of capacitor C37, one end of resistor R36, one end of capacitor C49, and pin 15 of chip U1 are connected; the other end of capacitor C49, one end of crystal oscillator JT3, and pin 16 of chip U1 are connected; one end of crystal oscillator JT6 is connected to pin 18 of chip U1; the other end of crystal oscillator JT6, pin 17, and pin 19 of chip U1 are connected; one end of capacitor C40 is connected to pin 21 of chip U1; the other end of capacitor C40, one end of capacitor C39, and pin 20 of chip U1 are connected; one end of capacitor C41 and pin 22 of chip U1 are connected... One end of the sliding rheostat R62 is connected; one end of the resistor R61 is connected to the twenty-third pin of the chip U1; one end of the crystal oscillator JT5 and one end of the resistor R44 are both connected to the twenty-fourth pin of the chip U1; the other ends of the capacitor C37, the resistor R36, the crystal oscillator JT3, the eighteenth pin of the chip U1, the capacitor C39, the capacitor C41, the sliding rheostat R62, the control terminal of the sliding rheostat R62, the resistor R61, the crystal oscillator JT5, and the resistor R44 are all connected to the neutral point of the main winding of the transformer T2.

7. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 6, characterized in that, The chip U1 is model number MC3362.

8. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 6, characterized in that, The frequency mixing and discrimination circuit includes a transformer T1, a resistor R38, a capacitor C43, a transistor VT8, a capacitor C46, ​​a resistor R63, a capacitor C64, a crystal oscillator JT2, a resistor R39, a capacitor C68, a variable capacitor C48, a capacitor C44, a capacitor C61, and a capacitor C62. The same-name terminal of the primary winding of transformer T1 is connected to the fourth pin of chip U1, and the opposite-name terminal of the primary winding of transformer T1 is connected to the third pin of chip U1. The same-name terminal of the secondary winding of transformer T1, one end of resistor R38, one end of capacitor C43, one end of resistor R39, and one end of capacitor C44 are connected together. The other end of capacitor C44 is grounded, and the other end of capacitor C43 is connected to the opposite-name terminal of the secondary winding of transformer T1. The collector of transistor VT8 is connected to the transformer... The neutral point of the secondary coil of T1 is connected. The emitter of transistor VT8, one end of capacitor C46, ​​one end of resistor R63, and one end of capacitor C64 are connected. The other end of capacitor C64, the base of transistor VT8, one end of crystal oscillator JT2, and the other end of resistor R39 are connected. The other end of crystal oscillator JT2, one end of capacitor C68, and one end of variable capacitor C48 are connected. The other end of capacitor C46, ​​the other end of resistor R63, the other end of capacitor C68, and the other end of variable capacitor C48 are connected and grounded. The other end of resistor R38, the seventh pin of chip U1, the positive terminal of capacitor C61, and one end of capacitor C62 are all connected to the neutral point of the primary coil of transformer T2. The negative terminal of capacitor C61 and the other end of capacitor C62 are connected and grounded.

9. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 8, characterized in that, The power amplifier circuit includes chip U2 and capacitors C55 to C58 numbered sequentially. The sixth pin of chip U2 is connected to the twenty-third pin of chip U1, and the eighth pin of chip U2 is grounded. The third pin of chip U2, one end of capacitor C62, the positive terminal of capacitor C57, and one end of capacitor C58 are connected to a +6V power supply. The negative terminal of capacitor C57 and the other end of capacitor C58 are connected to ground. The positive terminal of capacitor C55 is connected to the fourth pin of chip U2, and the negative terminal of capacitor C55 is grounded. The two ends of capacitor C56 are connected to two filters. The output terminals of the two filters are each connected to a speaker, and the two speakers each output a voice signal.

10. A dual-channel voice simultaneous interpretation wireless transceiver system according to claim 9, characterized in that, The chip U1 is model number MC3362, and the chip U2 is model number LM386.

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