A transistor drive circuit
By using a combination of resistors and MOSFETs in the transistor driving circuit to control the on/off state of the transistor, the problem of non-ideal pulse waveforms in high-speed switching control of transistor driving circuits in the prior art is solved, achieving the effects of simplifying the circuit structure and improving the response speed.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SHENZHEN FM ELECTRONICS GRP CO LTD
- Filing Date
- 2025-04-16
- Publication Date
- 2026-06-09
AI Technical Summary
In high-speed switching control, existing transistor driving circuits cannot form an ideal pulse waveform for the gate voltage signal, causing the device to remain in the linear amplification region for a long time, increasing switching losses and potentially causing circuit failures. Furthermore, existing solutions tend to complicate circuit topologies and increase manufacturing costs.
A transistor driving circuit including a first resistor, a second resistor, and a first MOSFET is adopted. By controlling the on and off states of the MOSFET, the gate-source voltage is limited to prevent false turn-on and adapt to the high voltage driving requirements. The switching speed is adjusted by adjusting the resistor value.
This technology prevents transistors from being falsely turned on under high voltage driving, simplifies the circuit structure, reduces the risk of false turn-on, and improves the control response speed of transistors and the reliability of the circuit.
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Figure CN224343170U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of integrated circuit technology, specifically to a transistor driving circuit. Background Technology
[0002] Currently, with the widespread application of power devices in power supply control, motor drives, and other fields, the design of transistor driver circuits faces numerous technical challenges. In existing technologies, transistor-based driver circuits often fail to generate ideal pulse waveforms for the gate voltage signal when implementing high-speed switching control. For example, ... Figure 1 As shown, when the driving frequency is high, due to the unreasonable design of the charging and discharging circuit of the gate parasitic capacitance, the transistor has difficulty in quickly completing the turn-on or turn-off action, causing the device to remain in the linear amplification region for a long time, rather than an ideal switching state. This non-ideal driving state not only significantly increases switching losses, but may also cause the entire circuit system to malfunction. For this reason, existing technologies mostly use push-pull circuits, totem-pole drives, or combinations of discrete components (such as transistors). However, such solutions tend to lead to complex circuit topologies, and the matching requirements of discrete components are high, significantly increasing manufacturing costs and debugging difficulty. Utility Model Content
[0003] The purpose of this utility model embodiment is to provide a transistor driving circuit to solve the above-mentioned problems.
[0004] The present invention achieves the above objectives through the following technical solutions.
[0005] This utility model embodiment provides a transistor driving circuit, including a first resistor, a second resistor, and a first MOSFET; the first end of the first resistor and the first end of the first MOSFET are connected to a first voltage terminal; the second end of the first resistor, the second end of the first MOSFET, and the first end of the second resistor are connected to a second voltage terminal; the third end of the first MOSFET and the second end of the second resistor are connected to a transistor control terminal; the first voltage terminal is used to connect to the third terminal of an external transistor; the transistor control terminal is used to connect to the second terminal of the transistor; the on / off state of the transistor is controlled by the voltage magnitude of the second voltage terminal; when the first MOSFET is turned on, the transistor is turned off.
[0006] In some embodiments, the transistor is turned off when the current flows sequentially through the second voltage terminal, the second resistor, the first MOS transistor, and the first voltage terminal.
[0007] In some embodiments, the transistor turns on when the parasitic capacitance between the gate and source of the transistor is discharged through the second resistor.
[0008] In some embodiments, a first capacitor is further included, with a first terminal connected to a second terminal of a first resistor, a second terminal of a first MOSFET, and a first terminal of a second resistor, and the second terminal of the first capacitor connected to a second voltage terminal.
[0009] In some embodiments, the device further includes a first diode, the anode of which is connected to a second terminal of the second resistor, and the cathode of which is connected to a first terminal of the second resistor.
[0010] In some embodiments, the transistor turns on when the parasitic capacitance between the gate and source of the transistor is discharged through the first diode.
[0011] In some embodiments, the first MOS transistor is an NMOS transistor.
[0012] In some embodiments, the first MOS transistor is a depletion-mode NMOS transistor.
[0013] Compared to existing technologies, by adopting the transistor driving circuit including a first resistor, a second resistor, and a first MOSFET provided in this embodiment, even if the voltage at the first voltage terminal fluctuates extremely when the transistor is turned off, it ensures that there is still a large margin at the second terminal of the first MOSFET, effectively limiting the voltage at the second terminal of the first MOSFET and preventing the transistor from being falsely turned on. It is especially suitable for high voltage driving requirements, has a simple circuit structure, and the switching speed of the transistor can also be adjusted by adjusting the value of the second resistor. Attached Figure Description
[0014] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0015] Figure 1 This is a schematic diagram of the circuit structure of a transistor driving circuit in the prior art;
[0016] Figure 2 This is a schematic diagram of the circuit structure of another transistor driving circuit in the prior art;
[0017] Figure 3 This is a schematic diagram of a circuit structure of the transistor driving circuit provided in this embodiment;
[0018] Figure 4 This is another circuit structure diagram of the transistor driving circuit provided in this embodiment. Detailed Implementation
[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present utility model.
[0020] The term "coupled" or "connected" in this invention includes both direct and indirect connections, such as connections made through active devices, passive devices, or electrical conduction media; it may also include connections made by other active or passive devices that are known to those skilled in the art and can achieve the same or similar functional purpose, such as connections made through switches, follower circuits, or other circuits or components.
[0021] The inventor of this utility model discovered that, as Figure 1 The transistor drive circuit shown has defects as described in the background art. To optimize the transistor drive circuit, it was found that... Figure 2 The transistor driving circuit shown can meet the high-voltage driving requirements, but problems are still found. Specifically, when the voltage at terminal a is high, transistor N is turned off, and the voltage at terminal a is the sum of the parasitic diode voltage drop between the base and collector of the transistor and the voltage at terminal b. In this way, transistor M can usually remain in the conducting state. However, under extreme conditions, there is a risk that transistor M will be turned off erroneously, causing the transistor to turn on, which seriously affects the safety of the circuit system. Furthermore, if a diode is placed between terminal b and the gate of transistor N, a certain voltage difference will exist between terminal b and the gate of transistor N. When the voltage at terminal b is high, the high-voltage driving requirements cannot be met. In order to simultaneously meet the requirements of simplifying the driving circuit, meeting the high-voltage driving requirements, and greatly reducing the risk of transistor erroneous turn-on, the inventors of this utility model have proposed a transistor driving circuit provided in the embodiment of this utility model.
[0022] Please see Figure 3 This utility model provides a transistor driving circuit, including a first resistor R1, a second resistor R2, and a first MOSFET M1; the first end of the first resistor R1 and the first end of the first MOSFET M1 are connected to a first voltage terminal a; the second end of the first resistor R1, the second end of the first MOSFET M1, and the first end of the second resistor R2 are connected to a second voltage terminal b; the third end of the first MOSFET M1 and the second end of the second resistor R2 are connected to a transistor control terminal c; the first voltage terminal a is used to connect to the third end of an external transistor M2; the transistor control terminal c is used to connect to the second end of the transistor M2; the on / off state of the transistor M2 is controlled by the voltage magnitude of the second voltage terminal b; when the first MOSFET M1 is turned on, the transistor M2 is turned off.
[0023] In this embodiment, the first MOS transistor M1 can be an NMOS transistor. In this case, the first terminal of the first MOS transistor M1 can be the drain, the second terminal of the first MOS transistor M1 can be the gate, and the third terminal of the first MOS transistor M1 can be the source.
[0024] In this embodiment, the type of transistor M2 may include a MOS transistor, an IGBT (Insulated Gate Bipolar Transistor), a BJT (Bipolar Junction Transistor), etc., and there is no specific limitation on the type of transistor M2. Specifically, the transistor can be a P-type MOS transistor, in which case the first terminal of transistor M2 is the drain, the second terminal of transistor M2 is the gate, and the third terminal of transistor M2 can be the source.
[0025] It should be noted that the "external transistor" described in this embodiment is "external" relative to the transistor driving circuit, and is not used to limit the transistor M2 to be "external" to the carrier where the transistor driving circuit is located. Therefore, the "external" described in this embodiment is not a limitation on a specific location, but is used to describe and limit the protection range of the transistor driving circuit.
[0026] In this embodiment, the on / off state of transistor M2 is controlled by the voltage of the second voltage terminal b. When the voltage of the second voltage terminal b is high, transistor M2 is in the on state, and when the voltage of the second voltage terminal b is low, transistor M2 is in the off state.
[0027] Specifically, when the voltage at the second voltage terminal b is high, the voltage at the second terminal of the first MOSFET M1 is greater than the voltage at the first voltage terminal a. Simultaneously, the body diode D of the first MOSFET M1 is turned on, and the current flows from the third terminal to the first terminal of the first MOSFET M1. The voltage at the first voltage terminal a is close to the voltage at the control terminal c of the transistor. Furthermore, the current flows from the second voltage terminal b to the second resistor R2, then to the first MOSFET M1, and finally to the first voltage terminal a. The voltage at the second terminal of the first MOSFET M1 will always remain greater than the voltage at the third terminal. Even if the voltage at the first voltage terminal a experiences extreme fluctuations, the first MOSFET M1 will always remain in the on state, thus limiting the gate-drain voltage of the transistor M2 to always be in a positive state, and keeping the transistor M2 off.
[0028] When the voltage at the second voltage terminal b is low, the first current flows sequentially from the parasitic capacitance C between the gate and source of transistor M2 to the second resistor R2 and then to the second voltage terminal b. At this time, the voltage at the second terminal of the first MOS transistor M1 will always be lower than the voltage at the third terminal of the first MOS transistor M1. Even if the voltage at the first voltage terminal a fluctuates extremely, the first MOS transistor M1 will always be in the off state.
[0029] It should be noted that in this embodiment, a higher value of the second resistor R2 results in a better effect of keeping the gate-drain voltage of transistor M2 always in a positive state and keeping transistor M2 off. A lower value of the second resistor R2 can effectively increase the discharge speed of the parasitic capacitance C between the gate and source of transistor M2, accelerate the switching process of transistor M2 from the off state to the on state, and improve the control response speed of transistor M2. Therefore, those skilled in the art can adaptively adjust the value of the second resistor R2.
[0030] In this embodiment, by employing a transistor driving circuit including a first resistor R1, a second resistor R2, and a first MOSFET M1, even if the voltage at the first voltage terminal a fluctuates extremely when the transistor M2 is turned off, it ensures that the second terminal of the first MOSFET M1 still has a large margin, effectively limiting the voltage at the second terminal of the first MOSFET M1 and preventing the transistor M2 from being mis-turned on. This is particularly suitable for high-voltage driving requirements, and the circuit structure is simple. Furthermore, the switching speed of the transistor M2 can be adjusted by adjusting the value of the second resistor R2.
[0031] In some embodiments, when the current flows sequentially through the second voltage terminal b, the second resistor R2, the first MOS transistor M1, and the first voltage terminal a, the transistor M2 is turned off, as described above.
[0032] In some embodiments, transistor M2 is turned on when the parasitic capacitance C between the gate and source of transistor M2 is discharged through the second resistor R2, as described above.
[0033] In some embodiments, such as Figure 4 As shown, the transistor driving circuit may further include a first capacitor C1, the first end of the first capacitor C1 is connected to the second end of the first resistor R1, the second end of the first MOS transistor M1, and the first end of the second resistor R2, and the second end of the first capacitor C1 is connected to the second voltage terminal b.
[0034] In this embodiment, a certain voltage difference ΔV can be maintained across the first capacitor C1, and the voltage at the first terminal of the first capacitor C1 is greater than the voltage at the second terminal of the first capacitor C1. When the transistor driving circuit provided in this embodiment is first powered on, the first voltage terminal a can charge the first capacitor C1 through the first resistor R1, so that the voltage difference across the first capacitor C1 meets the requirements.
[0035] In this embodiment, the on / off state of transistor M2 is controlled by the voltage of the second voltage terminal b. When the voltage of the second voltage terminal b is high, transistor M2 is in the on state, and when the voltage of the second voltage terminal b is low, transistor M2 is in the off state.
[0036] Specifically, when the voltage at the second voltage terminal b is high, the body diode D of the first MOSFET M1 is turned on. Simultaneously, the current flowing through the first MOSFET M1 is from its third terminal to its first terminal. The voltage at the first voltage terminal a is close to the voltage at the transistor control terminal c. Furthermore, the current flow at this time is: first terminal of the first capacitor C1 → second resistor R2 → first MOSFET M1 → first voltage terminal a. The voltage at the second terminal of the first MOSFET M1 will always remain greater than the voltage at its third terminal, and the second terminal of the first MOSFET M1 can reach the first voltage. The sum of the voltage at terminal a (Va), the voltage drop across the body diode D of the first MOSFET M1 (VD), and the voltage across the second resistor R2 (VR2) (i.e., Va + VD + VR2) ensures that even if the voltage at the first voltage terminal a experiences extreme fluctuations, the first MOSFET M1 will always be in the conducting state, thereby limiting the gate-drain voltage of transistor M2 to always be in the positive voltage state, keeping transistor M2 off. Furthermore, by adjusting the value of the second resistor R2, the voltage difference between the second terminal of the first MOSFET M1 and the first voltage terminal a can be further adjusted to cope with different situations of extreme voltage fluctuations at the first voltage terminal a.
[0037] When the voltage at the second voltage terminal b is low, the first current flows sequentially through the parasitic capacitance C between the gate and source of transistor M2 → the second resistor R2 → the first terminal of the first capacitor C1. At this time, the voltage at the second terminal of the first MOS transistor M1 will always be less than the voltage at the third terminal of the first MOS transistor M1. The voltage at the second terminal of the first MOS transistor M1 is the sum of the voltage at the first voltage terminal a (Va), the voltage drop across the body diode D of the first MOS transistor M1 (VD), and the voltage across the second resistor R2 (VR2), minus the voltage difference ΔV across the first capacitor C1 (i.e., Va + VD + VR2 - ΔV). Even if the voltage at the first voltage terminal a fluctuates extremely, the first MOS transistor M1 will always be in the off state to allow transistor M2 to conduct.
[0038] It should be noted that in this embodiment, a higher value of the second resistor R2 results in a better effect of keeping the gate-drain voltage of transistor M2 always in a positive state and keeping transistor M2 off. A lower value of the second resistor R2 can effectively increase the discharge speed of the parasitic capacitance C between the gate and source of transistor M2, accelerate the switching process of transistor M2 from the off state to the on state, and improve the control response speed of transistor M2. Therefore, those skilled in the art can adaptively adjust the value of the second resistor R2.
[0039] In some embodiments, the transistor driving circuit may further include a first diode D1, the anode of the first diode D1 being connected to the second end of the second resistor R2, and the cathode of the first diode D1 being connected to the first end of the second resistor R2.
[0040] In this embodiment, when the voltage at the second voltage terminal b is low, the first current flows sequentially through the parasitic capacitance C between the gate and source of transistor M2 → the first diode D1 → the first terminal of the first capacitor C1. At this time, the voltage at the second terminal of the first MOS transistor M1 will always be less than the voltage at the third terminal of the first MOS transistor M1. The voltage at the second terminal of the first MOS transistor M1 is the sum of the voltage at the first voltage terminal a (Va), the voltage drop (VD) of the body diode D of the first MOS transistor M1, and the voltage across the second resistor R2 (VR2) minus the voltage difference ΔV across the first capacitor C1 (i.e., Va + VD + VR2 - ΔV). Even if the voltage at the first voltage terminal a fluctuates extremely, the first MOS transistor M1 will always be in the off state to turn on transistor M2.
[0041] In this embodiment, when the control transistor M2 is turned off, the voltage at the second terminal of the first MOS transistor M1 relative to the first voltage terminal a is adjusted using the second resistor R2 to prevent the first MOS transistor M1 from being mistakenly turned off and causing the transistor M2 to be mistakenly turned on. When the control transistor M2 is turned on, the parasitic capacitance C between the gate and source of the transistor M2 is discharged through the first diode D1, thereby improving the switching speed of the transistor M2 and reducing the switching response time of the transistor M2.
[0042] In some embodiments, the first MOS transistor M1 is an NMOS transistor.
[0043] In some embodiments, the first MOS transistor M1 in the transistor driving circuit can be a depletion-type NMOS transistor. Therefore, based on the characteristic that the turn-on threshold of a depletion-type NMOS transistor can be negative, the first MOS transistor M1 can be turned on with a negative voltage, making it easier to control the first MOS transistor M1 to turn on.
[0044] The above-described embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model, and should all be included within the protection scope of this utility model.
Claims
1. A transistor driving circuit, characterized in that, It includes a first resistor, a second resistor, and a first MOSFET; the first end of the first resistor and the first end of the first MOSFET are connected to a first voltage terminal; the second end of the first resistor, the second end of the first MOSFET, and the first end of the second resistor are connected to a second voltage terminal; the third end of the first MOSFET and the second end of the second resistor are connected to a transistor control terminal; the first voltage terminal is used to connect to the third terminal of an external transistor; the transistor control terminal is used to connect to the second terminal of the transistor; the on / off state of the transistor is controlled by the voltage magnitude of the second voltage terminal; when the first MOSFET is on, the transistor is off.
2. The transistor driving circuit according to claim 1, characterized in that, The transistor is turned off when the current flows sequentially through the second voltage terminal, the second resistor, the first MOS transistor, and the first voltage terminal.
3. The transistor driving circuit according to claim 1, characterized in that, The transistor turns on when the parasitic capacitance between the gate and source of the transistor is discharged through the second resistor.
4. The transistor driving circuit according to claim 1, characterized in that, It also includes a first capacitor, the first end of which is connected to the second end of the first resistor, the second end of the first MOSFET, and the first end of the second resistor, and the second end of the first capacitor is connected to the second voltage terminal.
5. The transistor driving circuit according to claim 1, characterized in that, It also includes a first diode, the anode of which is connected to the second end of the second resistor, and the cathode of which is connected to the first end of the second resistor.
6. The transistor driving circuit according to claim 5, characterized in that, The transistor turns on when the parasitic capacitance between the gate and source of the transistor is discharged through the first diode.
7. The transistor driving circuit according to claim 1, characterized in that, The first MOS transistor is an NMOS transistor.
8. The transistor driving circuit according to claim 1, characterized in that, The first MOS transistor is a depletion-type NMOS transistor.