Radio frequency transceiver architecture and navigation device
By integrating the limiter, low-noise amplifier, and surface acoustic wave filter into the RF front-end SiP chip and integrating the down-conversion and up-conversion modules into the transceiver chip, the high cost and high power consumption of navigation anti-interference equipment are solved, and the miniaturization and low power consumption of the equipment are realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GUANGZHOU RUNXIN INFORMATION TECH CO LTD
- Filing Date
- 2025-06-17
- Publication Date
- 2026-06-23
AI Technical Summary
Existing navigation anti-jamming equipment transceiver architectures suffer from numerous component types, high costs, difficulty in miniaturization and lightweighting, and high power consumption, making it difficult to meet the requirements of low-power applications.
By integrating the limiter, low-noise amplifier, and surface acoustic wave filter into the RF front-end SiP chip through system-in-package technology, and by integrating the downconversion and upconversion modules into the transceiver chip through CMOS circuit design, the component selection and PCB layout area are reduced, and a low-IF architecture is adopted to reduce power consumption.
This has enabled the miniaturization and lightweighting of the equipment, reduced costs and power consumption, solved device compatibility issues and customization requirements, and ensured the stability and performance of the system.
Smart Images
Figure CN224401539U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of radio frequency communication technology, and in particular to a radio frequency transceiver architecture and navigation device. Background Technology
[0002] In the field of satellite navigation, anti-interference radio frequency transceiver architecture is a key technology to ensure signal reception quality. Currently, the common anti-interference equipment transceiver architecture mainly consists of an array antenna module, a radio frequency front-end module, a down-conversion module, an analog-to-digital converter (ADC) module, an anti-interference baseband, and an up-conversion module. These modules work together to receive, process, and filter satellite signals, and then send the processed signals to the navigation receiver to achieve reliable navigation and positioning in a strong interference environment.
[0003] However, the existing transceiver architecture of navigation anti-interference equipment has many problems. On the one hand, there are many component models, and the compatibility issues and customization requirements are quite prominent, resulting in high overall equipment costs. On the other hand, the PCB board layout area corresponding to this architecture is relatively large, which is not conducive to the development of equipment towards miniaturization and lightweighting, and makes it difficult to meet the application scenarios with strict requirements on size and weight. In addition, the average single-channel power consumption of the existing architecture is close to 1W, which cannot effectively meet the needs of low-power applications, thus limiting the widespread application and market promotion of anti-interference equipment to a certain extent. Utility Model Content
[0004] The main purpose of this invention is to propose a radio frequency transceiver architecture that aims to solve the technical problems of existing navigation anti-interference equipment transceiver architectures, such as a large number of component models, high equipment cost, difficulty in miniaturization and lightweighting, and high power consumption.
[0005] To achieve the above objectives, the radio frequency transceiver architecture proposed in this utility model includes:
[0006] Array antenna module, used to receive satellite navigation signals;
[0007] The radio frequency front-end SiP chip has its input terminal connected to the array antenna module. The radio frequency front-end SiP chip integrates a limiter, a low-noise amplifier, and a surface acoustic wave filter to perform limiting, amplification, and filtering on the satellite navigation signal, thereby obtaining a pre-processed radio frequency signal.
[0008] The transceiver chip integrates a down-conversion module and an up-conversion module; the input terminal of the down-conversion module is connected to the output terminal of the RF front-end SiP chip to convert the preprocessed RF signal into an intermediate frequency signal.
[0009] An anti-interference baseband is provided, the input of which is connected to the output of the downconversion module, and the output of which is connected to the input of the upconversion module. The anti-interference baseband is used to process the intermediate frequency signal using an anti-interference algorithm and then output it to the upconversion module. The upconversion module is used to convert the intermediate frequency signal processed by the anti-interference baseband into a radio frequency navigation signal and output it to the navigation receiver.
[0010] In one embodiment, the downconversion module includes a first mixer, and the transceiver chip also integrates a local oscillator module. The local oscillator module is connected to the first mixer and is used to output a local oscillator signal to the first mixer. The first mixer is used to mix the preprocessed radio frequency signal with the local oscillator signal to generate the intermediate frequency signal, and output the intermediate frequency signal to the anti-interference baseband.
[0011] In one embodiment, the radio frequency transceiver architecture further includes a dielectric filter connected between the array antenna module and the input terminal of the radio frequency front-end SiP chip; the dielectric filter is used to filter the satellite navigation signal output by the array antenna module.
[0012] In one embodiment, the transceiver chip integrates four downconversion modules and one upconversion module.
[0013] In one embodiment, the frequency range of the intermediate frequency signal is 20MHz ± 5MHz.
[0014] In one embodiment, the downconversion module further includes a first RC filter, which is an on-chip RC active filter connected between the first mixer and the input of the anti-interference baseband; the first RC filter is used to filter out out-of-band unwanted signals of the intermediate frequency signal.
[0015] In one embodiment, the downconversion module further includes a front-end attenuator connected between the output of the RF front-end SiP chip and the first mixer; the front-end attenuator is used to perform amplitude limiting and attenuation processing on the preprocessed RF signal to prevent channel saturation caused by strong blocking signals.
[0016] In one embodiment, the downconversion module further includes a programmable gain amplifier connected between the first mixer and the first RC filter; the programmable gain amplifier is used to adjust the gain of the intermediate frequency signal generated by the first mixer.
[0017] In one embodiment, the transceiver chip also integrates an analog-to-digital converter (ADC), which is connected between the first RC filter and the input terminal of the anti-interference baseband. The ADC is used to convert the intermediate frequency (IF) signal into an IF digital signal and output it to the anti-interference baseband, so that the anti-interference algorithm is applied to the IF digital signal through the anti-interference baseband.
[0018] In one embodiment, the transceiver chip also integrates a digital module, which is connected between the analog-to-digital converter and the input terminal of the anti-interference baseband.
[0019] The digital module integrates at least a calibration algorithm module and a digital image suppression filter for data processing of the intermediate frequency digital signal according to the data interface format.
[0020] In one embodiment, the upconversion module includes a second mixer, and the transceiver chip also integrates a local oscillator module. The local oscillator module is connected to the second mixer and is used to output a local oscillator signal to the second mixer.
[0021] The second mixer is used to mix the intermediate frequency signal after the anti-interference baseband processing with the local oscillator signal to generate the radio frequency navigation signal, and output the radio frequency navigation signal to the navigation receiver.
[0022] In one embodiment, the transceiver chip also integrates an analog-to-digital converter (ADC), which is connected between the output of the downconversion module and the input of the anti-interference baseband. The ADC is used to convert the intermediate frequency (IF) signal into an IF digital signal and output it to the anti-interference baseband, so that the anti-interference algorithm is applied to the IF digital signal through the anti-interference baseband.
[0023] The upconversion module further includes a digital-to-analog converter (DAC), which is connected between the output of the anti-interference baseband and the second mixer. The DAC is used to convert the intermediate frequency digital signal processed by the anti-interference baseband into an intermediate frequency analog signal, and output the intermediate frequency analog signal to the second mixer. The second mixer is used to mix the intermediate frequency analog signal with the local oscillator signal to generate the radio frequency navigation signal.
[0024] In one embodiment, the upconversion module further includes a second RC filter connected between the digital-to-analog converter and the second mixer; the second RC filter is used at least to filter out out-of-band interference signals and image signals of the intermediate frequency analog signal.
[0025] In one embodiment, the upconversion module further includes a transmitter attenuator connected between the second mixer and the navigation receiver; the transmitter attenuator is used to adjust the power of the radio frequency navigation signal.
[0026] In one embodiment, the transceiver chip also integrates a sampling clock module, which is connected to the analog-to-digital converter, the digital-to-analog converter, and the anti-interference baseband; the sampling clock module is used to provide a sampling clock for the analog-to-digital converter, the digital-to-analog converter, and the anti-interference baseband.
[0027] Correspondingly, this utility model also proposes a navigation device, which includes the radio frequency transceiver architecture as described above.
[0028] The RF transceiver architecture provided by this invention integrates a limiter, a low-noise amplifier, and a surface acoustic wave filter into a single RF front-end SiP chip using System-in-a-Package (SIP) technology. Furthermore, it integrates the down-conversion module, up-conversion module, and other relevant modules into a single transceiver chip using CMOS (Complementary Metal Oxide Semiconductor) circuit design. This approach maintains the original system performance while reducing component selection, PCB layout area, and the scale of peripheral components used, thereby lowering system power consumption and equipment costs. It also facilitates the miniaturization and lightweighting of navigation devices and effectively avoids component compatibility issues and the need for customized filters, ensuring system stability. Attached Figure Description
[0029] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0030] Figure 1 This is a schematic diagram of a radio frequency transceiver architecture in the prior art.
[0031] Figure 2 This is a schematic diagram of the radio frequency transceiver architecture provided in one embodiment of the present invention.
[0032] Explanation of icon numbers:
[0033] 1. Array antenna module;
[0034] 2. RF front-end SiP chip; 21. Limiter; 22. Low-noise amplifier; 23. Surface acoustic wave filter;
[0035] 3. Transceiver chip;
[0036] 31. Downconverter module; 311. First mixer; 312. First RC filter; 313. Front-end attenuator; 314. Programmable gain amplifier;
[0037] 32. Upconverter module; 321. Second mixer; 322. Digital-to-analog converter; 323. Second RC filter; 324. Transmitter attenuator;
[0038] 33. Local oscillator module; 34. Analog-to-digital converter; 35. Digital module; 36. Sampling clock module;
[0039] 4. Anti-interference baseband; 5. Medium filter; 6. Navigation receiver.
[0040] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0041] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present utility model.
[0042] It should be noted that if the embodiments of this utility model involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.
[0043] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the use of "and / or" or "and / or" throughout the text includes three parallel solutions. For example, "A and / or B" includes solution A, solution B, or a solution where both A and B are satisfied simultaneously. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.
[0044] In the field of satellite navigation, anti-interference radio frequency transceiver architecture is a key technology to ensure signal reception quality. Currently, the common anti-interference equipment transceiver architecture mainly consists of an array antenna module, a radio frequency front-end module, a down-conversion module, an analog-to-digital converter (ADC) module, an anti-interference baseband, and an up-conversion module. These modules work together to receive, process, and filter satellite signals, and then send the processed signals to the navigation receiver to achieve reliable navigation and positioning in a strong interference environment.
[0045] However, as Figure 1 As shown, the existing transceiver architecture of navigation anti-interference equipment has many problems. On the one hand, there are many component models, and the compatibility issues and customization requirements are quite prominent, resulting in high overall equipment costs. On the other hand, the PCB board layout area corresponding to this architecture is relatively large, which is not conducive to the development of equipment towards miniaturization and lightweighting, and it is difficult to meet the application scenarios with strict requirements on size and weight. In addition, the average single-channel power consumption of the existing architecture is close to 1W, which cannot effectively meet the needs of low-power applications, and to a certain extent, it limits the widespread application and market promotion of anti-interference equipment.
[0046] To address the aforementioned issues, this utility model provides a radio frequency transceiver architecture that aims to streamline or merge related components and functional modules in existing radio frequency transceiver architectures through integrated and unified design. This reduces the PCB board layout area and limits the use of peripheral components through high integration design without affecting functionality, thereby reducing power consumption and equipment costs.
[0047] Please see Figure 2 The radio frequency transceiver architecture provided by this utility model includes:
[0048] Array antenna module 1 is used to receive satellite navigation signals;
[0049] The RF front-end SiP chip 2 has its input terminal connected to the array antenna module 1. The RF front-end SiP chip 2 integrates a limiter 21, a low-noise amplifier 22, and a surface acoustic wave filter 23 to perform limiting, amplification, and filtering on satellite navigation signals, thereby obtaining a pre-processed RF signal.
[0050] The transceiver chip 3 integrates a downconversion module 31 and an upconversion module 32. The input of the downconversion module 31 is connected to the output of the RF front-end SiP chip 2 to convert the pre-processed RF signal into an intermediate frequency signal.
[0051] The anti-interference baseband 4 has its input terminal connected to the output terminal of the downconversion module 31 and its output terminal connected to the input terminal of the upconversion module 32. The anti-interference baseband 4 is used to process the intermediate frequency signal using an anti-interference algorithm and then output it to the upconversion module 32. The upconversion module 32 is used to convert the intermediate frequency signal processed by the anti-interference baseband 4 into a radio frequency navigation signal and output it to the navigation receiver 6.
[0052] In this embodiment, the array antenna module 1 can be configured as a four-antenna array, a seven-antenna array, or more antenna arrays depending on the application scenario; no limitation is made here. The satellite navigation signals received by the array antenna module 1 are subject to a lot of interference, which needs to be processed by a backend module.
[0053] The RF front-end SiP chip 2 integrates a limiter 21, a low-noise amplifier 22, and a surface acoustic wave filter 23 onto a single chip using System-in-a-Package (SIP) technology. This reduces component selection and layout area while maintaining original performance, thereby lowering costs. For example, Figure 2 As shown, the limiter 21, low-noise amplifier 22, and surface acoustic wave filter 23 are connected in sequence. The limiter 21 is used to clamp the signal amplitude to a safe range through the limiting circuit when a strong blocking signal is input, so as to prevent saturation in the subsequent stage. The low-noise amplifier 22 can use a differential amplifier architecture to amplify the satellite navigation signal. The surface acoustic wave filter 23 is used to further filter out in-band interference and output a pre-processed radio frequency signal with a signal-to-noise ratio that meets the preset requirements.
[0054] The transceiver chip 3 integrates the down-conversion module 31, up-conversion module 32, and other corresponding modules using CMOS (Complementary Metal Oxide Semiconductor) circuit design. This reduces or merges related components and modules while ensuring normal functionality, thereby decreasing the PCB layout area and the number of peripheral components used, and further reducing costs. Specifically, the down-conversion module 31 converts the pre-processed RF signal into an intermediate frequency signal through mixing, facilitating subsequent anti-interference algorithm processing of the intermediate frequency signal. This also reduces the design complexity of the backend hardware modules used for anti-interference algorithm processing.
[0055] The anti-interference baseband 4 is used to process the intermediate frequency (IF) signal output from the downconversion module 31 using anti-interference algorithms. Specifically, it can suppress interference in the IF signal through minimum mean square error algorithms, beamforming techniques, etc., and output the interference-filtered IF signal to the upconversion module 32. The upconversion module 32 is used to convert the IF signal output from the anti-interference baseband 4 into a radio frequency (RF) navigation signal to meet the wireless transmission requirements of the satellite navigation system, and outputs the RF navigation signal to the navigation receiver 6 for navigation operations. The navigation receiver 6 can refer to a terminal device used to receive and process the RF navigation signal to achieve positioning and navigation functions.
[0056] Therefore, the RF transceiver architecture provided in this embodiment integrates the limiter 21, low-noise amplifier 22, and surface acoustic wave filter 23 into a single RF front-end SiP chip 2 through System-in-a-Package (SIP) technology. Furthermore, it integrates the down-conversion module 31, up-conversion module 32, and other corresponding modules into a single transceiver chip 3 using CMOS (Complementary Metal Oxide Semiconductor) circuit design. This approach reduces component selection, PCB layout area, and the scale of peripheral components while maintaining the original system performance, thereby lowering system power consumption and equipment costs. It also facilitates the miniaturization and lightweighting of navigation devices and effectively avoids component compatibility issues and the need for customized filters, ensuring system stability.
[0057] In one embodiment, refer to Figure 2 The transceiver chip 3 integrates four down-conversion modules 31 and one up-conversion module 32, thus forming a four-receive-one-transmit anti-interference RF transceiver chip.
[0058] In one embodiment, refer to Figure 2The RF transceiver architecture also includes a dielectric filter 5, which is connected between the array antenna module 1 and the input of the RF front-end SiP chip 2. The dielectric filter 5 is used to filter the satellite navigation signal output by the array antenna module 1.
[0059] Specifically, when the array antenna module 1 receives a satellite navigation signal with interference, it can output the satellite navigation signal to a low insertion loss dielectric filter 5. The dielectric filter 5 can effectively filter out the image frequency interference in the satellite navigation signal and output the pre-processed satellite navigation signal to the RF front-end SiP chip 2 for further processing. However, due to the relatively large size of the dielectric filter 5, it is not integrated into the RF front-end SiP chip 2.
[0060] In one embodiment, refer to Figure 2 The downconversion module 31 includes a first mixer 311. The transceiver chip 3 also integrates a local oscillator module 33. The local oscillator module 33 is connected to the first mixer 311. The local oscillator module 33 is used to output a local oscillator signal to the first mixer 311. The first mixer 311 is used to mix the pre-processed radio frequency signal with the local oscillator signal to generate an intermediate frequency signal, and output the intermediate frequency signal to the anti-interference baseband 4.
[0061] Specifically, when the preprocessed RF signal output from the RF front-end SiP chip 2 enters the first mixer 311, the preprocessed RF signal is multiplied with the local oscillator signal output from the local oscillator module 33 in the first mixer 311 to generate a difference frequency signal, which can then be extracted by low-pass filtering to obtain the intermediate frequency signal. The local oscillator module 33 supports both local oscillator input and output, thus supporting multi-channel cascading expansion.
[0062] In one embodiment, refer to Figure 2 The frequency range of the intermediate frequency signal is 20MHz±5MHz.
[0063] In one embodiment, refer to Figure 2 The downconversion module 31 also includes a first RC filter 312, which is an on-chip RC active filter. The first RC filter 312 is connected between the input terminals of the first mixer 311 and the anti-interference baseband 4. The first RC filter 312 is used to filter out out-of-band unwanted signals of the intermediate frequency signal.
[0064] In existing RF transceiver architectures, the intermediate frequency (IF) signal for BeiDou B3 frequency reception applications is typically 46.52MHz with a bandwidth of ±10.23MHz, requiring a large LC filter. Furthermore, current chips typically use differential input / output for the RF input and IF output ports in the downconversion structure, necessitating the use of RF and IF baluns. Therefore, integrating these external LC filters results in excessive chip area due to the large required inductance and high Q-factor (quality factor) requirements, making CMOS (Complementary Metal Oxide Semiconductor) circuit design difficult.
[0065] To address the aforementioned issues in existing RF transceiver architectures, this embodiment employs a lower intermediate frequency (IF) architecture, specifically reducing the currently used 46MHz IF signal to 20MHz ± 5MHz (some applications may support even lower IF frequencies). According to the bandpass sampling theorem, lowering the IF signal frequency significantly reduces the sampling frequency of backend modules such as the analog-to-digital converter (ADC). When the signal bandwidth is BW and the center frequency is fc, if 2fc + BW ≤ 2fs (where fs is the sampling frequency), spectral aliasing can be avoided by using a sampling rate lower than the Nyquist frequency, thereby reducing the sampling frequency and design complexity of backend modules such as the ADC.
[0066] Based on the above configuration of this embodiment, the LC filter can be replaced with a smaller first RC filter 312, and modules such as the RF balun and IF balun can be eliminated, thereby simplifying components and reducing chip area, providing conditions for the CMOS (Complementary Metal Oxide Semiconductor) circuit design of the transceiver chip 3. Furthermore, since the integrated RF transceiver architecture of this embodiment eliminates components such as the RF balun and IF balun, insertion loss can be effectively reduced, inter-stage linearity degradation can be avoided, and the requirements for the linearity of the downconversion module 31 and the dynamic range of modules such as the analog-to-digital converter 34 (ADC) can be reduced, thus redefining the design architecture.
[0067] Based on the scheme of this embodiment, after the first mixer 311 converts the preprocessed radio frequency signal into an intermediate frequency signal of 20MHz±5MHz through the mixing operation, the intermediate frequency signal is output to the first RC filter 312. The interfering intermediate frequency signal falls within the band of the first RC filter 312, which can filter out the useless signals outside the band.
[0068] It should be noted that the reason why the zero intermediate frequency architecture is not adopted in this embodiment is due to the DC offset problem. At this time, non-idealities such as flicker noise will fall within the band and cannot be avoided, especially the noise of the local oscillator module 33. This will greatly limit the performance of the system and make it difficult to meet the application requirements for signal-to-interference ratio. Furthermore, the low intermediate frequency architecture supports a maximum signal bandwidth of ±16MHz, which can be implemented by using an on-chip RC active filter.
[0069] In one embodiment, refer to Figure 2 The downconversion module 31 also includes a front-end attenuator 313, which is connected between the output of the RF front-end SIP chip 2 and the first mixer 311. The front-end attenuator 313 is used to limit and attenuate the pre-processed RF signal to prevent strong blocking signals from causing channel saturation.
[0070] Specifically, after the RF front-end SIP chip 2 outputs the pre-processed RF signal to the downconversion module 31, the pre-processed RF signal first enters the front-end attenuator 313. The front-end attenuator 313 has digitally controlled attenuator function and gain amplification function. Its function is to attenuate the amplitude of the pre-processed RF signal and output it to the first mixer 311 to prevent the first mixer 311 from saturating.
[0071] In one embodiment, refer to Figure 2 The downconverter module 31 also includes a programmable gain amplifier 314, which is connected between the first mixer 311 and the first RC filter 312. The programmable gain amplifier 314 is used to adjust the gain of the intermediate frequency signal generated by the first mixer 311.
[0072] In one embodiment, refer to Figure 2 The transceiver chip 3 also integrates an analog-to-digital converter 34, which is connected between the first RC filter 312 and the input of the anti-interference baseband 4. The analog-to-digital converter 34 is used to convert the intermediate frequency signal into an intermediate frequency digital signal and output it to the anti-interference baseband 4 so that the intermediate frequency digital signal can be processed by the anti-interference algorithm through the anti-interference baseband 4.
[0073] Specifically, the intermediate frequency signal output by the first mixer 311 needs to be processed by the programmable gain amplifier 314 (PGA) before entering the first RC filter 312. The programmable gain amplifier 314 has a gain amplification function, which can realize the gain adjustment of the intermediate frequency signal, thereby compensating for the front-end link loss and optimizing the input dynamic range of the back-end analog-to-digital converter 34.
[0074] The intermediate frequency (IF) signal, after gain adjustment by the programmable gain amplifier 314, will be output to the first RC filter 312 for filtering. The IF signal after filtering by the first RC filter 312 will be output to the analog-to-digital converter 34 (ADC) to convert the IF signal (which is an analog signal at this time) into an analog-to-digital signal, and then output to the back-end module for further processing.
[0075] The analog-to-digital converter 34 can employ a 16-bit high-performance Σ-Δ ADC architecture to achieve low power consumption and high effective bits.
[0076] In one embodiment, refer to Figure 2 The transceiver chip 3 also integrates a digital module 35, which is connected between the analog-to-digital converter 34 and the input of the anti-interference baseband 4.
[0077] The digital module 35 integrates at least a calibration algorithm module and a digital image rejection filter for data processing of intermediate frequency digital signals according to the data interface format.
[0078] Specifically, before the intermediate frequency (IF) digital signal output by the analog-to-digital converter (ADC) 34 enters the anti-interference baseband 4, the digital module 35 (Digital Process and Interface) can first process the IF digital signal according to the data interface format, and then output the processed IF digital signal to the anti-interference baseband 4 for anti-interference algorithm processing. The digital module 35 supports quadrature calibration, DC offset calibration, HD2 calibration, and other functions, including digital algorithms, which can be used to achieve better RF performance.
[0079] In one embodiment, refer to Figure 2 The upconversion module 32 includes a second mixer 321, and the transceiver chip 3 also integrates a local oscillator module 33. The local oscillator module 33 is connected to the second mixer 321 and is used to output a local oscillator signal to the second mixer 321.
[0080] The second mixer 321 is used to mix the intermediate frequency signal processed by the anti-interference baseband 4 with the local oscillator signal to generate a radio frequency navigation signal, and output the radio frequency navigation signal to the navigation receiver 6.
[0081] In one embodiment, refer to Figure 2The upconversion module 32 also includes a digital-to-analog converter 322, which is connected between the output of the anti-interference baseband 4 and the second mixer 321. The digital-to-analog converter 322 is used to convert the intermediate frequency digital signal processed by the anti-interference baseband 4 into an intermediate frequency analog signal and output the intermediate frequency analog signal to the second mixer 321. The second mixer 321 is used to mix the intermediate frequency analog signal with the local oscillator signal to generate a radio frequency navigation signal.
[0082] Specifically, after processing by the anti-interference algorithm, the anti-interference baseband 4 outputs a clean intermediate frequency digital signal to the digital-to-analog converter 322 of the up-conversion module 32. The digital-to-analog converter 322 converts the intermediate frequency digital signal into an intermediate frequency analog signal and outputs it to the second mixer 321. The intermediate frequency analog signal and the local oscillator signal output by the local oscillator module 33 are mixed in the second mixer 321 to generate a radio frequency navigation signal. This radio frequency navigation signal can be output to the navigation receiver 6 so that the navigation receiver 6 can analyze and process the signal to complete the navigation operation.
[0083] Among them, the local oscillator module 33 supports local oscillator input and output, thus supporting multi-channel cascading expansion.
[0084] It should be noted that in practical applications, it is usually not necessary to send the processed radio frequency navigation signal to the navigation receiver 6 through the antenna. Therefore, the output power of the transmitting antenna is not required to be high. Thus, the upconversion module 32 can adopt an orthogonal conversion architecture, and the digital-to-analog converter 322 (DAC) adopts a 16-bit current stack architecture. Its sampling rate is set to twice the sampling rate of the analog-to-digital converter 34 (ADC) to meet the requirements of the Nyquist sampling theorem and avoid frequency aliasing.
[0085] In one embodiment, refer to Figure 2 The upconversion module 32 also includes a second RC filter 323, which is connected between the digital-to-analog converter 322 and the second mixer 321. The second RC filter 323 is used at least to filter out out-of-band interference signals and image signals of the intermediate frequency analog signal.
[0086] Specifically, after the digital-to-analog converter 322 converts the intermediate frequency digital signal processed by the anti-interference baseband 4 into an intermediate frequency analog signal, it first performs a filtering operation on the intermediate frequency analog signal through the second RC filter 323 to filter out out-of-band interference signals, image signals, etc., and outputs a clean in-band intermediate frequency analog signal to the second mixer 321 for mixing operation.
[0087] In one embodiment, refer to Figure 2The upconversion module 32 also includes a transmitter attenuator 324, which is connected between the second mixer 321 and the navigation receiver 6. The transmitter attenuator 324 is used to adjust the power of the radio frequency navigation signal.
[0088] Specifically, before the radio frequency navigation signal output by the second mixer 321 reaches the navigation receiver 6, it needs to be power-adjusted by the transmitter attenuator 324 and then output to the external navigation receiver 6 for normal navigation reception, so as to better adapt to navigation receivers 6 with different sensitivities.
[0089] In one embodiment, refer to Figure 2 The transceiver chip 3 also integrates a sampling clock module 36, which is connected to the analog-to-digital converter 34, the digital-to-analog converter 322, and the anti-interference baseband 4. The sampling clock module 36 is used to provide a sampling clock for the analog-to-digital converter 34, the digital-to-analog converter 322, and the anti-interference baseband 4.
[0090] Specifically, the sampling clock module 36 provides a sampling clock for the analog-to-digital converter 34, the digital-to-analog converter 322, and the anti-interference baseband 4 to ensure phase consistency and conversion accuracy. Based on this configuration, some clock buffers in the architecture design can be saved, thereby further reducing equipment costs.
[0091] Based on the radio frequency transceiver architecture provided in the above embodiments, referring to Figure 2 The complete signal transmission process is as follows:
[0092] The array antenna module 1 receives satellite navigation signals and outputs them to the RF front-end SiP chip 2. The limiter 21, low-noise amplifier 22, and surface acoustic wave filter 23 in the RF front-end SiP chip 2 sequentially perform limiting, amplification, and filtering processing on the satellite navigation signals to obtain a pre-processed RF signal, which is then output to the down-conversion module 31 of the transceiver chip 3. The front-end attenuator 313 in the down-conversion module 31 performs limiting and attenuation processing on the pre-processed RF signal and outputs it to the first mixer 311. The first mixer 311 mixes the pre-processed RF signal with the local oscillator signal output from the local oscillator module 33 to generate an intermediate frequency (IF) signal, which is then output to the programmable gain amplifier 314. The programmable gain amplifier 314 adjusts the gain of the IF signal and outputs it to the first RC filter 312. The first RC filter 312 filters out out-of-band unwanted signals from the IF signal and outputs the IF signal to the analog-to-digital converter 34. The analog-to-digital converter 34 then... The intermediate frequency (IF) signal is converted into an IF digital signal and output to the digital module 35. The digital module 35 processes the IF digital signal according to the data interface format and outputs the processed IF digital signal to the anti-interference baseband 4. The anti-interference baseband 4 processes the IF digital signal using an anti-interference algorithm and outputs it to the digital-to-analog converter 322. The digital-to-analog converter 322 converts the IF digital signal into an IF analog signal and outputs it to the second RC filter 323. The second RC filter 323 filters out out-of-band interference signals, image signals, etc., from the IF analog signal and outputs it to the second mixer 321. The second mixer 321 mixes the IF analog signal with the local oscillator signal output from the local oscillator module 33 to generate a radio frequency (RF) navigation signal and outputs the RF navigation signal to the transmitter attenuator 324. The transmitter attenuator 324 adjusts the power of the RF navigation signal and outputs it to the navigation receiver 6, so that the navigation receiver 6 can analyze and process the clean RF navigation signal to complete the navigation operation.
[0093] Correspondingly, this utility model embodiment also provides a navigation device, please refer to... The navigation device includes the radio frequency transceiver architecture of any of the above embodiments.
[0094] Specifically, the navigation device can refer to any terminal device with positioning and navigation functions. For the specific structure of the RF transceiver architecture, please refer to the above embodiments. Since this navigation device adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments. That is, by integrating the limiter 21, low-noise amplifier 22, and surface acoustic wave filter 23 into a single RF front-end SiP chip 2 through System-in-a-Package (SIP) technology, and by integrating the down-conversion module 31, up-conversion module 32, and other corresponding modules into a single transceiver chip 3 through CMOS (Complementary Metal Oxide Semiconductor) circuit design, it can reduce the selection of components, the layout area of the PCB board, and the scale of peripheral components while maintaining the original performance of the system. This reduces system power consumption and equipment cost, and is more conducive to the miniaturization and lightweight development of navigation devices. Furthermore, it effectively avoids component compatibility issues and the need for customized filters, ensuring system stability.
[0095] This solution not only supports the upgrading of existing BeiDou navigation anti-interference equipment, but also expands its application to low-cost anti-interference applications in the low-altitude economic field and other demand scenarios for phased array receivers.
[0096] It should be noted that other aspects of the radio frequency transceiver architecture and navigation device disclosed in this utility model can be found in the prior art, and will not be repeated here.
[0097] The above description is merely an exemplary embodiment of the present utility model and does not limit the patent scope of the present utility model. Any equivalent structural transformations made based on the technical concept of the present utility model and the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present utility model.
Claims
1. A radio frequency transceiver architecture, characterized in that, The radio frequency transceiver architecture includes: Array antenna module, used to receive satellite navigation signals; The radio frequency front-end SiP chip has its input terminal connected to the array antenna module. The radio frequency front-end SiP chip integrates a limiter, a low-noise amplifier, and a surface acoustic wave filter to perform limiting, amplification, and filtering on the satellite navigation signal, thereby obtaining a pre-processed radio frequency signal. The transceiver chip integrates a down-conversion module and an up-conversion module; the input terminal of the down-conversion module is connected to the output terminal of the RF front-end SiP chip to convert the preprocessed RF signal into an intermediate frequency signal. An anti-interference baseband is provided, the input of which is connected to the output of the downconversion module, and the output of which is connected to the input of the upconversion module. The anti-interference baseband is used to process the intermediate frequency signal using an anti-interference algorithm and then output it to the upconversion module. The upconversion module is used to convert the intermediate frequency signal processed by the anti-interference baseband into a radio frequency navigation signal and output it to the navigation receiver.
2. The radio frequency transceiver architecture as described in claim 1, characterized in that, The downconversion module includes a first mixer, and the transceiver chip also integrates a local oscillator module. The local oscillator module is connected to the first mixer and is used to output a local oscillator signal to the first mixer. The first mixer is used to mix the preprocessed radio frequency signal with the local oscillator signal to generate the intermediate frequency signal, and output the intermediate frequency signal to the anti-interference baseband. And / or, the RF transceiver architecture further includes a dielectric filter, which is connected between the array antenna module and the input terminal of the RF front-end SiP chip; the dielectric filter is used to filter the satellite navigation signal output by the array antenna module; And / or, the transceiver chip integrates four downconversion modules and one upconversion module.
3. The radio frequency transceiver architecture as described in claim 2, characterized in that, The frequency range of the intermediate frequency signal is 20MHz ± 5MHz.
4. The radio frequency transceiver architecture as described in claim 3, characterized in that, The downconversion module further includes a first RC filter, which is an on-chip RC active filter. The first RC filter is connected between the input of the first mixer and the anti-interference baseband. The first RC filter is used to filter out out-of-band unwanted signals of the intermediate frequency signal.
5. The radio frequency transceiver architecture as described in claim 4, characterized in that, The downconversion module also includes a front-end attenuator, which is connected between the output of the RF front-end SiP chip and the first mixer. The front-end attenuator is used to limit and attenuate the pre-processed RF signal to prevent strong blocking signals from causing channel saturation. And / or, the downconversion module further includes a programmable gain amplifier, which is connected between the first mixer and the first RC filter; the programmable gain amplifier is used to adjust the gain of the intermediate frequency signal generated by the first mixer; And / or, the transceiver chip also integrates an analog-to-digital converter, which is connected between the first RC filter and the input terminal of the anti-interference baseband; The analog-to-digital converter is used to convert the intermediate frequency signal into an intermediate frequency digital signal and output it to the anti-interference baseband, so that the intermediate frequency digital signal can be processed by the anti-interference algorithm through the anti-interference baseband.
6. The radio frequency transceiver architecture as described in claim 5, characterized in that, The transceiver chip also integrates a digital module, which is connected between the analog-to-digital converter and the input terminal of the anti-interference baseband. The digital module integrates at least a calibration algorithm module and a digital image suppression filter for data processing of the intermediate frequency digital signal according to the data interface format.
7. The radio frequency transceiver architecture as described in claim 1, characterized in that, The upconversion module includes a second mixer, and the transceiver chip also integrates a local oscillator module. The local oscillator module is connected to the second mixer and is used to output a local oscillator signal to the second mixer. The second mixer is used to mix the intermediate frequency signal after the anti-interference baseband processing with the local oscillator signal to generate the radio frequency navigation signal, and output the radio frequency navigation signal to the navigation receiver.
8. The radio frequency transceiver architecture as described in claim 7, characterized in that, The transceiver chip also integrates an analog-to-digital converter, which is connected between the output of the downconversion module and the input of the anti-interference baseband. The analog-to-digital converter is used to convert the intermediate frequency signal into an intermediate frequency digital signal and output it to the anti-interference baseband so that the anti-interference algorithm can be applied to the intermediate frequency digital signal through the anti-interference baseband. The upconversion module further includes a digital-to-analog converter, which is connected between the output of the anti-interference baseband and the second mixer. The digital-to-analog converter is used to convert the intermediate frequency digital signal processed by the anti-interference baseband into an intermediate frequency analog signal, and output the intermediate frequency analog signal to the second mixer. The second mixer is used to mix the intermediate frequency analog signal with the local oscillator signal to generate the radio frequency navigation signal.
9. The radio frequency transceiver architecture as described in claim 8, characterized in that, The upconversion module further includes a second RC filter, which is connected between the digital-to-analog converter and the second mixer; the second RC filter is used at least to filter out out-of-band interference signals and image signals of the intermediate frequency analog signal; And / or, the upconversion module further includes a transmitter attenuator connected between the second mixer and the navigation receiver; the transmitter attenuator is used to adjust the power of the radio frequency navigation signal; And / or, the transceiver chip also integrates a sampling clock module, which is connected to the analog-to-digital converter, the digital-to-analog converter, and the anti-interference baseband; the sampling clock module is used to provide a sampling clock for the analog-to-digital converter, the digital-to-analog converter, and the anti-interference baseband.
10. A navigation device, characterized in that, The navigation device includes the radio frequency transceiver architecture as described in any one of claims 1 to 9.