A power transistor testing device
By integrating electrical, visual, and line scan testing units into the power transistor testing device, the problems of damage and low efficiency caused by multiple displacements of power transistors in the prior art are solved, achieving efficient and integrated testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BESTRIC TECH CO LTD
- Filing Date
- 2025-06-26
- Publication Date
- 2026-06-30
AI Technical Summary
In existing technologies, power transistors need to be moved multiple times and undergo various tests after production, resulting in low equipment integration, low testing efficiency, and easy damage.
Design a power transistor testing device that combines a substrate and a processing turntable with a positioning groove, integrating an electrical testing section, a visual testing section, and a line scan testing section, so as to perform multiple tests through the same device and avoid multiple relocations.
This improved the integration level of the equipment, prevented damage to the power transistors, and increased testing efficiency.
Smart Images

Figure CN224436501U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of power transistor testing technology, and in particular relates to a power transistor testing device. Background Technology
[0002] Power transistors are electronic devices used for controlling and efficiently processing high-power signals. They are widely used in power management, motor drives, inverters, and RF amplification. The main types include MOSFETs, IGBTs, and BJTs, and they are characterized by high voltage withstand, high current handling, and low conduction losses.
[0003] After the power transistor is manufactured, it needs to undergo multiple tests, including electrical tests, visual inspection, and scanning tests. Currently, multiple testing devices are usually used to test it sequentially. This method requires the power transistor to be moved multiple times to perform the corresponding tests. During the relocation process, the power transistor is prone to damage. In addition, the use of multiple testing devices has the problem of low integration, resulting in low testing efficiency. Utility Model Content
[0004] This invention overcomes the shortcomings of the prior art and provides a power transistor testing device to solve the problems existing in the prior art.
[0005] To achieve the above objectives, the technical solution adopted by this utility model is: a power transistor testing device, comprising...
[0006] substrate;
[0007] A processing turntable is located on the substrate and coaxially arranged with the substrate. The turntable has positioning grooves to position the power transistors. A first testing section, a second testing section, and a third testing section are sequentially arranged along the rotation direction of the turntable.
[0008] The first testing unit includes a test cylinder and an electrical test block, wherein the electrical test block is equipped with probes to perform electrical tests on the power transistor;
[0009] The second test unit includes a drive module and a vision camera, which performs visual testing on the power transistor terminals;
[0010] The third testing unit includes a drive cylinder and a line scanner, which performs line scanning tests on the ends of the power transistor.
[0011] In a preferred embodiment of the present invention, a driver is provided below the substrate, and the driver is connected to the processing turntable to drive the processing turntable.
[0012] In a preferred embodiment of this utility model, the positioning groove is a circular groove, and the protrusion of the power tube is located in the positioning groove to position the power tube.
[0013] In a preferred embodiment of this utility model, a mounting block is provided on the substrate, and the test cylinder is movably mounted on the mounting block via a guide member to guide the moving end of the test cylinder.
[0014] In a preferred embodiment of this invention, the electrical test block is installed on the moving end of the test cylinder to be close to or away from the power tube.
[0015] In a preferred embodiment of this invention, the second test unit is mounted on the substrate via a support base, and the drive module is a linear module to drive the vision camera to move closer to or away from the power transistor.
[0016] In a preferred embodiment of this utility model, the third test unit is mounted on the substrate by a bracket, and the drive cylinder is mounted on the bracket to drive the line scanner to move closer to or away from the power transistor.
[0017] This utility model solves the defects existing in the background technology, and has the following beneficial effects:
[0018] The testing device of this invention enables multiple tests on power transistors without requiring multiple repositioning of the power transistors, thus effectively avoiding damage to the power transistors. Furthermore, by concentrating multiple tests on the same device, the integration level of the device is improved, thereby increasing the testing efficiency of power transistors. Attached Figure Description
[0019] The present invention will be further described below with reference to the accompanying drawings and embodiments;
[0020] Figure 1 This is a schematic diagram of the overall structure of a preferred embodiment of the present utility model;
[0021] Figure 2 for Figure 1 Enlarged view of section A in the middle;
[0022] Figure 3 This is a front view of a preferred embodiment of the present invention;
[0023] In the figure: 10, substrate; 20, processing turntable; 21, positioning groove; 30, first test section; 31, test cylinder; 32, electrical test block; 40, second test section; 41, drive module; 42, vision camera; 50, third test section; 51, drive cylinder; 52, line scanner; 60, driver; 70, mounting block; 80, guide; 90, support base; 100, bracket. Detailed Implementation
[0024] The following drawings will disclose several embodiments of this utility model. For clarity, many physical details will be described in the following description. However, it should be understood that these physical details should not be used to limit this utility model. That is, in some embodiments of this utility model, these physical details are not essential. In addition, for the sake of simplicity, some conventional structures and components will be shown in the drawings in a simple schematic manner.
[0025] Furthermore, in this utility model, the use of terms such as "first" and "second" is for descriptive purposes only and does not specifically refer to any order or sequence, nor is it intended to limit the utility model. They are merely used to distinguish components or operations described with the same technical terms and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but only if they are feasible for those skilled in the art. If a combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.
[0026] This embodiment provides a power transistor testing device that enables multiple tests on the power transistor without requiring multiple repositioning of the power transistor, thereby effectively avoiding damage to the power transistor. Furthermore, by concentrating multiple tests on the same device, the device's integration level is improved, thus increasing the testing efficiency of the power transistor.
[0027] Combination Figures 1 to 3 As shown, the power transistor testing device of this embodiment includes a substrate 10, a processing turntable 20, and a first testing unit 30, a second testing unit 40, and a third testing unit 50 arranged sequentially along the rotation direction of the processing turntable 20. The processing turntable 20 positions the power transistor, and the first testing unit 30, the second testing unit 40, and the third testing unit 50 sequentially perform electrical tests, visual tests, and line scan tests on the power transistor.
[0028] In this embodiment, the processing turntable 20 is located on the substrate 10 and is coaxially arranged with the substrate 10. The processing turntable 20 is provided with a positioning groove 21 to position the power transistor. A driver 60 is provided below the substrate 10. The driver 60 is connected to the processing turntable 20 to drive the processing turntable 20, thereby changing the orientation of the power transistor so as to perform testing operations on the power transistor.
[0029] Specifically, in this embodiment, the positioning groove 21 is a circular groove, and the protrusion of the power tube is located in the positioning groove 21. The power tube in this embodiment has a protrusion, which is installed in the positioning groove 21 so that the power tube can be tested later.
[0030] In this embodiment, the first testing unit 30 includes a testing cylinder 31 and an electrical testing block 32. The electrical testing block 32 is equipped with probes to perform electrical tests on the power transistor. The second testing unit 40 includes a drive module 41 and a vision camera 42. The vision camera 42 performs visual tests on the end of the power transistor. The third testing unit 50 includes a drive cylinder 51 and a line scanner 52. The line scanner 52 performs line scanning tests on the end of the power transistor. During the rotation of the processing turntable 20, the transistor passes through the first testing unit 30, the second testing unit 40, and the third testing unit 50 in sequence, thereby performing electrical tests, visual tests, and line scanning tests on the power transistor in sequence.
[0031] Specifically, when the power transistor rotates to the first test section 30, the test cylinder 31 drives the electrical test block 32, causing the probes on the electrical test block 32 to be inserted into the power transistor, thereby realizing the electrical test of the power transistor. When the power transistor rotates to the second test section 40, the drive module 41 drives the vision camera 42, causing the vision camera 42 to approach the power transistor, thereby realizing the visual test of the power transistor. When the power transistor rotates to the third test section 50, the drive cylinder 51 drives the line scanner 52, causing the line scanner 52 to approach the power transistor, and the line scanner 52 performs a line scan test on the power transistor.
[0032] Combination Figure 1 and Figure 3 As shown, a mounting block 70 is provided on the substrate 10 of this embodiment. The test cylinder 31 is movably disposed on the mounting block 70 through the guide member 80 to guide the moving end of the test cylinder 31. The electrical test block 32 is mounted on the moving end of the test cylinder 31 to be close to or away from the power transistor. The guide member 80 can guide the moving end of the test cylinder 31 so that the electrical test block 32 can accurately perform electrical tests on the power transistor.
[0033] In this embodiment, the second test unit 40 is mounted on the substrate 10 via the support base 90, the drive module 41 is a linear module to drive the vision camera 42 to approach or move away from the power transistor, the third test unit 50 is mounted on the substrate 10 via the bracket 100, and the drive cylinder 51 is mounted on the bracket 100 to drive the line scanner 52 to approach or move away from the power transistor.
[0034] In practical use, the power transistor testing device of this embodiment positions the power transistor on the processing turntable 20. The processing turntable 20 drives the power transistor to rotate, so that the power transistor passes through the first testing section 30, the second testing section 40 and the third testing section 50 in sequence, thereby performing electrical testing, visual testing and line scanning testing on the power transistor in sequence. It realizes multiple tests on the power transistor without the need to move the power transistor multiple times, which can effectively avoid damage to the power transistor. Furthermore, it concentrates multiple tests on the same device, improves the integration level of the device, and thus improves the testing efficiency of the power transistor.
[0035] While the present invention has been described above with reference to various embodiments, it should be understood that many changes and modifications can be made without departing from the scope of the present invention. That is, the methods, systems, or devices discussed above are merely examples. Various configurations can be appropriately omitted, substituted, or added to various processes or components. For example, in alternative configurations, methods can be performed in a different order than described, and / or various stages can be added, omitted, and / or combined. Moreover, features described with respect to certain configurations can be combined in various other configurations. Different aspects and elements of the configuration can be combined in a similar manner. Furthermore, as technology develops, many elements are merely examples and do not limit the scope of this disclosure or the claims.
[0036] Specific details are provided in the specification to offer a thorough understanding of exemplary configurations, including implementations. However, configurations can be practiced without these specific details; for example, well-known circuits, processes, algorithms, structures, and techniques have been shown without unnecessary detail to avoid obscuring the configuration. This description provides only exemplary configurations and does not limit the scope, applicability, or configuration of the claims. Rather, the foregoing description of the configurations will provide those skilled in the art with an enabling description for implementing the described techniques. Various changes can be made to the function and arrangement of the elements without departing from the spirit or scope of this disclosure.
[0037] Furthermore, although each operation can be described as a sequential process, many operations can be executed in parallel or simultaneously. Additionally, the order of operations can be rearranged. A process may have additional steps. Moreover, examples of methods can be implemented using hardware, software, firmware, middleware, code, hardware description languages, or any combination thereof. When implemented in software, firmware, middleware, or code, the program code or code segments used to perform the necessary tasks can be stored in a non-transitory computer-readable medium such as a storage medium and executed by a processor.
[0038] In summary, the above detailed description is intended to be exemplary and not restrictive, and it should be understood that the claims (including all equivalents) are intended to define the spirit and scope of this invention. These embodiments should be understood as illustrative only and not as limiting the scope of protection of this invention. After reading the description of this invention, those skilled in the art can make various alterations or modifications to it, and these equivalent changes and modifications also fall within the scope defined by the claims of this invention.
Claims
1. A power tube testing apparatus, characterized by, include base(10); A processing turntable (20) is located on the substrate (10) and coaxially arranged with the substrate (10). The processing turntable (20) is provided with a positioning groove (21) to position the power tube. A first testing section (30), a second testing section (40), and a third testing section (50) are arranged sequentially along the rotation direction of the processing turntable (20), wherein: The first test unit (30) includes a test cylinder (31) and an electrical test block (32), wherein the electrical test block (32) is provided with probes to perform electrical tests on the power transistor; The second test unit (40) includes a drive module (41) and a vision camera (42), which performs visual testing on the power transistor ends; The third test unit (50) includes a drive cylinder (51) and a line scanner (52), which performs line scanning tests on the ends of the power transistor.
2. The power tube testing apparatus according to claim 1, wherein A driver (60) is disposed below the substrate (10), and the driver (60) is connected to the machining turntable (20) to drive the machining turntable (20).
3. The power tube testing apparatus of claim 1, wherein The positioning groove (21) is a circular groove, and the protrusion of the power tube is located in the positioning groove (21) to position the power tube.
4. The power tube testing apparatus of claim 1, wherein A mounting block (70) is provided on the substrate (10), and the test cylinder (31) is movably mounted on the mounting block (70) through a guide (80) to guide the moving end of the test cylinder (31).
5. The power tube testing apparatus of claim 4, wherein The electrical test block (32) is installed on the moving end of the test cylinder (31) to be close to or away from the power tube.
6. The power tube testing apparatus of claim 1, wherein The second test unit (40) is mounted on the substrate (10) via a support base (90), and the drive module (41) is a linear module to drive the vision camera (42) to move closer to or away from the power transistor.
7. The power tube testing apparatus of claim 1, wherein The third test unit (50) is mounted on the substrate (10) via a bracket (100), and the drive cylinder (51) is mounted on the bracket (100) to drive the line scanner (52) to move closer to or away from the power tube.