Pulsed constant current passive equalization circuit
By using a pulsed constant current passive balancing circuit to periodically change the current magnitude and switching on/off state, the problem of resistive heating in zinc-based flow battery systems is solved, improving the battery's discharge and charging efficiency and extending the lifespan of the electrode plates.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 纬景储能科技有限公司
- Filing Date
- 2025-06-30
- Publication Date
- 2026-07-17
AI Technical Summary
In zinc-based flow battery systems, when resistors are used for passive balancing, the large passive balancing current demand leads to increased resistor power, excessive heat generation, and ineffective control, affecting battery performance and safety.
A pulsed constant current passive equalization circuit is adopted. Through the combination of PWM pulse circuit module, AND gate, MOSFET drive circuit, comparator circuit, integral amplifier circuit and control circuit, the current magnitude and on/off state are periodically changed to reduce zinc deposits and polarization on the electrode surface and improve discharge and charge efficiency.
It improves circuit performance, reduces electrode polarization, increases discharge and charge efficiency, avoids electrode plate damage, extends service life, distributes current evenly, and avoids local overheating.
Smart Images
Figure CN224520690U_ABST
Abstract
Claims
1. A pulsed constant current passive equalization circuit, characterized by, The circuit includes a PWM pulse circuit module, an AND gate, a MOSFET driver circuit, a comparator circuit, an integrating amplifier circuit, a control circuit, and a sampling circuit. In this circuit, one end of the sampling circuit is connected to the positive terminal of the zinc-based flow battery; the first input terminal of the integrating amplifier circuit is connected to one end of the sampling circuit; the second input terminal of the integrating amplifier circuit is connected to the other end of the sampling circuit; the output terminal of the integrating amplifier circuit is connected to the input terminal of the comparator circuit; the output terminal of the comparator circuit is connected to the control terminal of the PWM pulse circuit module; the output terminal of the PWM pulse circuit module is connected to the first input terminal of the AND gate; the second input terminal of the AND gate is used to receive an external enable control signal; the output terminal of the AND gate is connected to the control terminal of the MOSFET drive circuit; the output terminal of the MOSFET drive circuit is connected to the control terminal of the control circuit; the first connection terminal of the control circuit is connected to the other end of the sampling circuit; the second connection terminal of the control circuit is connected to the negative terminal of the zinc-based flow battery; and the second connection terminal of the control circuit is also grounded.
2. The pulsed constant-current passive equalization circuit of claim 1, wherein, Also includes: An isolated power supply circuit and a reference source circuit module are provided. The isolated power supply circuit and the reference source circuit module include a first voltage output terminal and a second voltage output terminal. The first voltage output terminal is connected to the power supply terminal of the MOSFET driving circuit, and the second voltage output terminal is connected to the power supply terminals of the PWM pulse circuit module, the MOSFET driving circuit, the comparator circuit, and the integrating amplifier circuit, respectively.
3. The pulsed constant current passive equalization circuit of claim 2, wherein, The isolated power supply circuit and reference source circuit module further includes a reference voltage output terminal, which is used to provide a reference voltage for the PWM pulse circuit module and the comparator circuit.
4. The pulsed constant current passive equalization circuit of claim 1, wherein, The sampling circuit includes a sampling resistor. One end of the sampling resistor serves as one end of the sampling circuit and is connected to the negative terminal of the zinc-based flow battery. The other end of the sampling resistor serves as the other end of the sampling circuit and is connected to the input terminal of the integrating amplifier circuit.
5. The pulsed constant current passive equalization circuit of claim 1, wherein, The control circuit includes an N-type field-effect transistor (FET). The gate of the N-type FET serves as the control terminal of the control circuit and is connected to the output terminal of the MOSFET driving circuit. The source of the N-type FET serves as the second connection terminal of the control circuit and is connected to the negative terminal of the zinc-based flow battery. The drain of the N-type FET serves as the first connection terminal of the control circuit and is connected to the positive terminal of the zinc-based flow battery.
6. The pulsed constant current passive equalization circuit of claim 1, wherein, The PWM pulse circuit module includes a first operational amplifier, a second operational amplifier, a third operational amplifier, a fourth operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a first capacitor, and a second capacitor; In this circuit, one end of the first resistor serves as the input terminal of the PWM pulse circuit module and is connected to the output terminal of the comparator circuit; the other end of the first resistor is connected to the negative input terminal of the first operational amplifier; one end of the first capacitor is connected to the other end of the first resistor, and the other end of the first capacitor is connected to the output terminal of the first operational amplifier; one end of the third resistor is connected to the reference voltage, and the other end of the third resistor is connected to the non-inverting input terminal of the first operational amplifier; the non-inverting input terminal of the second operational amplifier is connected to the output terminal of the first operational amplifier; the output terminal of the second operational amplifier serves as the input terminal of the PWM pulse circuit module and is connected to the first input terminal of the AND gate; and the inverting input terminal of the second operational amplifier is connected to the output terminal of the third operational amplifier. The circuit is as follows: one end of the second capacitor is connected to the inverting input of the second operational amplifier, and the other end of the second capacitor is connected to the inverting input of the third operational amplifier. The non-inverting input of the third operational amplifier is connected to a reference voltage. One end of the fourth resistor is connected to the inverting input of the third operational amplifier, and the other end of the fourth resistor is connected to the output of the fourth operational amplifier. One end of the fifth resistor is connected to the other end of the fourth resistor, and the other end of the fifth resistor is connected to the non-inverting input of the fourth operational amplifier. One end of the sixth resistor is connected to the non-inverting input of the fourth operational amplifier, and the other end of the sixth resistor is connected to the output of the third operational amplifier. The inverting input of the fourth operational amplifier is connected to a reference voltage.
7. The pulsed constant current passive equalization circuit according to claim 1, characterized in that, The integrating amplifier circuit includes a current sensing amplifier, a fifth operational amplifier, a seventh resistor, an eighth resistor, a third capacitor, and a fourth capacitor; In this circuit, the first input terminal of the current detection amplifier is connected to one end of the sampling circuit as the first input terminal of the integrating amplifier circuit; the second input terminal of the current detection amplifier is connected to the other end of the sampling circuit as the second input terminal of the integrating amplifier circuit; the output terminal of the current detection amplifier is connected to one end of the eighth resistor; the other end of the eighth resistor is connected to the non-inverting input terminal of the fifth operational amplifier; one end of the seventh resistor is connected to the inverting input terminal of the fifth operational amplifier; the other end of the seventh resistor is grounded; one end of the fourth capacitor is connected to the other end of the eighth resistor; the other end of the fourth capacitor is grounded; and the output terminal of the fifth operational amplifier is connected to the input terminal of the comparator circuit as the output terminal of the integrating amplifier circuit.
8. The pulsed constant current passive equalization circuit according to claim 1, characterized in that, The comparison circuit includes a comparator, a seventh operational amplifier, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifth capacitor, and a sixth capacitor. In this circuit, one end of the ninth resistor serves as the input terminal of the comparator circuit and is connected to the output terminal of the integrating amplifier circuit; the other end of the ninth resistor is connected to the inverting input terminal of the comparator. One end of the tenth resistor is connected to the reference voltage; the other end of the tenth resistor is connected to the non-inverting input terminal of the comparator. One end of the eleventh resistor is connected to the non-inverting input terminal of the comparator; the other end of the eleventh resistor is connected to the output terminal of the comparator. The output terminal of the comparator is also connected to one end of the thirteenth resistor; the other end of the thirteenth resistor is connected to the non-inverting input terminal of the seventh operational amplifier; the inverting input terminal of the seventh operational amplifier is connected to the output terminal of the seventh operational amplifier; the output terminal of the seventh operational amplifier is also connected to one end of the fourteenth resistor; and the other end of the fourteenth resistor serves as the output terminal of the comparator circuit and is connected to the control terminal of the PWM pulse circuit module.
9. The pulsed constant current passive equalization circuit of claim 2, wherein, The isolated power supply circuit includes a JW3150 isolation chip.
10. The pulsed constant current passive equalization circuit of claim 1, wherein, The MOSFET driving circuit includes an SN74LVC1G08DBVR chip, and the AND gate includes an SCT51240TWBR chip.