Sealing structure and lead frame thereof
By encapsulating IGBTs and FRDs in the same plastic package, the problems of large circuit board area and high cost are solved, achieving a highly integrated and low-cost circuit design with good electrostatic discharge protection and heat dissipation capabilities.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HANGZHOU SILAN MICROELECTRONICS CO LTD
- Filing Date
- 2025-05-28
- Publication Date
- 2026-07-17
AI Technical Summary
In air conditioner power factor correction circuits, discrete components such as IGBTs and FRDs occupy a large area of the circuit board, affecting integration and increasing costs. External insulating sheets or films also affect the layout.
By encapsulating the IGBT and two FRDs in the same plastic package and using an internal insulating sheet in the encapsulation structure, the PCB footprint is reduced and the integration density is improved.
The number of components and assembly steps has been reduced, lowering costs while maintaining good electrostatic discharge protection and heat dissipation performance, thus improving product reliability and stability.
Smart Images

Figure CN224521650U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor technology, and more specifically, to a packaging structure. Background Technology
[0002] In air conditioner power factor correction (PFC) circuits, two discrete electrical components—an insulated-gate bipolar transistor (IGBT) and a fast recovery diode (FRD)—are typically combined to form the required circuit. By placing these two components on the same circuit board and connecting them via wiring, each component occupies board space and requires separate connection and assembly. This not only affects the product's integration level but also increases cost and the amount of materials required. Typically, an insulating sheet or film is placed on the back of one of the components on the circuit board.
[0003] Therefore, it is necessary to design a co-encapsulation structure to package the IGBT and two separate FRDs in a single plastic package, thereby reducing the area occupied by the circuit board, improving product integration, and embedding external insulating sheets or insulating films inside the package structure. This achieves both co-encapsulation of the IGBT and the two FRDs and electrical insulation between the components. Utility Model Content
[0004] In view of this, the purpose of this utility model is to provide a packaged structure that encapsulates an insulated gate bipolar transistor and two diodes in the same plastic package, thereby improving product integration, reducing costs, making the circuit board layout more reasonable and flexible, and achieving higher integration, which can meet a variety of different needs.
[0005] A sealing structure, comprising:
[0006] Insulating substrate;
[0007] The first base island is located on the first surface of the insulating substrate;
[0008] The second base island is located on the first surface of the insulating substrate.
[0009] The power unit is located on the first base island;
[0010] The second diode is located on the second base island;
[0011] Multiple pins, including pin 1, pin 2, pin 3, pin 4, and pin 5;
[0012] A plastic encapsulation that covers the first base island, the second base island, the power unit, the second diode, and the first, second, third, fourth, and fifth pins;
[0013] The first base island and the second base island are located on the left and right sides of the insulating substrate, and multiple pins extend from the lower side of the encapsulation body below the first base island and the second base island.
[0014] The fourth pad is located on the first surface of the insulating substrate and is independent of the first and second base islands.
[0015] The support structure has a first end connected to the fourth pad and a second end connected to the side of the molding compound.
[0016] Preferably, the second end of the support structure is connected to the left and right sides inside the plastic seal.
[0017] Preferably, the second end of the support structure is connected to the upper side of the interior of the molding compound, and the upper and lower sides of the molding compound are relatively parallel.
[0018] Preferably, the power unit is an insulated-gate bipolar transistor and a first diode;
[0019] The first pin of the plurality of pins is connected to the gate of the insulated gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin of the plurality of pins is electrically connected to the first base island, the cathode of the first diode and the collector of the insulated gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0020] Preferably, the third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the collector of the insulated gate bipolar transistor and the cathode of the first diode.
[0021] Preferably, the first diode is a fast recovery diode, and the second diode is a fast recovery diode.
[0022] Preferably, the side of the insulated gate bipolar transistor that contacts the first base island is the collector, the side of the first diode that contacts the first base island is the cathode, and the side of the second diode that contacts the second base island is the cathode.
[0023] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0024] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0025] Preferably, the insulated gate bipolar transistor is located between the first diode and the second diode.
[0026] Preferably, the first diode is located between the insulated gate bipolar transistor and the second diode.
[0027] Preferably, the power unit is a reverse-conducting insulated-gate bipolar transistor;
[0028] The first pin of the plurality of pins is connected to the gate of the reverse-conducting insulated-gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the reverse-conducting insulated-gate bipolar transistor; the third pin of the plurality of pins is electrically connected to the first base island and the collector of the reverse-conducting insulated-gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0029] Preferably, the third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the collector of the reverse-conducting insulated-gate bipolar transistor.
[0030] Preferably, the second diode is a fast recovery diode.
[0031] Preferably, the side of the reverse-conducting insulated-gate bipolar transistor that contacts the first base island is the collector, and the side of the second diode that contacts the second base island is the cathode.
[0032] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0033] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0034] Preferably, the power unit includes: a metal-oxide-semiconductor field-effect transistor or a high electron mobility transistor, wherein the metal-oxide-semiconductor field-effect transistor includes a gate, a source, and a drain, or the high electron mobility transistor includes a gate, a source, and a drain;
[0035] The first pin of the plurality of pins is connected to the gate; the second pin of the plurality of pins is connected to the source; the third pin of the plurality of pins is electrically connected to the first base island and the drain; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0036] Preferably, the third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the source of the metal-oxide-semiconductor field-effect transistor.
[0037] Preferably, the second diode is a fast recovery diode.
[0038] Preferably, the side of the metal-oxide-semiconductor field-effect transistor that contacts the first base island is the source, and the side of the second diode that contacts the second base island is the cathode.
[0039] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0040] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0041] Preferably, the molding compound has a through hole, which does not overlap with the first base island, the second base island, the fourth pad, or the support structure.
[0042] Preferably, the first pin, second pin, third pin, fourth pin, and fifth pin have the same width.
[0043] Preferably, the width of the encapsulated body is 15mm to 18mm.
[0044] Preferably, the center-to-center distance between the first pin and the second pin is 2mm to 4mm, the center-to-center distance between the second pin and the third pin is 4mm to 5mm, the center-to-center distance between the third pin and the fourth pin is 2mm to 4mm, and the center-to-center distance between the fourth pin and the fifth pin is 4mm to 5mm.
[0045] Preferably, the insulating substrate is a ceramic substrate.
[0046] Preferably, the length of the first pin, second pin, third pin, fourth pin, and fifth pin extending from the encapsulation body is 15mm to 25mm.
[0047] Preferably, the pads are welded to the second end of the support structure.
[0048] A lead frame for a sealed structure, comprising:
[0049] Connecting tendons;
[0050] Multiple pins, including pin 1, pin 2, pin 3, pin 4, and pin 5;
[0051] Fourth pad,
[0052] The support structure has a first end connected to the fourth pad and a second end connected to the connecting rib.
[0053] Multiple pins, a fourth pad, and a support structure are interconnected via reinforcing ribs.
[0054] Preferably, the encapsulated structure includes a power unit and a second diode. The power unit is an insulated-gate bipolar transistor and a first diode. The power unit is located on the first base island, and the second diode is located on the second base island.
[0055] The first pin of the multiple pins is connected to the gate of the insulated gate bipolar transistor;
[0056] The second pin of the plurality of pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin of the plurality of pins is electrically connected to the first base island, the cathode of the first diode and the collector of the insulated gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0057] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0058] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0059] Preferably, the encapsulated structure includes a power unit and a second diode. The power unit is a reverse-conducting insulated-gate bipolar transistor, located on the first base island, and the second diode is located on the second base island.
[0060] The first pin of the plurality of pins is connected to the gate of the reverse-conducting insulated-gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the reverse-conducting insulated-gate bipolar transistor; the third pin of the plurality of pins is electrically connected to the first base island and the collector of the reverse-conducting insulated-gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0061] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0062] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0063] Preferably, the encapsulated structure includes a power unit and a second diode. The power unit includes a metal-oxide-semiconductor field-effect transistor or a high electron mobility transistor. The metal-oxide-semiconductor field-effect transistor includes a gate, a source, and a drain. The high electron mobility transistor includes a gate, a source, and a drain. The power unit is located on a first base island, and the second diode is located on a second base island.
[0064] The first pin of the plurality of pins is connected to the gate; the second pin of the plurality of pins is connected to the source; the third pin of the plurality of pins is electrically connected to the first base island and the drain; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
[0065] Preferably, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.
[0066] Preferably, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
[0067] Preferably, the first pin, second pin, third pin, fourth pin, and fifth pin have the same width.
[0068] Preferably, the center-to-center distance between the first pin and the second pin is 2mm to 4mm, the center-to-center distance between the second pin and the third pin is 4mm to 5mm, the center-to-center distance between the third pin and the fourth pin is 2mm to 4mm, and the center-to-center distance between the fourth pin and the fifth pin is 4mm to 5mm.
[0069] Preferably, the fourth pad is welded to the second end of the support structure.
[0070] Preferably, multiple sealed lead frames are connected side by side.
[0071] The beneficial effects of this utility model are:
[0072] The sealing structure or lead frame provided by this utility model has a fourth solder pad welded to the second end of the support structure. The fourth solder pad and the support structure are independent of the first base island and the second base island. Because the second end of the support structure is connected and fixed to the side inside the plastic package, the insulating substrate is prevented from cracking during the screw tightening process, thus improving the performance of the sealing structure.
[0073] This invention encapsulates an insulated gate bipolar transistor and two diodes in the same plastic package, reducing the number of components, the area occupied on the circuit board, the number of assembly steps, and the assembly cost.
[0074] Furthermore, within the plastic package, the power unit and the second diode are independent of each other, giving the encapsulated structure electrostatic discharge (ESD) protection capability similar to that of the power unit and the second diode when packaged separately, effectively enhancing the reliability and stability of the product.
[0075] Furthermore, outside the encapsulated structure, the third and fourth pins are electrically connected, thereby making the anode of the second diode and the collector of the insulated-gate bipolar transistor and the cathode of the first diode electrically connected, without affecting the ESD protection capability of the insulated-gate bipolar transistor and the second diode inside the encapsulated structure.
[0076] Furthermore, outside the encapsulated structure, the third and fourth pins are electrically connected, thereby making the anode of the second diode and the drain of the metal-oxide-semiconductor field-effect transistor electrically connected, without affecting the ESD protection capability of the metal-oxide-semiconductor field-effect transistor and the second diode inside the encapsulated structure.
[0077] Furthermore, the first base island of the combined sealing structure is welded to the third pin through an extension, and the second base island is welded to the fifth pin through an extension. Both of these have mature processes and are easy to implement in industry.
[0078] Furthermore, the first base island is welded to the third pin, and the second base island is welded to the fifth base island, which can carry a larger current and thus improve the performance of the encapsulation structure.
[0079] Furthermore, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. This arrangement is reasonable and has good heat dissipation capabilities.
[0080] Furthermore, the metal-oxide-semiconductor field-effect transistor is located on the first base island, and the second diode is located on the second base island. The layout is reasonable and has good heat dissipation capabilities.
[0081] Furthermore, the center-to-center spacing between some pins is relatively large, which fully ensures the pressure resistance of the sealed structure, giving it a pressure resistance of over 650V.
[0082] Furthermore, the length, width, and spacing of each pin in this encapsulated structure can be adjusted within a certain range according to customer needs, giving the encapsulated structure great installation adaptability. Its manufacturing process is simple, low-cost, and easy to implement.
[0083] Furthermore, the encapsulated structure has an embedded insulating substrate, which avoids the need to attach an external insulating sheet or film to electrically isolate the power unit from the second diode, thus improving ease of use. Attached Figure Description
[0084] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings.
[0085] Figure 1The circuit diagrams of the encapsulation structures of the first and second embodiments of this utility model are shown.
[0086] Figure 2 This diagram shows a partial schematic of the sealing body region in the sealing structure of the first embodiment of the present invention;
[0087] Figure 3 This diagram shows a partial schematic of the sealing body region in the sealing structure of the second embodiment of the present invention;
[0088] Figure 4 This diagram shows a partial schematic of the encapsulation area in the sealing structure of the third embodiment of the present invention;
[0089] Figure 5 This diagram shows a partial schematic of the sealing body region in the sealing structure of the fourth embodiment of the present invention;
[0090] Figure 6 The front view diagrams of the first and third embodiments of the sealing structure of this utility model are shown;
[0091] Figure 7 The diagram shows a front view of the second and fourth embodiments of the sealing structure of this utility model.
[0092] Figure 8 The diagram shows a single lead frame of the first and third embodiments of this utility model.
[0093] Figure 9 A schematic diagram of a single lead frame is shown in the second and fourth embodiments of this utility model.
[0094] Figure 10 The diagram shows a plurality of lead frames in the first and third embodiments of the present invention.
[0095] Figure 11 Schematic diagrams of multiple lead frames are shown in the second and fourth embodiments of this utility model. Detailed Implementation
[0096] Various embodiments of the present invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.
[0097] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0098] Figure 1The circuit diagram of the encapsulated structure according to the first embodiment of the present invention is shown. The encapsulated structure includes a power unit composed of an insulated gate bipolar transistor 10 and a first diode 20 and a second diode 30. The first diode 20 and the second diode 30 are, for example, fast recovery diodes. They have five external connection terminals, namely a first pin 110, a second pin 120, a third pin 130, a fourth pin 140 and a fifth pin 150. The third pin 130 and the fourth pin 140 are electrically connected outside the encapsulated structure. The first pin 110 is connected to the gate G of the insulated gate bipolar transistor 10, the second pin 120 is connected to the emitter E of the insulated gate bipolar transistor 10 and the anode of the first diode 20, the third pin 130 is connected to the collector C of the insulated gate bipolar transistor and the cathode of the first diode 20, the fourth pin 140 is connected to the anode of the second diode 30, and the fifth pin 150 is connected to the cathode of the second diode 30.
[0099] In this encapsulated structure, the insulated-gate bipolar transistor 10 and the second diode 30 are independent within the plastic package. The third pin 130 and the fourth pin 140 are connected outside the plastic package by wiring on a circuit board (PCB). The insulated-gate bipolar transistor 10, the first diode 20, and the second diode 30 together achieve the boost function. The insulated-gate bipolar transistor 10 and the second diode 30 serve as power switching devices in the topology. The first diode 20 is connected in reverse parallel with the insulated-gate bipolar transistor 10 to provide protection and prevent reverse breakdown of the insulated-gate bipolar transistor 10.
[0100] In this circuit, the power unit can also be a metal-oxide-semiconductor field-effect transistor or a high electron mobility transistor. The metal-oxide-semiconductor field-effect transistor includes a gate, a source, and a drain, or the high electron mobility transistor includes a gate, a source, and a drain. The first pin 110 is connected to the gate G, the second pin 120 is connected to the source S, the third pin 130 is connected to the drain D, the fourth pin 140 is connected to the anode of the second diode 30, and the fifth pin 150 is connected to the cathode of the second diode 30.
[0101] Figure 2 This diagram shows a partial schematic of the sealing body area in the sealing structure of the first embodiment of the present invention. Figure 6 The front view diagrams of the first embodiment and the third embodiment of the sealing structure of this utility model are shown. Figure 8 This diagram shows a schematic of the lead frame of the sealing structure according to the first embodiment of the present invention. Figure 10A schematic diagram of multiple lead frames according to the first embodiment of this utility model is shown. To better illustrate the connection and positional relationship of the various parts in the sealing structure, the encapsulation body 6 of the sealing structure is rendered with perspective, and the outline of the encapsulation body 6 is marked with dotted lines. The encapsulated structure includes an insulating substrate 3, a first base island 1, a second base island 2, a power unit consisting of an insulated-gate bipolar transistor 10 and a first diode 20, a second diode 30, multiple pins, and a molding compound 6. The multiple pins include a first pin 110, a second pin 120, a third pin 130, a fourth pin 140, and a fifth pin 150. The first base island 1 and the second base island 2 are located on the first surface of the insulating substrate 3, for example, on the left and right sides of the insulating substrate 3, respectively, and are electrically isolated. The insulated-gate bipolar transistor 10 and the first diode 20 are located on the first base island 1, and the second diode 30 is located on the second base island 2. Thus, the insulated-gate bipolar transistor 10, the first diode 20, and the second diode 30 are electrically isolated from each other. That is, in the molding compound 6, the insulated-gate bipolar transistor 10 and the second diode 30 are independent of each other, so that the encapsulated structure has ESD protection capability similar to that of the insulated-gate bipolar transistor 10 and the second diode 30 individually packaged. This encapsulation structure employs a direct copper-clad ceramic substrate (DBC). The DBC substrate includes an insulating substrate 3 and a first base island 1, a second base island 2, a first pad 11, a second pad 12, and a third pad 21 located on the first surface of the insulating substrate 3. A notch 4, for example, arc-shaped, is provided in the upper region of the insulating substrate 3. The first base island 1 and the second base island 2 avoid the notch 4 in the upper region of the insulating substrate 3. Through holes matching the notch 4 can be formed on the molding compound 6 for fixing screws to pass through, thereby securing the encapsulation structure. Alternatively, heat dissipation can be achieved through the fixing screws. The insulating substrate 3 is, for example, a ceramic substrate. Through holes 5 are also provided on the left and right sides of the notch 4 on the first base island 1 and the second base island 2. These through holes 5, for example, penetrate the first base island 1 and the second base island 2 and include multiple through holes arranged in an array. By providing multiple through holes 5, the contact area between the first base island 1, the second base island 2, and the molding compound 6 can be increased, making the bond between the molding compound 6 and the entire DBC substrate more secure and enhancing heat dissipation.
[0102] An insulated-gate bipolar transistor 10 is located on the first base island 1, for example, on the right side of the area below the first base island 1, near the middle area of the molding compound 6. A first diode 20 is also located on the first base island 1, for example, on the left side of the insulated-gate bipolar transistor 10. The first base island 1 also includes an extension portion extending towards the lower side of the molding compound 6. The first base island 1 is soldered to a third pin 130 through this extension portion. The collector C on the back of the insulated-gate bipolar transistor 10 is electrically connected to the first base island 1 and is led out through the third pin 130 soldered to the first base island 1. To reduce the length and complexity of the bonding wires, a corresponding third diode is also provided inside the molding compound 6 near its lower side and near the first base island 1. A first pad 11 and a second pad 12 are provided. Specifically, the first pad 11 is located on the left side of the first base island 1, and the second pad 12 is located on the lower side of the first base island 1 and between the first pad 11 and the extension of the first base island 1. The gate G on the front side of the insulated gate bipolar transistor 10 is connected to the first pad 11 via a bonding wire, and the first pad 11 is soldered to the first pin 110. The emitter E on the front side of the insulated gate bipolar transistor 10 and the anode on the front side of the first diode 20 are connected to the second pad 12 via a bonding wire, and the second pad 12 is soldered to the second pin 120. The back side of the first diode 20 is mounted on the first base island 1, and the cathode on the back side of the first diode 20 is also electrically connected to the first base island 1. The second base island 2 also includes an extension portion extending to the lower side of the molding compound 6. The second base island 2 is soldered to the fifth pin 150 through this extension portion. The back side of the second diode 30 is mounted on the second base island 2. The cathode on the back side of the second diode 30 is electrically connected to the second base island 2 and led out through the fifth pin 150 soldered to the second base island 2. Similarly, a corresponding third pad 21 is also provided in the molding compound 6 near its lower side and near the second base island 2. Specifically, the third pad 21 is located on the lower side of the second base island 2 and between the extension portion of the first base island 1 and the extension portion of the second base island 2. The anode on the front side of the second diode 30 is connected to the third pad 21 through a bonding wire. The third pad 21 is soldered to the fourth pin.
[0103] Specifically, the insulated-gate bipolar transistor 10, the first diode 20, and the second diode 30 are bonded to their respective base islands, for example, using solder paste, solder, or sintered silver. After the bonding wires are connected, a molding compound 6 is finally formed to encapsulate the insulated-gate bipolar transistor 10, the first diode 20, the second diode 30, the first base island 1, the second base island 2, the insulating substrate 3, and the portion of the multiple pins. It is understood that, in addition to being electrically connected to each pin via bonding wires, the insulated-gate bipolar transistor 10, the first diode 20, and the second diode 30 can also be electrically connected to each pin via a metal clip.
[0104] The first pin 110, the second pin 120, the third pin 130, the fourth pin 140, and the fifth pin all extend from the lower side of the encapsulated body 6.
[0105] Furthermore, the first embodiment of this utility model also includes support structures 160 and 170, with the first end of the support structures 160 and 170 connected to the fourth solder pad 8.
[0106] The second end of the support structure is connected to the side of the molding compound 6, thereby preventing the copper-clad ceramic substrate from cracking and improving the performance of the encapsulation structure.
[0107] Furthermore, in the first embodiment of this utility model, the second ends of the support structures 160 and 170 are connected to the upper side inside the encapsulated body 6, and the upper and lower sides of the encapsulated body 6 are relatively parallel.
[0108] Figure 3 This diagram shows a partial schematic of the sealing body region in the sealing structure of the second embodiment of the present invention. Figure 7 This is a front view of the second embodiment of the sealing structure of this utility model. Figure 9 This diagram shows a schematic of the lead frame of the sealing structure according to the second embodiment of the present invention. Figure 11 A schematic diagram of multiple lead frames according to a second embodiment of the present invention is shown. Figure 3 As shown, the position of the support structure has been adjusted in this second embodiment, and the rest is similar to the first embodiment, so it will not be described again.
[0109] Specifically, the second ends of the support structures 160 and 170 are connected to the left and right sides inside the molding compound 6.
[0110] Figure 4 This diagram shows a partial schematic of the sealing body area in the sealing structure of the third embodiment of the present invention. Figure 6 This is a front view of the third embodiment of the sealing structure of this utility model. Figure 8 This diagram shows a schematic of the lead frame of the sealing structure according to the third embodiment of the present invention. Figure 10 A schematic diagram of multiple lead frames according to the fourth embodiment of this utility model is shown. Figure 4 As shown, in this third embodiment, the power unit has been adjusted and replaced with a MOSFET. The rest is similar to the first embodiment and will not be described again.
[0111] Specifically, in the encapsulated structure of the third embodiment of this utility model, the power unit is a separate MOSFET, eliminating the need for a first diode. The collector of the insulated-gate bipolar transistor is replaced with the drain of a metal-oxide-semiconductor field-effect transistor, the emitter of the insulated-gate bipolar transistor is replaced with the source of the metal-oxide-semiconductor field-effect transistor, and the gate of the insulated-gate bipolar transistor is replaced with the gate of the metal-oxide-semiconductor field-effect transistor.
[0112] Figure 5 This diagram shows a partial schematic of the sealing body region in the sealing structure of the fourth embodiment of the present invention. Figure 7 Figure 9 shows a front view of the fourth embodiment of the sealing structure of this utility model, and Figure 10 shows a schematic diagram of the lead frame of the sealing structure of the fourth embodiment of this utility model. Figure 4 , Figure 11 A schematic diagram of multiple lead frames according to the fourth embodiment of the present invention is shown. In this fourth embodiment, the power unit is adjusted and replaced with a MOSFET. The rest is similar to the second embodiment and will not be described again.
[0113] Specifically, in the encapsulated structure of the third and fourth embodiments of this utility model, the power unit is a separate MOSFET, eliminating the need for a first diode. The collector of the insulated-gate bipolar transistor is replaced with the drain of a metal-oxide-semiconductor field-effect transistor, the emitter of the insulated-gate bipolar transistor is replaced with the source of the metal-oxide-semiconductor field-effect transistor, and the gate of the insulated-gate bipolar transistor is replaced with the gate of the metal-oxide-semiconductor field-effect transistor.
[0114] like Figure 6 and Figure 7 As shown, the first pin 110, the second pin 120, the third pin 130, the fourth pin 140 and the fifth pin 150 of this utility model have the same width.
[0115] like Figure 6 and Figure 7 As shown, the width D4 of the plastic seal of this utility model is 15mm~18mm.
[0116] The center-to-center distance D3 between the first pin 110 and the second pin 120 is 2mm to 4mm, the center-to-center distance D1 between the second pin 120 and the third pin 130 is 4mm to 5mm, the center-to-center distance D2 between the third pin 130 and the fourth pin 140 is 2mm to 4mm, and the center-to-center distance D1 between the fourth pin 140 and the fifth pin 150 is 4mm to 5mm.
[0117] Furthermore, the copper-clad ceramic substrate of this embodiment also includes a heat sink, which is located on the second surface of the insulating substrate 3 (not visible in the figure). The heat sink is made of copper and protrudes from the molding compound 6. The second surface is opposite to the first surface.
[0118] It is understood that the encapsulation structure in the first, second, third, and fourth embodiments can also be realized by mirroring, that is, the second base island 2 is located on the left side and the first base island 1 is located on the right side. Correspondingly, the fifth pin 150, the fourth pin 140, the third pin 130, the second pin 120, and the first pin 110 are arranged sequentially from left to right along the lower side of the encapsulation body 6.
[0119] The encapsulation structure provided by this utility model encapsulates an insulated gate bipolar transistor and two diodes in the same plastic package, reducing the number of components, the area occupied on the circuit board, the assembly steps, and the assembly cost.
[0120] Furthermore, within the plastic encapsulation, the insulated-gate bipolar transistor and the second diode are independent of each other, giving the encapsulated structure electrostatic discharge (ESD) protection capability similar to that of the insulated-gate bipolar transistor and the second diode when packaged separately, effectively enhancing the reliability and stability of the product.
[0121] Furthermore, outside the encapsulated structure, the third and fourth pins are electrically connected, thereby making the anode of the second diode and the collector of the insulated-gate bipolar transistor and the cathode of the first diode electrically connected, without affecting the ESD protection capability of the insulated-gate bipolar transistor and the second diode inside the encapsulated structure.
[0122] Furthermore, the first base island of this encapsulated structure is welded to the third pin via an extension, and the second base island is welded to the fifth pin via an extension. The chip (insulated gate bipolar transistor, diode) and the pin are connected by bonding wires. All of these have mature processes and are easy to implement in the industry.
[0123] Furthermore, the first base island is welded to the third pin, and the second base island is welded to the fifth base island, which can carry a larger current and thus improve the performance of the encapsulation structure.
[0124] Furthermore, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. This arrangement is reasonable and has good heat dissipation capabilities.
[0125] Furthermore, the center-to-center spacing between some pins is relatively large, which fully ensures the pressure resistance of the sealed structure, giving it a pressure resistance of over 650V.
[0126] Furthermore, the length, width, and spacing of each pin in this encapsulated structure can be adjusted within a certain range according to customer needs, giving the encapsulated structure great installation adaptability. Its manufacturing process is simple, low-cost, and easy to implement.
[0127] Furthermore, the encapsulated structure has an embedded insulating substrate, which avoids the need to attach external insulating sheets or films to electrically isolate the insulated gate bipolar transistor, the first diode, and the second diode, thus improving ease of use.
[0128] Furthermore, the fourth pad is welded to the second end of the support structure, thereby fixing the ceramic substrate with copper plating. This prevents the copper-plated ceramic substrate from cracking due to stress during the customer's screw-tightening process, thus improving the performance of the encapsulation structure.
[0129] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.
[0130] The embodiments of this utility model described above are examples of specific examples, and do not exhaustively describe all details, nor do they limit the utility model to only specific embodiments. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this utility model, thereby enabling those skilled in the art to make good use of this utility model and its modifications. This utility model is limited only by the claims and their full scope and equivalents.
Claims
1. A hermetic structure, characterized by, include: Insulating substrate; The first base island is located on the first surface of the insulating substrate; The second base island is located on the first surface of the insulating substrate. A power unit, the power unit being located on the first base island; The second diode is located on the second base island; Multiple pins, including a first pin, a second pin, a third pin, a fourth pin, and a fifth pin; A molding compound that encapsulates the first base island, the second base island, the power unit, the second diode, and portions of the first pin, the second pin, the third pin, the fourth pin, and the fifth pin. The first base island and the second base island are disposed on the left and right sides of the insulating substrate, and the plurality of pins extend from the lower side of the encapsulation body below the first base island and the second base island; The fourth pad is located on the first surface of the insulating substrate, and the fourth pad is independent of the first base island and the second base island; A support structure, wherein a first end of the support structure is connected to the fourth pad, and a second end of the support structure is connected to the side of the molding compound.
2. The hermetic structure of claim 1, wherein, The second end of the support structure is connected to the left and right sides inside the plastic encapsulation body.
3. The hermetic structure of claim 1, wherein, The second end of the support structure is connected to the upper side of the interior of the molding compound, and the upper and lower sides of the molding compound are relatively parallel.
4. The hermetic structure of claim 1, wherein, The power unit is an insulated-gate bipolar transistor and a first diode; The first pin of the plurality of pins is connected to the gate of the insulated gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin of the plurality of pins is electrically connected to the first base island, the cathode of the first diode, and the collector of the insulated gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
5. The hermetic structure of claim 4, wherein, The third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the collector of the insulated gate bipolar transistor and the cathode of the first diode.
6. The hermetic structure of claim 4, wherein, The first diode is a fast recovery diode, and the second diode is a fast recovery diode.
7. The hermetic structure of claim 4, wherein, The side of the insulated gate bipolar transistor that contacts the first base island is the collector, the side of the first diode that contacts the first base island is the cathode, and the side of the second diode that contacts the second base island is the cathode.
8. The hermetic structure of claim 4, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
9. The hermetic structure of claim 4, wherein, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
10. The hermetic structure of claim 4, wherein, The insulated gate bipolar transistor is located between the first diode and the second diode.
11. The hermetic structure of claim 4, wherein, The first diode is located between the insulated gate bipolar transistor and the second diode.
12. The hermetic structure of claim 1, wherein, The power unit is a reverse-conducting insulated-gate bipolar transistor; The first pin of the plurality of pins is connected to the gate of the reverse-conducting insulated-gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the reverse-conducting insulated-gate bipolar transistor; the third pin of the plurality of pins is electrically connected to the first base island and the collector of the reverse-conducting insulated-gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
13. The hermetic structure of claim 12, wherein, The third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the collector of the reverse-conducting insulated-gate bipolar transistor.
14. The hermetic structure of claim 12, wherein, The second diode is a fast recovery diode.
15. The hermetic structure of claim 12, wherein, The side of the reverse-conducting insulated-gate bipolar transistor that contacts the first base island is the collector, and the side of the second diode that contacts the second base island is the cathode.
16. The hermetic structure of claim 12, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
17. The hermetic structure of claim 12, wherein, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
18. The sealing structure according to claim 1, characterized in that, The power unit includes a metal-oxide-semiconductor field-effect transistor or a high electron mobility transistor, wherein the metal-oxide-semiconductor field-effect transistor includes a gate, a source, and a drain, or the high electron mobility transistor includes a gate, a source, and a drain; The first pin of the plurality of pins is connected to the gate; the second pin of the plurality of pins is connected to the source; the third pin of the plurality of pins is electrically connected to the first base island and the drain; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
19. The hermetic structure of claim 18, wherein, The third and fourth pins are electrically connected through a conductive structure outside the encapsulation structure, so that the anode of the second diode is electrically connected to the source of the metal-oxide-semiconductor field-effect transistor.
20. The hermetic structure of claim 18, wherein The second diode is a fast recovery diode.
21. The hermetic structure of claim 18, wherein, The side of the metal-oxide-semiconductor field-effect transistor that contacts the first base island is the source, and the side of the second diode that contacts the second base island is the cathode.
22. The hermetic structure of claim 18, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
23. The hermetic structure of claim 18, wherein, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
24. The hermetic structure of claim 1, wherein, The molding compound has a through hole, which does not overlap with the first base island, the second base island, the fourth pad, or the support structure.
25. The hermetic structure of claim 1, wherein, The first pin, the second pin, the third pin, the fourth pin, and the fifth pin have the same width.
26. The hermetic structure of claim 1, wherein, The width of the encapsulated body is 15mm to 18mm.
27. The sealing structure according to claim 1, characterized in that, The center-to-center distance between the first pin and the second pin is 2mm~4mm, the center-to-center distance between the second pin and the third pin is 4mm~5mm, the center-to-center distance between the third pin and the fourth pin is 2mm~4mm, and the center-to-center distance between the fourth pin and the fifth pin is 4mm~5mm.
28. The sealing structure according to claim 1, characterized in that, The insulating substrate is a ceramic substrate.
29. The hermetic structure of claim 1, wherein, The first pin, the second pin, the third pin, the fourth pin, and the fifth pin extend from the encapsulation body by a length of 15mm to 25mm.
30. The hermetic structure of claim 1, wherein, The pad is welded to the first end of the support structure.
31. A leadframe for a hermetically sealed structure, characterized by, include: Connecting tendons; Multiple pins, including a first pin, a second pin, a third pin, a fourth pin, and a fifth pin; Fourth pad, A support structure, wherein a first end of the support structure is connected to the fourth pad, and a second end of the support structure is connected to the connecting rib; The plurality of pins, the fourth pad, and the support structure are interconnected by the connecting ribs.
32. The leadframe of claim 31, wherein, The encapsulation structure includes a power unit and a second diode. The power unit is an insulated gate bipolar transistor and a first diode. The power unit is located on a first base island, and the second diode is located on a second base island. The first of the plurality of pins is connected to the gate of the insulated gate bipolar transistor; The second pin of the plurality of pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin of the plurality of pins is electrically connected to the first base island, the cathode of the first diode and the collector of the insulated gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
33. The leadframe of claim 32, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
34. The leadframe of claim 32, wherein, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
35. The leadframe of claim 31, wherein, The encapsulated structure includes a power unit and a second diode. The power unit is a reverse-conducting insulated-gate bipolar transistor, located on a first base island, and the second diode is located on a second base island. The first pin of the plurality of pins is connected to the gate of the reverse-conducting insulated-gate bipolar transistor; the second pin of the plurality of pins is connected to the emitter of the reverse-conducting insulated-gate bipolar transistor; the third pin of the plurality of pins is electrically connected to the first base island and the collector of the reverse-conducting insulated-gate bipolar transistor; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
36. The leadframe of claim 35, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
37. The lead frame according to claim 36, characterized in that, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
38. The leadframe of claim 31, wherein, The encapsulated structure includes a power unit and a second diode. The power unit includes a metal-oxide-semiconductor field-effect transistor or a high electron mobility transistor. The metal-oxide-semiconductor field-effect transistor includes a gate, a source, and a drain. The high electron mobility transistor includes a gate, a source, and a drain. The power unit is located on a first base island, and the second diode is located on a second base island. The first pin of the plurality of pins is connected to the gate; the second pin of the plurality of pins is connected to the source; the third pin of the plurality of pins is electrically connected to the first base island and the drain; the fourth pin of the plurality of pins is electrically connected to the anode of the second diode; and the fifth pin of the plurality of pins is electrically connected to the second base island and the cathode of the second diode.
39. The leadframe of claim 38, wherein, The third pin is welded to the first base island, and the fifth pin is welded to the second base island.
40. The leadframe of claim 38, wherein, The first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.
41. The leadframe of claim 31, wherein, The first pin, the second pin, the third pin, the fourth pin, and the fifth pin have the same width.
42. The leadframe of claim 31, wherein, The center-to-center distance between the first pin and the second pin is 2mm~4mm, the center-to-center distance between the second pin and the third pin is 4mm~5mm, the center-to-center distance between the third pin and the fourth pin is 2mm~4mm, and the center-to-center distance between the fourth pin and the fifth pin is 4mm~5mm.
43. The leadframe of claim 31, wherein, The fourth pad is welded to the supporting structure.
44. The leadframe of claim 31, wherein, Multiple lead frames with encapsulated structures are connected side by side.