A charger achieving high power

Abstract

The utility model provides a kind of charger for realizing high power belongs to charging technical field, including, single-phase full-bridge rectifier main circuit, for converting AC input into DC output, sampling conditioning circuit, the voltage division, filtering, isolation processing to the DC voltage after rectification and input AC voltage, output the sampling signal that meets adder and voltage controller level requirement, voltage controller, receives the voltage error signal generated by adder.According to the fixed conduction time of high-frequency switch tube in rectifier, the energy storage inductance is applied to the principle of volt-second balance, the turn-off time of high-frequency switch tube corresponding to different time is calculated, so that the current on the energy storage inductance always works in critical continuous mode, without adding extra current zero-crossing detection circuit, the circuit complexity is reduced, the reliability is improved, only a separate voltage controller is needed, to realize the high power factor of rectifier net side.

Description

Technical Field

[0001] This utility model belongs to the field of charging technology, specifically relating to a charger that achieves high power. Background Technology

[0002] Power factor correction (PFC) can effectively reduce grid-side current harmonic distortion and reactive power, and reduce harmonic pollution to the power grid. It is often used in the front-end rectifier circuit of power supply design.

[0003] Power factor correction (PFC) based on Boost circuits can be categorized into three modes based on the continuity of the current in the energy storage inductor: Discontinuous Conduction Mode (DCM), Continuous Conduction Mode (CCM), and Critical Conduction Mode (CRM). DCM has a simple control structure and is easy to implement, but at the same power output, it suffers from higher turn-off losses and lower circuit efficiency, making it difficult to further improve the grid-side PFC. Therefore, it is suitable for applications with high cost and low power requirements. Continuous Conduction Mode typically employs an average current control scheme. At the same output power, it results in lower peak and effective current values, higher circuit efficiency, and a higher PFC. However, average current control is not only costly but also unfavorable for achieving high power density. Critical Conduction Mode is commonly used in medium-to-high frequency applications due to its ease of soft-switching, and it offers higher efficiency. However, to achieve critical continuous inductor current operation, an external zero-crossing detection circuit is required, which undoubtedly increases cost and reduces reliability. Utility Model Content

[0004] The purpose of this invention is to provide a charger that achieves high power, thereby addressing the problems raised in the background art.

[0005] A charger for achieving high power includes,

[0006] A single-phase full-bridge rectifier main circuit is used to convert AC input to DC output.

[0007] The sampling and conditioning circuit performs voltage division, filtering, and isolation processing on the rectified DC voltage and the input AC voltage, and outputs a sampling signal that meets the level requirements of the adder and voltage controller.

[0008] The voltage controller receives the voltage error signal generated by the adder.

[0009] The CRM generator receives the on-time signal from the voltage controller and generates the high-frequency pulse control signal required for the Critical Continuous Mode (CRM) through internal logic to achieve soft switching and power factor correction. The CRM generator includes an off-time calculator and a PFM modulator.

[0010] The drive circuit converts the pulse control signal into a drive signal to control the switching transistors Q1 and Q2;

[0011] The single-phase full-bridge rectifier main circuit is electrically connected to the sampling and conditioning circuit. The sampling and conditioning circuit is connected to the voltage controller via an adder signal. The voltage controller is connected to the turn-off time calculator via an adder signal. The voltage controller is connected to the PFM modulator via an adder signal. The turn-off time calculator is connected to the PFM modulator via an adder signal. The PFM modulator is connected to the drive circuit via an adder signal. The drive circuit is connected to the single-phase full-bridge rectifier main circuit via an adder signal.

[0012] An interleaved parallel Boost PFC circuit is connected to the output terminal of the single-phase full-bridge rectifier main circuit. The interleaved parallel Boost PFC circuit includes two Boost circuits, A and B, connected in parallel.

[0013] The A-phase Boost circuit includes a boost inductor L1, a switching transistor Q1, and a diode D1.

[0014] The B-phase Boost circuit includes a boost inductor L2, a switching transistor Q2, and a diode D2;

[0015] Furthermore, the turn-off time calculator calculates the turn-off time based on the on-time signal output by the voltage controller.

[0016] Furthermore, the PFM modulator receives the on-time signal, the off-time signal, and the switching cycle signal obtained by adding the two together, and generates a pulse control signal.

[0017] Furthermore, in the Boost circuit where phases A and B are connected in parallel:

[0018] The turn-on time of switch Q2 lags behind that of switch Q1 by half a switching cycle, causing the two-phase inductor currents iL1 and iL2 to alternate by 180°, thereby reducing input current ripple.

[0019] Furthermore, it also includes:

[0020] The voltage loop PI regulator has a multiplier connected to its output terminal, which multiplies the bus voltage error signal by the absolute value of the input voltage.

[0021] The current loop PI regulator receives the error signal between the inductor current reference value (iL_ref) output by the multiplier and the actual inductor current value (iL), and the output is connected to the PWM comparator.

[0022] Furthermore, the interleaved parallel Boost PFC circuit has four operating modes:

[0023] Mode 1: Q1 and Q2 are turned on simultaneously, and the inductor currents iL1 and iL2 increase;

[0024] Mode 2: Q1 is off, Q2 is on, iL1 decreases, iL2 increases;

[0025] Mode 3: Q1 is on, Q2 is off, iL1 increases, iL2 decreases;

[0026] Mode 4: Q1 and Q2 are turned off simultaneously, iL1 and iL2 decrease, and the bus capacitor (Cbus) stores energy.

[0027] Compared with the prior art, the beneficial effects of this utility model are:

[0028] For the PFC circuit described in this paper, based on the fixed on-time of the high-frequency switching transistor in the rectifier, the volt-second balance principle is applied to the energy storage inductor to calculate the off-time of the high-frequency switching transistor at different times. This ensures that the current on the energy storage inductor always operates in the critical continuous mode, eliminating the need for an additional current zero-crossing detection circuit, thus reducing circuit complexity and improving reliability. A single voltage controller is sufficient to achieve a high power factor on the rectifier grid side, exhibiting simple control structure, fast response speed, and easy stabilization. The algorithm can be implemented using a low-cost digital control chip, thus offering high cost-effectiveness. Attached Figure Description

[0029] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0030] Figure 1 This is a schematic diagram of the overall connection of this utility model;

[0031] Figure 2 This is a schematic diagram of the single-phase interleaved Boost PFC circuit of this utility model;

[0032] Figure 3 This is a schematic diagram of the interleaved parallel Boost PFC circuit mode 1 of this utility model;

[0033] Figure 4 This is a schematic diagram of the interleaved parallel Boost PFC circuit mode 2 of this utility model;

[0034] Figure 5 This is a schematic diagram of the interleaved parallel Boost PFC circuit mode 3 of this utility model;

[0035] Figure 6 This is a schematic diagram of mode 4 of the interleaved parallel Boost PFC circuit of this utility model.

[0036] In the diagram: 1. Single-phase full-bridge rectifier main circuit; 2. Sampling and conditioning circuit; 3. Voltage controller; 4. CRM generator; 5. Drive circuit; 6. Turn-off time calculator; 7. PFM modulator. Detailed Implementation

[0037] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0038] In the description of this utility model, it should be noted that the terms "upper," "lower," "inner," "outer," "top / bottom," etc., indicating the orientation or positional relationship are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this utility model. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0039] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "sleeved / connected," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0040] Please see Figure 1-6 The technical solution provided in this embodiment is as follows:

[0041] A charger for achieving high power includes,

[0042] The single-phase full-bridge rectifier main circuit 1 is used to convert AC input voltage into DC output, and its output terminal is connected to an interleaved parallel Boost PFC circuit.

[0043] The interleaved parallel Boost PFC circuit consists of two Boost circuits, A and B, connected in parallel:

[0044] Phase A consists of boost inductor L1, switching transistor Q1, and diode D1.

[0045] Phase B consists of boost inductor L2, switching transistor Q2, and diode D2.

[0046] The conduction time of switch Q2 lags behind that of switch Q1 by half a switching cycle, causing the inductor currents iL1 and iL2 to alternate by 180°, thus reducing the input current ripple.

[0047] The sampling conditioning circuit 2 performs voltage division, filtering, and isolation processing on the rectified DC bus voltage Vbus and the input AC voltage, and outputs a sampling signal that meets the level requirements of the adder and voltage controller 3.

[0048] Voltage controller 3, voltage loop PI regulator: receives the error signal between the bus voltage setpoint Vbus_ref and the actual bus voltage value Vbus, and its output is connected to a multiplier. The multiplier multiplies the output of the voltage loop PI regulator with the absolute value of the input voltage to generate the inductor current reference value iL_ref. Current loop PI regulator: receives the error signal between iL_ref and the actual inductor current value iL, and its output is connected to a PWM comparator.

[0049] The constant on-time CRM generator 4 receives the on-time signal output by the voltage controller 3 and includes: an off-time calculator 6, which calculates the off-time based on the on-time signal; and a PFM modulator 7, which receives the on-time signal, the off-time signal, and the switching cycle signal obtained by adding the two together, and generates a pulse control signal.

[0050] The drive circuit 5 converts the pulse control signal output by the PFM modulator 7 into a drive signal to control the on / off state of the switching transistors Q1 and Q2.

[0051] Operating modes: The circuit operates in the critical continuous mode of inductor current. There are four modes, such as... Figure 3-6 As shown:

[0052] Mode 1: Switch Q1 and switch Q2 are turned on at the same time, the inductor currents iL1 and iL2 rise, and the bus capacitor Cbus supplies power to the load;

[0053] Mode 2: Switch Q1 is off, switch Q2 is on, inductor current iL1 decreases, and inductor current iL2 increases;

[0054] Mode 3: Switch Q1 is turned on and switch Q2 is turned off, inductor current iL1 increases and inductor current iL2 decreases;

[0055] Mode 4: Switches Q1 and Q2 are turned off simultaneously, inductor currents iL1 and iL2 decrease, and the bus capacitor (Cbus) stores energy.

[0056] Working principle:

[0057] Step 1: Signal Sampling and Conditioning

[0058] The sampling conditioning circuit 2 performs voltage division, filtering, and isolation processing on the DC bus voltage Vbus output by the single-phase full-bridge rectifier main circuit 1 and the input AC voltage to generate a sampling signal that meets the level requirements of the adder and voltage controller 3.

[0059] Step 2: Voltage Error Generation

[0060] The rectifier output voltage sampling signal and the given reference voltage Vbus_ref are fed into an adder to generate a voltage error signal.

[0061] Step 3: Voltage Control and On-Time Generation

[0062] The voltage error signal is input to voltage controller 3, and after calculation by the voltage loop PI regulator, it outputs a signal. This output signal is multiplied by the absolute value of the input voltage to generate an inductor current reference value iL_ref. The error signal, iL_ref minus the actual inductor current value iL, is sent to the current loop PI regulator, which finally outputs the conduction time signal.

[0063] Step 4: Constant On-Time CRM Generator 4 Operation

[0064] The conduction time signal is transmitted in three paths:

[0065] The first input is the off-time calculator 6, which calculates the off-time signal using the volt-second balance principle;

[0066] The second signal, along with the turn-off time signal, is fed into the adder to generate the switching cycle signal.

[0067] The third signal, along with the off-time signal and the switching cycle signal, is input to the PFM modulator 7.

[0068] PFM modulator 7 integrates three signals to generate a pulse control signal.

[0069] Step 5: Drive and Switch Control

[0070] The pulse control signal is converted into a drive signal by drive circuit 5:

[0071] Control the on / off state of switching transistors Q1 and Q2;

[0072] The conduction time of switch Q2 always lags behind that of switch Q1 by half a switching cycle, causing the currents of boost inductor L1 and boost inductor L2 to alternate by 180 degrees.

[0073] Step Six: Switching Circuit Operating Modes

[0074] Based on the state of the switching transistor, the circuit cycles through four modes:

[0075] Mode 1: Switch Q1 and switch Q2 are turned on at the same time, the inductor currents iL1 and iL2 rise, and the bus capacitor Cbus supplies power to the load;

[0076] Mode 2: Switch Q1 is turned off and switch Q2 is turned on, inductor current iL1 decreases and inductor current iL2 increases;

[0077] Mode 3: Switch Q1 is turned on and switch Q2 is turned off, inductor current iL1 increases and inductor current iL2 decreases;

[0078] Mode 4: Switches Q1 and Q2 are turned off simultaneously, inductor currents iL1 and iL2 decrease, and bus capacitor Cbus stores energy.

[0079] Step 7: Closed-loop voltage regulation

[0080] When the bus voltage Vbus rises, the output of the voltage loop PI regulator decreases, which causes the inductor current reference value iL_ref to decrease, the PWM duty cycle to decrease, the actual inductor current to decrease, the input bus energy to decrease, and Vbus to fall back to the set value.

[0081] When the bus voltage Vbus drops, a reverse regulation process is executed.

[0082] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the utility model. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. A charger that achieves high power, characterized in that, include, A single-phase full-bridge rectifier main circuit (1) is used to convert AC input into DC output; The sampling conditioning circuit (2) performs voltage division, filtering and isolation processing on the rectified DC voltage and the input AC voltage, and outputs a sampling signal that meets the level requirements of the adder and voltage controller (3). Voltage controller (3) receives the voltage error signal generated by the adder; The CRM generator (4) receives the on-time signal given by the voltage controller and generates the high-frequency pulse control signal required for the critical continuous mode (CRM) through internal logic to realize soft switching and power factor correction. The CRM generator (4) includes an off-time calculator (6) and a PFM modulator (7). The driving circuit (5) converts the pulse control signal into a driving signal to control the switching transistors Q1 and Q2; The single-phase full-bridge rectifier main circuit (1) is electrically connected to the sampling and conditioning circuit (2). The sampling and conditioning circuit (2) is connected to the voltage controller (3) via an adder signal. The voltage controller (3) is connected to the turn-off time calculator (6) via a signal. The voltage controller (3) is connected to the PFM modulator (7) via an adder signal. The turn-off time calculator (6) is connected to the PFM modulator (7) via an adder signal. The PFM modulator (7) is connected to the drive circuit (5) via a signal. The drive circuit (5) is connected to the single-phase full-bridge rectifier main circuit (1) via a signal. An interleaved parallel Boost PFC circuit is connected to the output terminal of the single-phase full-bridge rectifier main circuit (1). The interleaved parallel Boost PFC circuit includes two Boost circuits connected in parallel, A and B phases. The A-phase Boost circuit includes a boost inductor L1, a switching transistor Q1, and a diode D1; The B-phase Boost circuit includes a boost inductor L2, a switching transistor Q2, and a diode D2.

2. A charger for achieving high power according to claim 1, characterized in that, The turn-off time calculator (6) calculates the turn-off time based on the on-time signal output by the voltage controller.

3. A charger for achieving high power according to claim 1, characterized in that, The PFM modulator (7) receives the on-time signal, the off-time signal, and the switching cycle signal obtained by adding the two together, and generates a pulse control signal.

4. A charger for achieving high power according to claim 1, characterized in that, In the Boost circuit where phases A and B are connected in parallel: The turn-on time of switch Q2 lags behind that of switch Q1 by half a switching cycle, causing the two-phase inductor currents iL1 and iL2 to alternate by 180°, thereby reducing input current ripple.

5. A charger for achieving high power according to claim 1, characterized in that, Also includes: The voltage loop PI regulator has a multiplier connected to its output terminal, which multiplies the bus voltage error signal by the absolute value of the input voltage. The current loop PI regulator receives the error signal between the inductor current reference value (iL_ref) output by the multiplier and the actual inductor current value (iL), and the output is connected to the PWM comparator.

6. A charger for achieving high power according to claim 1, characterized in that, The interleaved parallel BoostPFC circuit has four operating modes: Mode 1: Q1 and Q2 are turned on simultaneously, and the inductor currents iL1 and iL2 increase; Mode 2: Q1 is off, Q2 is on, iL1 decreases, iL2 increases; Mode 3: Q1 is on, Q2 is off, iL1 increases, iL2 decreases; Mode 4: Q1 and Q2 are turned off simultaneously, iL1 and iL2 decrease, and the bus capacitor (Cbus) stores energy.

Images