Digital generator rotation speed acquisition circuit

Abstract

The utility model discloses a kind of digital generator rotating speed acquisition circuits, including first phase wire end, second phase wire end;Unidirectional current-limiting unit, its input end is connected in first phase wire end;Voltage division filter unit, two ends are connected in unidirectional current-limiting unit output end and second phase wire end respectively;RC filter unit, its input end is connected in the common end of unidirectional current-limiting unit and voltage division filter unit by reverse intercepting unit;Signal receiving unit, RC filter unit output end connects signal receiving unit, provides signal input voltage for signal receiving unit;Fast discharge unit, with controlled end, input end and output end, controlled end is connected in the common end of unidirectional current-limiting unit and voltage division filter unit, input end is connected in RC filter unit, output end is connected in second phase wire end, for when first phase wire end reduces to preset state signal input voltage is reduced to close second phase wire end voltage quickly.Effect such as with ability to reduce power consumption improve anti-interference ability.

Description

Technical Field

[0001] This utility model belongs to the field of engine speed acquisition technology, and in particular relates to a digital generator speed acquisition circuit. Background Technology

[0002] In the field of existing digital generator speed acquisition technology, an accurate, stable, and interference-resistant speed acquisition circuit is of vital importance for generator performance monitoring, control, and protection.

[0003] Currently, the speed acquisition of digital generators mainly relies on sensors. However, this method requires the installation of sensors, which not only increases the cost and complexity of the system, but may also lead to more points of failure and reduce the overall reliability of the system.

[0004] In response, speed detection circuits based on phase voltage acquisition have been proposed, which can avoid the use of additional sensors. However, when processing phase voltage signals, these circuits do not fully consider how to effectively filter out interference signals, making them susceptible to external electromagnetic interference, internal motor noise, and other factors. This can lead to errors or false triggering in the acquired speed signals, affecting the normal control and protection functions of the generator. Utility Model Content

[0005] The purpose of this invention is to address the above-mentioned problems by providing a digital generator speed acquisition circuit.

[0006] A digital generator speed acquisition circuit includes a first phase line terminal, a second phase line terminal, and a unidirectional current limiting unit, the input terminal of which is connected to the first phase line terminal for unidirectional conduction and current limiting of the input voltage.

[0007] The voltage divider filter unit has one end connected to the common terminal of the unidirectional current limiting unit and the fast discharge unit, and the other end connected to the second phase line terminal.

[0008] The input terminal of the RC filter unit is connected to the common terminal of the unidirectional current limiting unit and the voltage divider filter unit through a reverse cut-off unit, so as to cut off the current path from the RC filter unit to the voltage divider filter unit.

[0009] The output of the RC filter unit is connected to the signal receiving unit to provide the signal input voltage to the signal receiving unit.

[0010] The fast discharge unit has a controlled terminal, an input terminal, and an output terminal. The controlled terminal is connected to the common terminal of the unidirectional current limiting unit and the voltage divider filter unit. The input terminal is connected to the common terminal of the RC filter unit and the reverse cutoff unit. The output terminal is connected to the second phase line terminal. It is used to quickly reduce the signal input voltage to near the voltage of the second phase line terminal when the voltage of the first phase line terminal drops to a preset state.

[0011] In the aforementioned digital generator speed acquisition circuit, the first phase line terminal is used to connect to the first phase line of the three-phase main winding of the digital generator.

[0012] The second phase wire is used to connect to the second phase wire of the three-phase main winding of the digital generator;

[0013] With the ground as a reference point, the voltage phase difference between the first phase line and the second phase line is 120 degrees.

[0014] For a conventional digital generator, the voltage phase difference between the U-phase line and the V-phase line is 120 degrees, and the voltage phase difference between the V-phase line and the W-phase line is also 120 degrees. Any two phases can be connected to the first and second phase lines.

[0015] In the aforementioned digital generator speed acquisition circuit, the signal receiving unit includes an optocoupler OC1. When the voltage at the first phase line terminal rises to the point that the signal input voltage exceeds the optocoupler conduction threshold of the optocoupler OC1, the optocoupler OC1 is triggered.

[0016] When the voltage at the first phase line terminal drops to a level that causes the signal input voltage to fall below the conduction threshold of optocoupler OC1, optocoupler OC1 is turned off. Almost simultaneously, the fast discharge unit is turned on, and the signal input voltage is rapidly pulled down to a level close to the voltage at the second phase line terminal.

[0017] In the aforementioned digital generator speed acquisition circuit, the output of the RC filter unit is connected to the input side of the optocoupler to provide a signal input voltage for the optocoupler OC1.

[0018] The output side of the optocoupler is used to connect to the MCU module.

[0019] In the aforementioned digital generator speed acquisition circuit, the unidirectional current limiting unit includes diodes D1 connected in series and a resistor combination composed of several current limiting resistors.

[0020] The anode of the diode D1 faces the first phase line terminal, and the cathode faces away from the first phase line terminal, in order to suppress negative half-cycle interference.

[0021] In the digital generator speed acquisition circuit described above, the resistor combination includes resistors R1, R2, and R3 connected in series.

[0022] The anode of diode D1 is connected to the first phase line terminal, and the cathode is connected to the resistor assembly.

[0023] In the aforementioned digital generator speed acquisition circuit, the voltage divider filter unit includes a resistor R4 and a capacitor C1 connected in parallel. One common terminal of the resistor R4 and the capacitor C1 is connected to the unidirectional current limiting unit and the fast discharge unit, and the other common terminal is connected to the second phase line terminal.

[0024] The voltage divider filter unit and the unidirectional current limiting unit form a voltage divider network, so that OC1 only conducts when the voltage at the first phase line terminal exceeds the preset value.

[0025] In the aforementioned digital generator speed acquisition circuit, the fast discharge unit includes a PNP transistor Q1. The base of transistor Q1 is connected to the common terminal of resistor R4 and capacitor C1, the emitter is connected to the input terminal of the RC filter unit, and the collector is connected to the second phase line terminal. When the base voltage drops to the transistor turn-on threshold of transistor Q1, transistor Q1 turns on, thereby rapidly reducing the signal input voltage to near the voltage of the second phase line terminal.

[0026] In the aforementioned digital generator speed acquisition circuit, the transistor Q1 is turned on during the period when the optocoupler OC1 is turned off, locking the signal input voltage to close to the voltage at the second phase line terminal to avoid false triggering of OC1.

[0027] In the aforementioned digital generator speed acquisition circuit, the reverse cutoff unit includes a diode D2. The anode of the diode D2 is connected to the common terminal of the unidirectional current limiting unit and the voltage divider filter unit, and the cathode is connected to the input terminal of the RC filter unit to cut off the current path from the RC filter unit to the voltage divider filter unit.

[0028] The advantages of this utility model are:

[0029] Only the positive half-cycle signal of the first phase line is detected, and the negative voltage interference is blocked by the unidirectional conduction of the diode, which reduces power consumption and improves anti-interference capability.

[0030] When the voltage of the first phase line drops, the fast discharge unit forcibly pulls down the input voltage of the optocoupler to the level of the second phase line, eliminating the residual voltage after the optocoupler is turned off, and effectively preventing false triggering.

[0031] The design of the voltage divider filter circuit and transistor Q1 enables more accurate switching on and off of the optocoupler, thereby improving the accuracy of speed acquisition. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the digital generator speed acquisition circuit of this utility model.

[0033] Figure 2 This is a circuit diagram of the digital generator speed acquisition circuit of this utility model. Detailed Implementation

[0034] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0035] like Figure 1 and Figure 2As shown, this embodiment discloses a digital generator speed acquisition circuit, including a first phase line terminal 1 and a second phase line terminal 2. The first phase line terminal 1 is used to connect to the first phase line of the three-phase main winding of the digital generator; the second phase line terminal 2 is used to connect to the second phase line of the three-phase main winding of the digital generator; and the voltage phase difference between the first phase line and the second phase line relative to the ground is 120 degrees.

[0036] It also includes,

[0037] The unidirectional current limiting unit 3 has its input terminal connected to the first phase line terminal 1 and is used to unidirectionally conduct and limit the input voltage.

[0038] The voltage divider filter unit 4 is connected at both ends to the output terminal of the unidirectional current limiting unit 3 and the second phase line terminal 2, respectively.

[0039] The input terminal of the RC filter unit 5 is connected to the common terminal of the unidirectional current limiting unit 3 and the voltage divider filter unit 4 through the reverse cut-off unit 8, so as to cut off the current path from the RC filter unit 5 to the voltage divider filter unit 4.

[0040] The output of the signal receiving unit 6 and the RC filter unit 5 are connected to the signal receiving unit 6 to provide the signal input voltage to the signal receiving unit 6.

[0041] The fast discharge unit 7 has a controlled terminal, an input terminal, and an output terminal. The controlled terminal is connected to the common terminal of the unidirectional current limiting unit 3 and the voltage divider filter unit 4. The input terminal is connected to the common terminal of the RC filter unit 5 and the reverse cutoff unit 8. The output terminal is connected to the second phase line terminal 2. It is used to quickly reduce the signal input voltage to close to the voltage of the second phase line terminal 2 when the voltage of the first phase line terminal 1 drops to a preset state.

[0042] The unidirectional current limiting unit 3 includes diodes D1 connected in series and a resistor combination composed of several current limiting resistors; the anode of diode D1 faces the first phase line terminal 1, and the cathode faces away from the first phase line terminal 1. It is used to suppress negative half-cycle interference.

[0043] The signal receiving unit 6 includes an optocoupler OC1. When the voltage at the first phase line terminal 1 rises to the point that the signal input voltage exceeds the optocoupler conduction threshold of the optocoupler OC1, the optocoupler OC1 is triggered. When the voltage at the first phase line terminal 1 drops to a preset value, the optocoupler is turned off. Almost simultaneously, when the voltage at the first phase line terminal 1 drops, causing the fast discharge unit 7 to turn on, the signal input voltage is rapidly pulled down to near the voltage at the second phase line terminal 2.

[0044] The output of RC filter unit 5 is connected to the input side of optocoupler to provide signal input voltage for optocoupler OC1; the output side of optocoupler is used to connect to MCU module.

[0045] The voltage divider filter unit 4 includes a resistor R4 and a capacitor C1 connected in parallel. One common terminal of the resistor R4 and the capacitor C1 is connected to the unidirectional current limiting unit 3 and the fast discharge unit 7, and the other common terminal is connected to the second phase line terminal 2.

[0046] The voltage divider filter circuit 5 and the single-phase current limiting unit 3 form a voltage divider network, so that OC1 only conducts when the IN_U voltage exceeds the preset value.

[0047] The fast discharge unit 7 includes a PNP transistor Q1. The base of transistor Q1 is connected to the common terminal of resistor R4 and capacitor C1, the emitter is connected to the common terminal of RC filter unit 5 and reverse cutoff unit 8, and the collector is connected to the second phase line terminal 2. When the base voltage drops to the transistor turn-on threshold of transistor Q1, transistor Q1 turns on, so that the signal input voltage drops rapidly to close to the voltage of the second phase line terminal 2.

[0048] Transistor Q1 is turned on during the period when optocoupler OC1 is turned off, locking the signal input voltage to close to the voltage of the second phase line terminal 2, thus preventing OC1 from being falsely triggered.

[0049] The reverse cutoff unit 8 includes a diode D2. The anode of the diode D2 is connected to the common terminal of the unidirectional current limiting unit 3 and the voltage divider filter unit 4, and the cathode is connected to the RC filter unit 5 to cut off the current path from the RC filter unit 5 to the voltage divider filter unit 4.

[0050] This circuit acquires the generator speed by detecting two phase lines in the three-phase main winding of the generator. Figure 2 IN_U and IN_V are two phase lines in the three-phase input of the motor. The following describes the working process and principle of the IN_V phase line voltage as the zero-point reference voltage:

[0051] The IN_U phase line voltage rises from zero until the voltage at point a minus the signal input voltage exceeds the conduction threshold of optocoupler OC1, at which point OC1 conducts, and the optocoupler's action is captured by the MCU. During this process, the IN_U phase line voltage, after being forward-biased by diode D1, flows through resistors R1, R2, and R3, then splits into two paths. One path flows to R4 back to zero, simultaneously charging capacitor C1. The other path flows through diode D2 and R5, charging capacitors C2, C3, and C4, forming the voltage at point a. This voltage at point a serves as the input voltage to optocoupler OC1, determining whether it can conduct.

[0052] In this circuit, diode D1 acts as a unidirectional conductor, blocking the reverse current during periods of negative voltage on the IN_U phase line, thus reducing power consumption and interference during negative input periods. Resistors R1, R2, and R3 limit current, keeping the energy within the limits of the downstream circuitry. Simultaneously, resistor R4 and capacitor C1 ensure that optocoupler OC1 only turns on at higher voltages on the IN_U phase line, improving anti-interference capability. The RC filter circuit composed of R5, C2, C3, and C4 further enhances anti-interference capability.

[0053] After optocoupler OC1 is turned on, the IN_U phase line voltage continues to rise and then begins to fall. When the voltage drops to point a and is lower than the OC1 optocoupler conduction threshold, the optocoupler is turned off, and the action is collected by the MCU.

[0054] When the voltage across R4 drops to a level sufficient for transistor Q1 to conduct, Q1 turns on, and energy flows through R5 to point a, causing Q1 to reach zero. The voltage at point a then rapidly drops to near zero. When the IN_U phase line voltage drops to zero, D1 turns off, and the downstream circuit stops working.

[0055] Q1 is used to quickly reduce the voltage at point a. When the input IN_U phase line voltage causes the voltage at point a to be lower than the turn-on voltage of the drive optocoupler, it locks the voltage at point a, avoiding the possibility of false triggering of optocoupler OC1 due to interference, reducing interference and thus improving the accuracy of speed acquisition. R5 is used to limit the current charging and discharging of capacitors C2, C3, and C4, while D2 is used to cut off the flow of the voltage at point a through R5 to R4, C1, and the base of Q1, so that the base voltage of Q1 provided by the voltage divider filter circuit can meet the condition for Q1 to conduct even when the IN_U phase line voltage continues to decrease.

[0056] The resistance values ​​of the above resistors shall be selected and combined by those skilled in the art based on the circuit parameters, as long as they meet the purpose required by this utility model, and no specific limitations are imposed.

[0057] The speed acquisition circuit provided in this solution operates only for half a cycle, effectively reducing power consumption. Simultaneously, the design of the voltage divider filter circuit improves the IN_U phase line voltage at the moment the optocoupler is turned on, enhancing anti-interference capability and acquisition accuracy. Furthermore, when the IN_U phase line voltage is lower than the voltage required to turn on the optocoupler, a fast discharge unit locks the voltage across the optocoupler, further improving anti-interference capability.

[0058] The specific embodiments described herein are merely illustrative examples illustrating the spirit of this utility model. Those skilled in the art to which this utility model pertains may make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of this utility model or exceeding the scope defined by the appended claims.

[0059] Although this document frequently uses terms such as "first phase line terminal 1," "second phase line terminal 2," "unidirectional current limiting unit 3," "voltage divider filter unit 4," "RC filter unit 5," "signal receiving unit 6," "fast discharge unit 7," and "reverse cutoff unit 8," the possibility of using other terms is not excluded. These terms are used merely for the convenience of describing and explaining the essence of this utility model; interpreting them as any additional limitation would contradict the spirit of this utility model.

Claims

1. A digital generator speed acquisition circuit, characterized in that, Including the first phase line terminal (1), the second phase line terminal (2), and, A unidirectional current limiting unit (3) has its input terminal connected to the first phase line terminal (1) for unidirectional conduction and current limiting of the input voltage; The voltage divider filter unit (4) has one end connected to the common terminal of the unidirectional current limiting unit (3) and the fast discharge unit (7), and the other end connected to the second phase line terminal (2). The input terminal of the RC filter unit (5) is connected to the common terminal of the unidirectional current limiting unit (3) and the voltage divider filter unit (4) through the reverse cut-off unit (8) to cut off the current path from the RC filter unit (5) to the voltage divider filter unit (4). The output of the signal receiving unit (6) and the RC filter unit (5) are connected to the signal receiving unit (6) to provide the signal input voltage to the signal receiving unit (6); The fast discharge unit (7) has a controlled terminal, an input terminal and an output terminal. The controlled terminal is connected to the common terminal of the unidirectional current limiting unit (3) and the voltage divider filter unit (4). The input terminal is connected to the common terminal of the RC filter unit (5) and the reverse cutoff unit (8). The output terminal is connected to the second phase line terminal (2). It is used to quickly reduce the signal input voltage to close to the voltage of the second phase line terminal (2) when the voltage of the first phase line terminal (1) drops to a preset state.

2. The digital generator speed acquisition circuit according to claim 1, characterized in that, The first phase line terminal (1) is used to connect the first phase line of the three-phase main winding of the digital generator; The second phase line terminal (2) is used to connect the second phase line of the three-phase main winding of the digital generator; With the ground as a reference point, the voltage phase difference between the first phase line and the second phase line is 120 degrees.

3. The digital generator speed acquisition circuit according to claim 1, characterized in that, The signal receiving unit (6) includes an optocoupler OC1. When the voltage at the first phase line terminal (1) rises to the point that the signal input voltage exceeds the optocoupler conduction threshold of the optocoupler OC1, the optocoupler OC1 is triggered. When the voltage at the first phase line terminal drops to the point that the signal input voltage is lower than the optocoupler OC1 conduction threshold, the optocoupler OC1 is turned off. At the same time, the fast discharge unit is turned on, and the signal input voltage is quickly pulled down to near the voltage at the second phase line terminal.

4. The digital generator speed acquisition circuit according to claim 3, characterized in that, The output of the RC filter unit (5) is connected to the input side of the optocoupler to provide signal input voltage for the optocoupler OC1; the output side of the optocoupler is used to connect to the MCU module.

5. The digital generator speed acquisition circuit according to claim 1, characterized in that, The unidirectional current limiting unit (3) includes diodes D1 connected in series and a resistor combination composed of several current limiting resistors; The anode of the diode D1 faces the first phase line end (1), and the cathode faces away from the first phase line end (1).

6. The digital generator speed acquisition circuit according to claim 5, characterized in that, The resistor combination includes resistors R1, R2, and R3 connected in series. The anode of diode D1 is connected to the first phase line terminal (1), and the cathode is connected to the resistor assembly.

7. The digital generator speed acquisition circuit according to claim 3, characterized in that, The voltage divider filter unit (4) includes a resistor R4 and a capacitor C1 connected in parallel. The two common terminals of the resistor R4 and the capacitor C1 are connected to the unidirectional current limiting unit (3) and the fast discharge unit (7) and the other common terminal is connected to the second phase line terminal (2).

8. The digital generator speed acquisition circuit according to claim 7, characterized in that, The fast discharge unit (7) includes a PNP transistor Q1. The base of the transistor Q1 is connected to the common terminal of the resistor R4 and the capacitor C1, the emitter is connected to the input terminal of the RC filter unit (5), and the collector is connected to the second phase line terminal (2). When the base voltage drops to the transistor turn-on threshold of the transistor Q1, the transistor Q1 turns on, so that the signal input voltage drops rapidly to close to the voltage of the second phase line terminal (2).

9. The digital generator speed acquisition circuit according to claim 8, characterized in that, The transistor Q1 is turned on during the period when the optocoupler OC1 is turned off, locking the signal input voltage to a level close to the voltage of the second phase line terminal (2).

10. The digital generator speed acquisition circuit according to claim 1, characterized in that, The reverse cutoff unit (8) includes a diode D2. The anode of the diode D2 is connected to the common terminal of the unidirectional current limiting unit (3) and the voltage divider filter unit (4), and the cathode is connected to the common terminal of the RC filter unit (5) and the fast discharge unit (7) to cut off the current path from the RC filter unit (5) to the voltage divider filter unit (4).

Images