Optoelectronic chip co-pack and optical communication module

Abstract

This application provides a co-packaged optoelectronic chip and an optical communication module. The co-packaged optoelectronic chip includes a carrier board, an optical chip, and an electrical chip. A mounting surface is formed on one side of the carrier board, and an electrical interconnect structure is provided on the mounting surface. Conductive vias and an optical interconnect structure are provided within the carrier board, and the conductive vias are electrically connected to the electrical interconnect structure. Both the optical chip and the electrical chip are disposed on the mounting surface of the carrier board. The optical chip is electrically connected to the electrical chip through the electrical interconnect structure. The side of the optical chip facing the mounting surface contains an optical device, and the optical signal emitted by the optical device passes through the carrier board via the optical interconnect structure. Compared with the prior art, this application achieves efficient conversion and transmission of optical and electrical signals, significantly shortens the interconnection distance between chips, reduces signal transmission loss and delay, improves signal integrity, and thus achieves reliable transmission of high-frequency signals.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a co-packaged optoelectronic chip and an optical communication module. Background Technology

[0002] In related technologies, gold wire bonding chip packaging uses gold wires to electrically connect the electrodes on the chip to external pins or a carrier board, thereby achieving interconnection between the chip and external circuits.

[0003] As the transmission rate requirements of optical modules become increasingly demanding, the traditional gold wire bonding chip packaging method limits the improvement of bandwidth. The interconnection structure of gold wire bonding is relatively complex and is prone to signal reflection, crosstalk and transmission loss, which affects the integrity of the signal and the transmission rate, making it difficult to meet the requirements of high bandwidth and high speed. Utility Model Content

[0004] The purpose of this application is to provide a co-packaged optoelectronic chip and an optical communication module to solve the technical problem of relatively complex interconnection structures in related technologies.

[0005] In a first aspect, this application provides a photoelectric chip co-package, including a carrier board, an optical chip, and an electrical chip, wherein:

[0006] A mounting surface is formed on one side of the carrier plate, and an electrical interconnection structure is provided on the mounting surface. The carrier plate is provided with conductive vias and an optical interconnection structure, and the conductive vias are electrically connected to the electrical interconnection structure.

[0007] Both the optical chip and the electrical chip are disposed on the mounting surface of the carrier board. The optical chip is electrically connected to the electrical chip through the electrical interconnect structure. The side of the optical chip facing the mounting surface contains an optical device. The optical signal emitted by the optical device passes through the carrier board through the optical interconnect structure.

[0008] In the optoelectronic chip co-packaged component described above, preferably, the extending direction of the optical interconnect structure forms a preset angle with the normal direction of the mounting surface, the carrier plate has a reflective portion, the reflective portion has a reflective slope, and the optical signal emitted from the optical device enters the optical interconnect structure after being reflected by the reflective slope.

[0009] In the optoelectronic chip co-packaged component described above, preferably, the reflective portion is a concave lens recessed within the carrier plate, and the reflective bevel is formed on the wall surface of the concave lens.

[0010] In the optoelectronic chip co-packaged component described above, preferably, the carrier board has a coupling positioning portion, which is used to form a positioning engagement with a coupling positioning mating portion on a coupling connector.

[0011] In the optoelectronic chip co-packaged component described above, preferably, the coupling positioning portion is a plurality of blind holes recessed on the carrier plate.

[0012] In the optoelectronic chip co-packaged component described above, preferably, the carrier plate comprises a glass carrier plate.

[0013] In the optoelectronic chip co-packaged component described above, preferably, the electrical interconnect structure includes a metal wiring layer disposed on the mounting surface.

[0014] In the optoelectronic chip co-packaged component described above, preferably, the optical interconnect structure is a waveguide disposed inside and / or on the surface of the carrier plate.

[0015] In the optoelectronic chip co-packaged component described above, preferably, a plurality of external solder balls are provided on the side of the carrier plate opposite to the mounting surface, and the plurality of external solder balls correspond one-to-one with a plurality of conductive vias, and the external solder balls are electrically connected to the corresponding conductive vias.

[0016] Secondly, this application provides an optical communication module, including a coupling connector and the aforementioned optoelectronic chip co-package. The coupling connector is provided with a coupling positioning mating part, an optical fiber array, and an optical fiber positioning hole. The coupling positioning mating part is used to form a positioning mating with the coupling positioning part in the optoelectronic chip co-package. The two ends of the optical fiber positioning hole correspond to the optical fiber array and the optical interconnect structure, respectively.

[0017] Compared with existing technologies, this application tightly integrates optical and electrical chips via flip-chip bonding. The electrical and optical chips are electrically connected through an interconnect structure. Optical signals can propagate through the optical interconnect structure within the substrate, while electrical signals are connected to the outside world through conductive vias. This achieves efficient conversion and transmission of optical and electrical signals, significantly shortens the interconnection distance between chips, reduces signal transmission loss and delay, improves signal integrity, and thus enables reliable transmission of high-frequency signals. Attached Figure Description

[0018] Figure 1 This is a perspective view of the optical communication module provided in the embodiments of this application.

[0019] Figure 2 yes Figure 1 A 3D view of the optoelectronic chip co-package in the optical communication module shown.

[0020] Figure 3 yes Figure 2 The image shows a bottom view of the optoelectronic chip co-package.

[0021] Figure 4 yes Figure 3 A magnified structural diagram at point A.

[0022] Figures 5a to 5h It is the preparation Figure 1 The flowchart shown is for the optical communication module.

[0023] Explanation of reference numerals in the attached figures:

[0024] 10-Co-packaged optoelectronic chip, 11-Carrier board, 111-Mounting surface, 12-Optical chip, 13-Electrical chip, 14-Electrical interconnect structure, 15-Conductive via, 16-Optical interconnect structure, 17-Reflector, 18-Coupling and positioning part, 19-External solder ball;

[0025] 20-Coupled connector, 21-Coupled positioning mating part, 22-Fiber array, 23-Fiber positioning hole. Detailed Implementation

[0026] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0027] Reference Figures 1 to 4 As shown, this application provides a photoelectric chip co-package 10, including a carrier board 11, an optical chip 12, and an electrical chip 13.

[0028] A mounting surface 111 is formed on one side of the carrier board 11. Both the optical chip 12 and the electrical chip 13 are disposed on the mounting surface 111 of the carrier board 11. The mounting surface 111 provides a platform for physical support and electrical connection, ensuring that the optical chip 12 and the electrical chip 13 can be stably mounted on the carrier board 11. The optical chip 12 is used to realize optical-related functions such as optical signal generation, modulation, transmission, and reception, while the electrical chip 13 is used to realize related functions such as electrical signal processing, control, and amplification. In the embodiments provided in this application, both the optical chip 12 and the electrical chip 13 are mounted using flip-chip bonding, with the active surface of the chip (i.e., the surface containing the circuitry and electrodes) facing downwards, directly facing the mounting surface 111 of the carrier board 11. This makes the distance between the optical chip 12 and the electrical chip 13 relatively close, and eliminates the need for additional gold wire connections, reducing the relatively complex interconnection problem between the optical chip 12 and the electrical chip 13. In other examples, the optical chip 12 and the electrical chip 13 can also be mounted using wire bonding, direct chip bonding, system-in-package, 3D packaging, etc., which are not limited here.

[0029] An electrical interconnection structure 14 is provided on the mounting surface 111. The optical chip 12 is electrically connected to the electrical chip 13 through the electrical interconnection structure 14. The electrical interconnection structure 14 is used to transmit and distribute the electrical signals generated by the optical chip 12 and the electrical chip 13. The electrical signals generated by the optical chip 12 during operation can be transmitted to the electrical chip 13 through the electrical interconnection structure 14. The electrical chip 13 can also send control signals or processed electrical signals to the optical chip 12 through the electrical interconnection structure 14, thereby realizing the electrical collaborative operation between the optical chip 12 and the electrical chip 13.

[0030] The carrier 11 also includes conductive vias 15 and optical interconnect structures 16. The conductive vias 15 are electrically connected to the optical interconnect structures 14, allowing the electrical interconnect structures 14 to be electrically connected to external circuits. This enables the electrical signals inside the optoelectronic chip co-package 10 to interact with external circuit systems, achieving signal input and output. The conductive vias 15 can be fabricated using TGV via metallization technology to form electrical connections on the upper and lower surfaces of the carrier 11. In one feasible embodiment, the conductive via 15 includes a via and an adhesive layer, a barrier layer, and a conductive layer disposed on the inner wall of the via. The adhesive layer has strong adhesion to the inner wall of the via. The adhesive layer contains metals or alloys such as Ti, WTi, Cr, NiCr, and TaN, exhibiting good adhesion properties and ensuring the stability and reliability of the conductive layer within the via. The barrier layer prevents the diffusion of conductive materials in the conductive layer, thereby maintaining the stability and conductivity of the conductive layer. The barrier layer includes metals such as Pt, Ni, and Pd, exhibiting good barrier properties and effectively preventing the diffusion of metal atoms. The main function of the conductive layer is to achieve efficient transmission of electrical signals. The conductive layer contains metals such as Au and Cu, which have low resistivity and high conductivity, effectively reducing the loss of electrical signals during transmission and improving the transmission efficiency and quality of signals. In other examples, the conductive via 15 can also achieve electrical connection in the following ways, including but not limited to: (1) filling the via with conductive materials, such as metals such as copper, silver, and aluminum, or composite materials such as conductive adhesive, to achieve electrical connection; (2) forming conductive pillars, such as copper pillars, in the via to achieve electrical connection.

[0031] The optical interconnect structure 16 enables stable transmission of optical signals within the optoelectronic chip co-package 10, avoiding signal loss and interference during transmission. The side of the optical chip 12 facing the mounting surface 111 contains optical devices, which are components within the optical chip 12 used to generate, modulate, transmit, or receive optical signals. The optical signals emitted by the optical devices pass through the optical interconnect structure 16 and through the carrier board 11, transmitting the optical signals from one side of the optical chip 12 to the other side of the carrier board 11, achieving cross-carrier board transmission of the optical signals and enabling connection to other external optical communication devices.

[0032] In the above embodiment, the optical chip 12 and the electrical chip 13 are tightly integrated using flip-chip bonding. The electrical chip 13 and the optical chip 12 are electrically connected through an electrical interconnect structure 14. Optical signals can propagate through the optical interconnect structure 16 within the carrier board 11, while electrical signals are connected to the outside world through conductive vias 15. This achieves efficient conversion and transmission of optical and electrical signals, significantly shortens the interconnection distance between chips, reduces signal transmission loss and delay, improves signal integrity, and thus enables reliable transmission of high-frequency signals.

[0033] Furthermore, to meet specific optical transmission path requirements and ensure that the optical signal accurately enters subsequent optical processing stages along a preset path, the extension direction of the optical interconnect structure 16 forms a preset angle with the normal direction of the mounting surface 111. The carrier plate 11 contains a reflective portion 17, which has a reflecting slope. The angle and shape of the reflecting slope can be adaptively designed according to the propagation characteristics of the optical signal and the required degree of directional change. The optical signal emitted from the optical chip 12 enters the optical interconnect structure 16 after being reflected by the reflecting slope. The propagation direction of the optical signal after reflection by the reflecting slope is precisely what allows it to smoothly enter the optical interconnect structure 16.

[0034] Reference Figure 5h As shown, the extension direction of the optical interconnect structure 16 is the direction of arrow D1 in the figure, and the normal direction of the mounting surface 111 is the direction of arrow D2 in the figure. A preset angle is formed between arrows D1 and D2, which is between 45° and 135°, thereby adaptively adjusting the extension direction of the optical interconnect structure 16. The angle of the reflective slope is also adaptively changed according to the required extension direction of the optical interconnect structure 16.

[0035] Preferably, in the embodiments provided in this application, the preset included angle is 90°, and the optical interconnect structure 16 is parallel to the mounting surface 111 to reduce the space occupied by the optical signal during propagation. The angle of the reflecting slope is 45°. The initial direction of the optical signal emitted by the optical chip 12 is perpendicular to the mounting surface 111. After the optical signal is emitted from the optical chip 12, it is reflected by the reflecting slope of the reflector 17, enters the optical interconnect structure 16, and propagates along a direction parallel to the mounting surface 111. This improves the transmission efficiency of the optical signal and allows it to be accurately coupled into the fiber positioning hole 23 of the coupling connector 20.

[0036] In the embodiments provided in this application, the reflective portion 17 is a concave lens recessed within the carrier plate 11. The concave lens is used to adjust the propagation direction of the optical signal, allowing the optical signal to better enter the optical interconnect structure 16. The recessed formation of the concave lens enables the reflective portion 17 to be tightly integrated with the structure of the carrier plate 11, eliminating the need for additional space for the installation of the reflective portion 17 and improving the overall integration of the system. A reflective slope is formed on the wall of the concave lens. After the optical signal is emitted from the optical chip 12, it reaches the wall of the concave lens and is reflected on the wall, thus becoming parallel to the extension direction of the optical interconnect structure 16. The optical signal then enters the optical interconnect structure 16 for propagation. In other examples, the reflective portion 17 can also be implemented using a reflective prism, a reflective film, a reflective microstructure, or a reflective microcavity, etc. The choice of method depends on the specific application requirements and is not limited here.

[0037] Preferably, the carrier plate 11 has a coupling positioning part 18, which is used to form a positioning engagement with the coupling positioning mating part 21 on the coupling connector 20. The coupling connector 20 is provided with an optical fiber array 22. One transmission path of the optical signal is as follows: when the coupling connector 20 is connected to the optoelectronic chip co-package 10, the optical signal is emitted from the optical device, reflected by the reflective slope of the reflector 17, enters the optical interconnect structure 16, and enters the optical fiber array 22 after transmission through the optical interconnect structure 16. When the coupling connector 20 is connected to the optoelectronic chip co-package 10, the coupling positioning part 18 and the coupling positioning mating part 21 achieve precise positioning, so that the position of the optical interconnect structure 16 is accurately aligned with the position of the optical fiber array 22, ensuring the precise alignment of the optical signal transmission path, thereby maximizing the coupling efficiency of the optical signal and reducing the loss of the optical signal during transmission.

[0038] In one feasible implementation, the coupling positioning part 18 consists of a plurality of blind holes recessed on the carrier plate 11. These blind holes can be circular, square, or other geometric shapes, and are not limited here. The corresponding coupling positioning mating part 21 is a protruding post. The outer contour surface of the protruding post matches the inner contour surface of the blind hole. When the coupling connector 20 is connected to the optoelectronic chip co-package 10, the protruding post extends into the blind hole to form a positioning fit, ensuring precise alignment of the optical signal transmission path. In other examples, the coupling positioning part 18 and the coupling positioning mating part 21 can also achieve precise positioning through magnetic positioning structures or optical marks, and are not limited here.

[0039] Furthermore, the outlets of the coupling positioning part 18 and the optical interconnect structure 16 are both located on the same side of the carrier plate 11. While the coupling positioning part 18 and the coupling positioning mating part 21 are positioned, the optical interconnect structure 16 is also precisely aligned with the fiber array 22. Alignment and installation on the same side simplifies the operation steps, thereby reducing alignment errors and improving the coupling efficiency of optical signals.

[0040] In the embodiments provided in this application, the carrier plate 11 includes a glass carrier plate. The material of the glass carrier plate includes a series of quartz glasses such as aluminosilicate glass, aluminoborate glass, and pure quartz glass. The glass carrier plate has good optical transparency, high transmittance of light signals and low scattering rate, which can effectively reduce the loss of light signals during transmission and improve the quality and transmission efficiency of light signals.

[0041] The electrical interconnect structure 14 includes a metal wiring layer disposed on the mounting surface 111. The optical chip 12 and the electrical chip 13 are connected via wiring to realize the transmission and control of electrical signals. The fabrication methods of the metal wiring layer include magnetron sputtering, electroplating, electron beam evaporation, and chemical plating, etc., and are not limited here. In other examples, the electrical interconnect structure 14 can be implemented using various different designs and materials, including multilayer wiring structures, flexible wiring, three-dimensional wiring structures, hybrid wiring materials, nanowiring technology, intelligent wiring systems, and electromagnetic shielding wiring. The choice of implementation method depends on specific application requirements and technical specifications, and is not limited here. The metal wiring layer is made of a highly conductive metal material with low resistivity, which can effectively reduce the loss of electrical signals during transmission. In one feasible embodiment, the metal wiring layer may contain an adhesive layer, a barrier layer, and a conductive layer. The adhesive layer is used to improve the adhesion between the metal wiring layer and the surface of the carrier board 11. The adhesive layer contains metals or alloys such as Ti, WTi, Cr, NiCr, and TaN, which have good adhesion properties and can ensure the stability and reliability of the metal wiring layer on the surface of the carrier board 11. The barrier layer prevents the conductive material in the conductive layer from diffusing into the carrier plate 11 or other layers, thereby maintaining the stability and conductivity of the conductive layer. The barrier layer includes metals such as Pt, Ni, and Pd, which have excellent barrier properties and can effectively prevent the diffusion of metal atoms. The main function of the conductive layer is to achieve efficient transmission of electrical signals. The conductive layer contains metals such as Au and Cu, which have low resistivity and high conductivity, effectively reducing signal loss during transmission and improving signal transmission efficiency and quality.

[0042] The optical interconnect structure 16 is a waveguide, which can be disposed inside the carrier plate 11, on the surface of the carrier plate 11, or both inside and on the surface of the carrier plate 11, to restrict and guide the propagation of the optical signal along a specific path. In the embodiment provided in this application, the extension direction of the waveguide is perpendicular to the propagation direction of the initial optical signal emitted by the optical chip 12. After the optical signal emitted by the optical chip 12 enters the carrier plate 11, it is reflected by the concave lens and enters the waveguide, and then propagates to the fiber array 22 of the coupling connector 20. In other examples, the optical interconnect structure 16 can adopt a variety of different designs and materials, including free-space optical interconnects, fiber optic interconnects, integrated optical waveguides, micro-nano photonic structures, liquid optical interconnects, hybrid optical interconnects, photonic integrated circuits, and photonic crystal fibers. The choice of implementation method depends on the specific application requirements and technical requirements, and is not limited here.

[0043] In one feasible implementation, the waveguide comprises a core layer with a high refractive index and a cladding layer with a low refractive index. It utilizes the principle of total internal reflection to achieve efficient transmission of optical signals, precisely controlling the propagation direction of the optical signals and ensuring that the signals accurately reach the target location. The waveguide can be formed inside the carrier substrate 11 by directly processing it using femtosecond laser modification and direct writing, changing the refractive index of the material. Alternatively, the waveguide can be fabricated on the surface of the carrier substrate 11 using micro-nano processes. By integrating the waveguide inside or on the surface of the carrier substrate 11, a compact optoelectronic co-package design is achieved, reducing the volume and weight of the optoelectronic co-package.

[0044] In the embodiments provided in this application, reference is made to Figure 4 As shown, a plurality of external solder balls 19 are provided on the side of the carrier board 11 facing away from the mounting surface 111. Each of the external solder balls 19 corresponds one-to-one with a plurality of conductive vias 15 to ensure accurate transmission of electrical signals. The external solder balls 19 are electrically connected to the corresponding conductive vias 15. The external solder balls 19 are electrically connected to the electrical interconnection structure 14 on the carrier board 11 through the conductive vias 15. The external solder balls 19 can also be electrically connected to external circuits to transmit electrical signals from the carrier board 11 to external circuits.

[0045] Secondly, referring to Figure 1 As shown, this application provides an optical communication module, including a coupling connector 20 and the aforementioned optoelectronic chip co-package 10. The coupling connector 20 is provided with a coupling positioning mating part 21, an optical fiber array 22, and optical fiber positioning holes 23. The coupling positioning mating part 21 is used to form a positioning mating with the coupling positioning part 18 inside the optoelectronic chip co-package 10, ensuring that the coupling connector 20 can be accurately aligned to a predetermined position on the optoelectronic chip co-package 10 during installation. The optical fiber array 22 is composed of multiple optical fibers and is used to realize multi-channel optical signal transmission. The two opposite ends of the optical fiber positioning holes 23 correspond to the optical fiber array 22 and the optical interconnect structure 16, respectively. The optical fiber positioning holes 23 are used to accurately align the optical fiber array 22 and the optical interconnect structure 16, ensuring that the optical signal can be efficiently transmitted from the optical fiber array 22 to the optical interconnect structure 16.

[0046] The working principle of the optical communication module is as follows:

[0047] (1) Optical signal transmission:

[0048] The optical signal is transmitted from the fiber optic array 22 to the optical interconnect structure 16: The optical signal is emitted from the fiber optic array 22, enters the coupling connector 20 through the fiber optic positioning hole 23, and then is precisely aligned with the optical interconnect structure 16 within the optoelectronic chip co-package 10 through the positioning engagement of the coupling positioning mating part 21 and the coupling positioning part 18. The optical interconnect structure 16 transmits the optical signal to the optical chip 12.

[0049] The optical signal is transmitted from the optical interconnect structure 16 to the fiber array 22: The optical signal is emitted from the optical chip 12 in the optoelectronic chip co-package 10, and is precisely aligned with the fiber positioning hole 23 in the coupling connector 20 through the positioning cooperation between the coupling positioning mating part 21 and the coupling positioning part 18. Then, it enters the fiber array 22 through the optical interconnect structure 16 and is transmitted to the external optical communication system.

[0050] (2) Electrical signal transmission:

[0051] Electrical signals are transmitted from external solder balls 19 to conductive vias 15: Electrical signals enter the carrier board 11 from the external circuit through external solder balls 19, and are transmitted to the electrical interconnection structure 14 inside the carrier board 11 through conductive vias 15, thereby realizing the transmission of electrical signals between the optical chip 12 and the electrical chip 13.

[0052] Electrical signals are transmitted from the conductive via 15 to the external solder ball 19. Electrical signals can also be transmitted from the electrical interconnection structure 14 inside the carrier board 11 through the conductive via 15 to the external solder ball 19, and then to the external circuit.

[0053] Thirdly, this application also provides a method for fabricating the aforementioned optical communication module, comprising the following steps:

[0054] S101: Reference Figure 5a As shown, through-holes are fabricated within the carrier plate 11. The carrier plate 11 is made of a range of quartz glasses, including aluminosilicate glass, aluminoborate glass, or pure quartz glass. The through-holes are fabricated using the TGV (Through Glass Via) method, which includes a series of processes for drilling holes in glass, such as femtosecond laser-modified wet etching or laser etching. Femtosecond laser-modified wet etching involves creating modified regions within the carrier plate 11 using a femtosecond laser. These regions are more easily etched by a buffered oxide etchant during subsequent wet etching. The femtosecond laser-treated carrier plate 11 is immersed in a buffered oxide etchant solution, and the modified glass regions are rapidly etched to form through-holes. Laser etching involves directly applying laser energy to the carrier plate 11 to ablate the glass material and form through-holes.

[0055] S102: Reference Figure 5b As shown, a reflective portion 17 is fabricated within the carrier plate 11. The reflective portion 17 is preferably a concave lens, which includes spherical and aspherical lenses, and is fabricated by a femtosecond laser modification followed by wet etching. The femtosecond laser creates deformed regions within the glass carrier plate 11, and the glass in these regions is more easily etched by a buffered oxide etchant during subsequent wet etching. The femtosecond laser-treated carrier plate 11 is immersed in a buffered oxide etchant solution, and the deformed glass regions are rapidly etched to form a concave lens structure.

[0056] S103: Reference Figure 5cAs shown, an optical interconnect structure can be fabricated inside the carrier 11, on the surface of the carrier 11, or both inside and on the surface of the carrier 11. The optical interconnect structure is preferably a waveguide, which can be directly fabricated inside the carrier 11 by femtosecond laser modification and direct writing to change the refractive index of the material, thereby forming a waveguide inside the carrier 11. Alternatively, a waveguide can be fabricated on the surface of the carrier 11 using micro-nano processes.

[0057] S104: Reference Figure 5d As shown, a conductive via 15 is obtained by metallization within the via. The fabrication methods include magnetron sputtering, electroplating, electron beam evaporation, and electroless plating, forming an adhesion layer, a barrier layer, and a conductive layer on the inner wall of the via. The adhesion layer has strong adhesion to the inner wall of the via. The adhesion layer contains metals or alloys such as Ti, WTi, Cr, NiCr, and TaN, exhibiting good adhesion properties and ensuring the stability and reliability of the conductive layer within the via. The barrier layer prevents the diffusion of conductive materials in the conductive layer, thereby maintaining the stability and conductivity of the conductive layer. The barrier layer includes metals such as Pt, Ni, and Pd, possessing good barrier properties and effectively preventing the diffusion of metal atoms. The main function of the conductive layer is to achieve efficient transmission of electrical signals. The conductive layer contains metals such as Au and Cu, exhibiting low resistivity and high conductivity, effectively reducing signal loss during transmission and improving signal transmission efficiency and quality.

[0058] S105: Reference Figure 5e As shown, an electrical interconnect structure 14 is formed on the mounting surface 111 of the carrier plate 11. The electrical interconnect structure 14 is preferably a metal wiring layer, which is prepared by processes such as magnetron sputtering, electroplating, electron beam evaporation, and electroless plating. The metal wiring layer contains an adhesive layer, a barrier layer, and a conductive layer. The adhesive layer is used to improve the adhesion between the metal wiring layer and the surface of the carrier plate 11. The adhesive layer contains metals or alloys such as Ti, WTi, Cr, NiCr, and TaN, which have good adhesion properties and can ensure the stability and reliability of the metal wiring layer on the surface of the carrier plate 11. The barrier layer is used to prevent the conductive material in the conductive layer from diffusing into the carrier plate 11 or other layers, thereby maintaining the stability and conductivity of the conductive layer. The barrier layer includes metals such as Pt, Ni, and Pd, which have good barrier properties and can effectively prevent the diffusion of metal atoms. The main function of the conductive layer is to achieve efficient transmission of electrical signals. The conductive layer contains metals such as Au and Cu, which have low resistivity and high conductivity, effectively reducing signal loss during transmission and improving signal transmission efficiency and quality.

[0059] S106: Reference Figure 5f As shown, cutting and grinding are involved. The entire glass panel or wafer is cut along the cutting lines using methods including laser cutting, rotary cutting, and scribing.

[0060] S107: Reference Figure 5g As shown, a coupling positioning portion 18 is fabricated within the carrier plate 11. The coupling positioning portion 18 is preferably a blind via, which is fabricated by wet etching after femtosecond laser modification. The femtosecond laser creates modified regions within the glass carrier plate 11, and the glass in these regions is more easily etched by a buffered oxide etchant during subsequent wet etching. Immersing the femtosecond laser-treated carrier plate 11 in a buffered oxide etchant solution rapidly etches the modified glass regions, forming a blind via structure.

[0061] S108: Reference Figure 5h As shown, optical chip 12 and electrical chip 13 are flip-chip bonded together to prepare optoelectronic chip co-package 10. The flip-chip bonding methods used include reflow soldering, ultrasonic thermocompression bonding, and thermocompression bonding. The solders used include metals such as Au, Cu, Sn, and In, as well as alloys such as Au-Sn, Ag-Sn, Su-Cu, and Au-Sn-Cu. The flip-chip includes optical chip 12 and electrical chip 13, which contain components such as a driver, TIA, MCU, power supply, capacitor, LD laser, PD detector, and modulator.

[0062] S109: Reference Figure 5h As shown, fiber optic coupling is achieved by connecting the coupling connector 20 to the optoelectronic chip co-package 10. The coupling connector 20 is connected to the carrier board 11 via a plug-in method. When the coupling connector 20 is connected to the optoelectronic chip co-package 10, precise positioning is achieved through the coupling positioning part 18 and the coupling positioning mating part 21, so that the position of the optical interconnect structure 16 is accurately aligned with the position of the fiber array 22.

[0063] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. An optoelectronic chip co-package, comprising: It includes a carrier board, optical chips, and electrical chips, among which: A mounting surface is formed on one side of the carrier plate, and an electrical interconnection structure is provided on the mounting surface. The carrier plate is provided with conductive vias and an optical interconnection structure, and the conductive vias are electrically connected to the electrical interconnection structure. Both the optical chip and the electrical chip are disposed on the mounting surface of the carrier board. The optical chip is electrically connected to the electrical chip through the electrical interconnect structure. The side of the optical chip facing the mounting surface contains an optical device. The optical signal emitted by the optical device passes through the carrier board through the optical interconnect structure.

2. The optoelectronic chip co-package of claim 1, wherein, The extension direction of the optical interconnect structure forms a preset angle with the normal direction of the mounting surface. The carrier plate has a reflective part with a reflective slope. The optical signal emitted from the optical device enters the optical interconnect structure after being reflected by the reflective slope.

3. The optoelectronic chip co-package of claim 2, wherein, The reflective portion is a concave lens recessed within the carrier plate, and the reflective inclined surface is formed on the wall surface of the concave lens.

4. The optoelectronic chip co-package of claim 1, wherein, The carrier plate has a coupling positioning part, which is used to form a positioning engagement with the coupling positioning mating part on the coupling connector.

5. The optoelectronic chip co-package of claim 4, wherein, The coupling positioning part consists of several blind holes recessed on the carrier plate.

6. The optoelectronic chip co-package of claim 1, wherein, The carrier plate includes a glass carrier plate.

7. The optoelectronic chip co-package of claim 1, wherein, The electrical interconnect structure includes a metal wiring layer disposed on the mounting surface.

8. The optoelectronic chip co-package of claim 1, wherein, The optical interconnect structure is a waveguide disposed inside and / or on the surface of the carrier plate.

9. The optoelectronic chip co-package of claim 1, wherein, The carrier plate has a plurality of external solder balls on the side opposite to the mounting surface. Each of the external solder balls corresponds to a plurality of conductive vias, and the external solder balls are electrically connected to the corresponding conductive vias.

10. An optical communication module, characterized by, The device includes a coupling connector and a photoelectric chip co-package as described in any one of claims 1-9. The coupling connector is provided with a coupling positioning mating part, a fiber array, and a fiber positioning hole. The coupling positioning mating part is used to form a positioning mating with the coupling positioning part in the photoelectric chip co-package. The two ends of the fiber positioning hole correspond to the fiber array and the optical interconnect structure, respectively.

Images