A PFC circuit with adjustable output voltage

Abstract

This application provides a PFC circuit with adjustable output voltage, including a first voltage divider module, a second voltage divider module, a first chip, and a second chip. The first voltage divider module is connected to the circuit input terminal, the second voltage divider module is connected to the circuit output terminal, the output terminal of the second voltage divider module is connected to the feedback pin of the first chip, the third pin of the second chip is provided with a reference voltage, the second pin of the second chip is connected to the output terminal of the first voltage divider module, and the first pin of the second chip is connected to the feedback pin of the first chip. The second chip compares the voltage signal sampled by the second pin with the reference voltage, and outputs an adjustment signal through the first pin according to the comparison result. The first chip adjusts the output voltage according to the adjustment signal received by the feedback pin. This achieves that the output voltage of the circuit changes with the input voltage, reducing the difference between the input and output voltages, reducing the power transistor losses at low voltages, and improving the overall circuit efficiency.

Description

Technical Field

[0001] This application relates to the field of circuits, and more particularly to a PFC circuit with adjustable output voltage. Background Technology

[0002] Current PFC circuits typically have a constant output voltage. This is achieved by sampling a fixed signal value using a voltage divider with upper and lower resistors, feeding it back to the chip's FB pin to adjust the output voltage. In wide-voltage (100-277VAC) or ultra-wide-voltage (100-480VAC) circuits, the output voltage needs to be determined based on the highest input voltage, generally exceeding it by 1.41 times. Consequently, at lower or very low input voltages, the difference between the PFC circuit's input and output voltages is very large, resulting in higher power transistor losses at low input voltages and lower overall circuit efficiency. Utility Model Content

[0003] The following is an overview of the topics described in detail in this article.

[0004] The purpose of this application is to at least partially solve one of the technical problems existing in the related art. The embodiments of this application provide a PFC circuit with adjustable output voltage, which improves the overall circuit efficiency of the PFC circuit.

[0005] According to an embodiment of the application, a PFC circuit with adjustable output voltage includes: The first voltage divider module is connected to the input terminal of the PFC circuit; The second voltage divider module is connected to the output terminal of the PFC circuit. The first chip, the output terminal of the second voltage divider module is connected to the feedback pin of the first chip; The second chip has a reference voltage on its third pin, a second pin connected to the output of the first voltage divider module, and a first pin connected to the feedback pin of the first chip. The second chip is used to compare the voltage signal sampled by the second pin with the reference voltage, and output an adjustment signal through the first pin according to the comparison result. The first chip is used to adjust the output voltage according to the adjustment signal received by the feedback pin.

[0006] According to certain embodiments of the application, the PFC circuit is provided with a rectifier module, the rectifier module is connected to the circuit input terminal, and the first voltage divider module and the second voltage divider module are connected to the output terminal of the rectifier module.

[0007] According to certain embodiments of the application, the rectifier module is a rectifier bridge consisting of four diodes connected in a bridge configuration.

[0008] According to certain embodiments of the application, the first voltage divider module includes a tenth resistor, an eleventh resistor, and a twelfth resistor connected in series.

[0009] According to certain embodiments of the application, the second voltage divider module includes a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor connected in series.

[0010] According to certain embodiments of the application, the third pin of the second chip is regulated to a reference voltage via a voltage regulator.

[0011] According to certain embodiments of the application, the reference voltage is 2.5V.

[0012] According to certain embodiments of the application, the second pin of the second chip is connected to one end of the sixteenth resistor, and the other end of the sixteenth resistor is connected to the output of the first voltage divider module.

[0013] According to certain embodiments of the application, a first pin of the second chip is connected to the negative terminal of a diode, and the positive terminal of the diode is connected to the feedback pin of the first chip.

[0014] According to certain embodiments of the application, the output of the first chip is connected to the BUCK circuit.

[0015] The above scheme has at least the following beneficial effects: by using the peripheral circuit of the second chip to sample the input voltage signal and adjust the reference value of the feedback pin of the PFC circuit, the output voltage of the PFC circuit changes with the input voltage. At the same time, it also reduces the difference between the input voltage and the output voltage of the PFC circuit within the full voltage range, reduces the power transistor loss at low voltage, and improves the overall circuit efficiency of the PFC circuit. Attached Figure Description

[0016] The accompanying drawings are used to provide a further understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0017] Figure 1 This is a circuit diagram of an adjustable output voltage PFC circuit provided in an embodiment of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0019] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, or the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0020] Current PFC circuits typically have a constant output voltage. This is achieved by sampling a fixed signal value using a voltage divider with upper and lower resistors, feeding it back to the chip's FB pin to adjust the output voltage. In wide-voltage (100-277VAC) or ultra-wide-voltage (100-480VAC) circuits, the output voltage needs to be determined based on the highest input voltage, generally exceeding it by 1.41 times. Consequently, at lower or very low input voltages, the difference between the PFC circuit's input and output voltages is very large, resulting in higher power transistor losses at low input voltages and lower overall circuit efficiency.

[0021] To address the above problems, embodiments of this application provide a PFC circuit with adjustable output voltage.

[0022] The embodiments of this application will be further described below with reference to the accompanying drawings.

[0023] The PFC circuit includes: a first voltage divider module, a second voltage divider module, a first chip U1, and a second chip U2.

[0024] The first voltage divider module is connected to the input terminal of the PFC circuit; the second voltage divider module is connected to the output terminal of the PFC circuit; the output terminal of the second voltage divider module is connected to the feedback pin FB of the first chip U1; the third pin IN A+ of the second chip U2 is set with a reference voltage; the second pin IN A- of the second chip U2 is connected to the output terminal of the first voltage divider module; and the first pin OUT A of the second chip U2 is connected to the feedback pin FB of the first chip U1.

[0025] The second chip U2 is used to compare the voltage signal sampled by the second pin IN A with the reference voltage, and output an adjustment signal through the first pin OUT A according to the comparison result. The first chip U1 is used to adjust the output voltage according to the adjustment signal received by the feedback pin FB.

[0026] In this embodiment, the reference value of the FB pin of the PFC (Boost) circuit is adjusted by sampling the input voltage signal through the peripheral circuit of the LM358 operational amplifier. This allows the PFC (Boost) output voltage to change with the input voltage, while also reducing the difference between the PFC (Boost) input voltage and output voltage across the entire voltage range. This also reduces the power transistor loss at low voltage and improves the overall efficiency of the PFC (Boost) circuit.

[0027] The PFC circuit is equipped with a rectifier module, which is connected to the circuit input terminal. The first voltage divider module and the second voltage divider module are connected to the output terminal of the rectifier module.

[0028] Specifically, the rectifier module is a rectifier bridge consisting of four diodes connected in a bridge configuration.

[0029] The AC_L terminal is connected to the live wire, and the AC_N terminal is connected to the neutral wire. The AC_L and AC_N terminals are the input terminals of the PFC circuit. The AC power is input to the PFC circuit through the AC_L and AC_N terminals, and after rectification by the rectifier bridge, a continuous half-wave DC voltage VDC is obtained.

[0030] The first voltage divider module includes a series connection of a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13. The first voltage divider module is connected to one end of the rectifier bridge output VDC voltage. Through the voltage division effect of the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13, a voltage Va is output between the twelfth resistor R12 and the thirteenth resistor R13.

[0031] The second voltage divider module includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9 connected in series. This second voltage divider module is connected to one end of the PFC circuit's output voltage VBUS. Through the voltage division effect of the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9, a voltage VFB is output between the eighth resistor R8 and the ninth resistor R9. One end of the second voltage divider module's output voltage VFB is connected to the feedback pin FB of the first chip U1.

[0032] The third pin IN A+ of the second chip U2 is regulated to a reference voltage via a voltage regulator. Specifically, a TL431 voltage regulator is used. The reference voltage is 2.5V.

[0033] Specifically, the second chip U2 is an LM358 chip. The LM358 is a dual operational amplifier. Internally, it includes two independent, high-gain, internally frequency-compensated operational amplifiers. The LM358 consists of an infrared sensor, signal amplification circuit, voltage comparator, delay circuit, and audible alarm circuit, among other components.

[0034] The second pin IN A- of the second chip U2 is connected to one end of the sixteenth resistor R16, and the other end of the sixteenth resistor R16 is connected to the output of the first voltage divider module.

[0035] The first pin OUT A of the second chip U2 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the feedback pin FB of the first chip U1.

[0036] The output of the first chip U1 is connected to the BUCK circuit. This reduces the voltage difference across the BUCK circuit and improves the efficiency of the subsequent BUCK circuit.

[0037] In summary, after the input AC voltage is rectified by the rectifier bridge (BD1), a continuous half-wave DC voltage VDC is obtained. VDC is divided by voltage divider resistors R10, R11, R12, and R13 to obtain the Va value. The PFC (Boost) output voltage VBUS is divided by voltage divider resistors R6, R7, R8, and R9 to obtain the VFB value, which is then connected to the FB pin of U1. Pin 3 IN A+ of chip U2 serves as a reference value and is regulated to 2.5V by TL431. Pin 2 IN A- of chip U2 is connected to point Va through a series resistor. Pin 1 OUT A of chip U2 outputs a signal that is connected to VFB of chip U1 through a resistor and a diode. Thus, the input voltage signal is sampled by pin 2 of LM358 chip and compared with the 2.5V reference at pin 3. The voltage value at pin 1 is adjusted to regulate the VFB pin voltage, thereby regulating the PFC (Boost) output voltage. This scheme of adjusting the output voltage through the input voltage can be applied to ultra-wide input voltage circuits, thereby reducing the power transistor losses at low input voltages and improving the overall efficiency.

[0038] The above is a detailed description of the preferred embodiments of this application, but this application is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application, and these equivalent modifications or substitutions are all included within the scope defined by the claims of this application.

Claims

1. A PFC circuit with adjustable output voltage, characterized in that, include: The first voltage divider module is connected to the input terminal of the PFC circuit; The second voltage divider module is connected to the output terminal of the PFC circuit. The first chip, the output terminal of the second voltage divider module is connected to the feedback pin of the first chip; The second chip has a reference voltage on its third pin, a second pin connected to the output of the first voltage divider module, and a first pin connected to the feedback pin of the first chip. The second chip is used to compare the voltage signal sampled by the second pin with the reference voltage, and output an adjustment signal through the first pin according to the comparison result. The first chip is used to adjust the output voltage according to the adjustment signal received by the feedback pin.

2. The PFC circuit of claim 1, wherein, The PFC circuit is equipped with a rectifier module, which is connected to the circuit input terminal. The first voltage divider module and the second voltage divider module are connected to the output terminal of the rectifier module.

3. The PFC circuit of claim 2, wherein, The rectifier module is a rectifier bridge composed of four diodes connected in a bridge configuration.

4. The output voltage adjustable PFC circuit of claim 1, wherein, The first voltage divider module includes a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor connected in series.

5. The output voltage adjustable PFC circuit of claim 1, wherein, The second voltage divider module includes a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor connected in series.

6. The output voltage adjustable PFC circuit of claim 1, wherein, The third pin of the second chip is regulated to a reference voltage via a voltage regulator.

7. The PFC circuit of claim 6, wherein, The reference voltage is 2.5V.

8. The output voltage adjustable PFC circuit of claim 1, wherein, The second pin of the second chip is connected to one end of the sixteenth resistor, and the other end of the sixteenth resistor is connected to the output of the first voltage divider module.

9. The output voltage adjustable PFC circuit of claim 1, wherein, The first pin of the second chip is connected to the negative terminal of the diode, and the positive terminal of the diode is connected to the feedback pin of the first chip.

10. The output voltage adjustable PFC circuit of claim 1, wherein, The output of the first chip is connected to the BUCK circuit.

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