An overcurrent protection circuit of an electromagnet and an electronic device

Abstract

The application discloses an overcurrent protection circuit of an electromagnet and an electronic device. The overcurrent protection circuit comprises an enable control circuit, a driving circuit connected with the enable control circuit and a first end of the electromagnet, a low-side current sampling circuit connected with the driving circuit, an overcurrent locking circuit connected with a power supply, the low-side current sampling circuit and the enable control circuit, a high-side current sampling circuit connected with the overcurrent locking circuit, the driving circuit and a second end of the electromagnet, and the overcurrent locking circuit is used for receiving a low-side overcurrent signal and controlling the electromagnet to be powered off through the high-side current sampling circuit. The overcurrent locking circuit is also used for receiving a high-side overcurrent signal, outputting an interception signal to the enable control circuit and outputting a locking signal to the control circuit based on the high-side overcurrent signal. In this way, the driving process of the electromagnet is more accurate, the problem of frequent triggering is solved, the burden of the driving circuit is reduced, and the risk of damage is reduced.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to an overcurrent protection circuit and electronic device for an electromagnet. Background Technology

[0002] In the electrical control system of a pattern maker, the main controller needs to frequently drive electromagnets for thread cutting and pulling, as well as the medium-pressure foot valve. Typically, the electromagnets and valves require two leads: one connected to the drive power supply, and the other using an open-drain drive. However, during the assembly process of the pattern maker, the leads are prone to short-circuiting to the machine casing or short-circuiting between each other.

[0003] Existing electronic control systems for figure skating machines typically include overcurrent protection circuits at the drive ports of the electromagnets and air valves to detect short circuits. Upon detecting an overcurrent, the overcurrent protection circuit stops outputting the drive signal. However, existing systems lack comprehensive overcurrent monitoring, and the overcurrent protection circuit automatically restarts the drive signal after the overcurrent condition disappears, leading to frequent restarts, increasing the burden on the drive components and raising the risk of damage. Utility Model Content

[0004] This application mainly provides an overcurrent protection circuit and electronic device for electromagnets to solve the problem of insufficient monitoring of overcurrent conditions.

[0005] This application provides an overcurrent protection circuit for an electromagnet, comprising:

[0006] An enable control circuit is used to receive control signals and enable signals from the control circuit, and output drive signals based on the control signals and enable signals;

[0007] A driving circuit is connected to the enable control circuit and the first end of the electromagnet, respectively. The driving circuit is used to receive the driving signal and drive the electromagnet based on the driving signal.

[0008] A low-side current sampling circuit, connected to the driving circuit, is used to sample and output a low-side overcurrent signal;

[0009] The overcurrent latch-up circuit is connected to the power supply, the low-side current sampling circuit, and the enable control circuit, respectively.

[0010] A high-side current sampling circuit is connected to the overcurrent latch-up circuit, the driving circuit, and the second terminal of the electromagnet, respectively, and is used to sample and output a high-side overcurrent signal; the power supply is used to supply power to the electromagnet through the overcurrent latch-up circuit and the high-side current sampling circuit;

[0011] The overcurrent latching circuit is used to receive the low-side overcurrent signal and control the electromagnet to de-energize through the high-side current sampling circuit; the overcurrent latching circuit is also used to receive the high-side overcurrent signal and, based on the high-side overcurrent signal, output an intercept signal to the enable control circuit and output a latching signal to the control circuit.

[0012] In some embodiments, the overcurrent latching circuit includes a first capacitor, a first resistor, a second resistor, a second capacitor, a third resistor, a first switching transistor, a photodiode, a fourth resistor, a second switching transistor, a fifth resistor, a sixth resistor, a third capacitor, a seventh resistor, and an eighth resistor.

[0013] One end of the first capacitor is grounded, and the other end of the first capacitor is connected to the power supply and the first end of the high-side current sampling circuit, respectively. The first end of the first switch is connected between the other end of the first capacitor and the first end of the high-side current sampling circuit. The second end of the first switch is connected to the positive terminal of the photodiode. The negative terminal of the photodiode is connected through one end of the fifth resistor and the sixth resistor. The other end of the sixth resistor is grounded. The third end of the first switch is connected to the low-side current sampling circuit through the second resistor. The first end of the second switch is connected between the third end of the first switch and the second resistor through the fourth resistor. The second end of the second switch is connected to the other end of the sixth resistor. The third end of the second switch is connected between one end of the fifth resistor and the sixth resistor.

[0014] One end of the first resistor is connected between the other end of the first capacitor and the first end of the first switching transistor. The other end of the first resistor is connected between the second resistor and the low-side current sampling circuit. One end of the third resistor is connected between the first end of the first resistor and the first end of the first switching transistor. The other end of the third resistor is connected between the third end of the first switching transistor and the second resistor. One end of the second capacitor is connected between the first end of the third resistor and the third end of the first resistor. The other end of the second capacitor is connected between the second end of the third resistor and the second resistor. One end of the seventh resistor is connected between the fifth resistor and the sixth resistor. The other end of the seventh resistor is connected to the second end of the high-side current sampling circuit. One end of the eighth resistor is connected between the second end of the seventh resistor and the second end of the high-side current sampling circuit. The other end of the eighth resistor is grounded. One end of the third capacitor is connected between the sixth resistor and the third end of the third capacitor. The third end of the high-side current sampling circuit is connected between the second end of the first switching transistor and the positive terminal of the photodiode. The enable control circuit is connected between the first end of the second switching transistor and the fourth resistor.

[0015] In some embodiments, the high-side current sampling circuit includes a first diode, a ninth resistor, a tenth resistor, a third switch, a fourth switch, an eleventh resistor, a twelfth resistor, a fourth capacitor, a thirteenth resistor, and a fifth capacitor.

[0016] The first terminal of the third switch is connected to the other terminal of the first capacitor. The second terminal of the third switch is connected to one terminal of the fifth capacitor through the eleventh resistor. The other terminal of the fifth capacitor is grounded. The third terminal of the third switch is grounded through the tenth resistor. The anode of the first diode is connected between the second terminal of the first switch and the anode of the photodiode. The cathode of the first diode is connected to one terminal of the ninth resistor. The other terminal of the ninth resistor is connected between the first terminal of the third switch and the other terminal of the first capacitor. The third terminal of the ninth resistor is also connected between the third terminal of the third switch and the tenth resistor. The first terminal of the fourth switch is connected to the... Between the second terminal and the eleventh resistor, the second terminal of the fourth switch is connected to the other end of the seventh resistor, and the third terminal of the fourth switch is connected through the thirteenth resistor to the eleventh resistor and one end of the fifth capacitor; one end of the twelfth resistor is connected to the first terminal of the fourth switch, and the other end of the twelfth resistor is connected to the third terminal of the fourth switch; one end of the fourth capacitor is connected between the twelfth resistor and the first terminal of the fourth switch, and the other end of the fourth capacitor is connected between the twelfth resistor and the third terminal of the fourth switch; the second terminal of the drive circuit and the electromagnet is connected between the eleventh resistor and one end of the fifth capacitor.

[0017] In some embodiments, when the overcurrent latching circuit receives the low-side overcurrent signal, the first switch is turned on, the third switch is turned off, and the electromagnet is de-energized.

[0018] When the overcurrent latching circuit receives the high-side overcurrent signal, the fourth switch is turned on, the second switch is turned on, and the enable control circuit stops outputting the drive signal.

[0019] In some embodiments, the enable control circuit includes an enable signal interception circuit and a buffer controller. The input terminal of the enable signal interception circuit is connected to the control circuit and the overcurrent latch-up circuit, respectively. The output terminal of the enable signal interception circuit is connected to the first input terminal of the buffer controller. The second input terminal of the buffer controller is connected to the control circuit. The output terminal of the buffer controller is connected to the drive circuit.

[0020] In some embodiments, the enable signal interception circuit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a sixth capacitor, a fifth switch, and a seventeenth resistor; the first terminal of the fifth switch receives a first reference voltage through the seventeenth resistor, the second terminal of the fifth switch is grounded, the first input terminal of the buffer controller is connected between the first terminal of the fifth switch and the seventeenth resistor, the third terminal of the seventeenth resistor is connected to the control circuit through the fifteenth and fourteenth resistors, the overcurrent latch-up circuit is connected between the fourteenth and fifteenth resistors, one end of the sixteenth resistor is connected to the third terminal of the fifth switch, the other end of the sixteenth resistor is connected to the second terminal of the fifth switch, one end of the sixth capacitor is connected between the third terminal of the fifth switch and one end of the sixteenth resistor, and the other end of the sixth capacitor is connected between the other end of the sixteenth resistor and the second terminal of the fifth switch.

[0021] In some embodiments, the driving circuit includes an eighteenth resistor, a sixth switch, and a second diode. The first terminal of the sixth switch is connected to the anode of the second diode, and the cathode of the second diode is connected to the high-side current sampling circuit. The first terminal of the electromagnet is connected between the first terminal of the sixth switch and the anode of the second diode. The second terminal of the electromagnet is connected to the high-side current sampling circuit. The second terminal of the sixth switch is connected to the first input terminal of the low-side current sampling circuit. The third terminal of the sixth switch is connected to the output terminal of the buffer controller through the eighteenth resistor. The second input terminal of the low-side current sampling circuit is connected between the third terminal of the sixth switch and the eighteenth resistor.

[0022] In some embodiments, the low-side current sampling circuit includes a third diode, a fourth diode, a nineteenth resistor, a twentieth resistor, a seventh switch, and a twenty-first resistor; one end of the twenty-first resistor is connected to the second end of the sixth switch, and the other end of the twenty-first resistor is grounded; the anode of the third diode is connected to the overcurrent latch-up circuit, and the cathode of the third diode is connected to the cathode of the fourth diode; the anode of the fourth diode is connected through the nineteenth resistor between one end of the twenty-first resistor and the second end of the sixth switch; the first end of the seventh switch is connected between the cathodes of the third diode and the fourth diode; the second end of the seventh switch is connected to the other end of the twenty-first resistor; the third end of the seventh switch is connected through the twenty-first resistor between one end of the twenty-first resistor and the nineteenth resistor; and the anode of the fourth diode is connected between the eighteenth resistor and the third end of the sixth switch.

[0023] In some embodiments, the overcurrent protection circuit further includes a fifth diode, a sixth diode, a twenty-second resistor, a twenty-third resistor, and a seventh capacitor. The anode of the fifth diode is connected to the enable control circuit, and the cathode of the fifth diode is connected to the cathode of the sixth diode. The anode of the sixth diode is connected to the control circuit through the twenty-second resistor. One end of the twenty-third resistor is connected between the anode of the sixth diode and the twenty-second resistor, and the other end of the twenty-third resistor receives a second reference voltage. One end of the seventh capacitor is connected to the other end of the twenty-third resistor, and the other end of the seventh capacitor is connected between the twenty-second resistor and the control circuit. The overcurrent lockout circuit is connected between the cathodes of the fifth diode and the sixth diode.

[0024] This application also provides an electronic device including the overcurrent protection circuit described above.

[0025] The beneficial effects of this application are as follows: This application uses a low-side current sampling circuit to sample the low-side current of the electromagnet in real time, and a high-side current sampling circuit to sample the high-side current, forming a dual sampling method, which makes the monitoring of the electromagnet current more comprehensive. Furthermore, through the setting of an overcurrent latch-up circuit and an enable control circuit, the overcurrent latch-up circuit, upon receiving a low-side overcurrent signal, directly and quickly controls the electromagnet to de-energize through the high-side current sampling circuit. Upon receiving a high-side overcurrent signal, it outputs an interception signal to the enable control circuit to intercept the drive signal output by the enable control circuit, and simultaneously outputs a latch-up signal to the control circuit. The electromagnet's drive requires the enable control circuit to output a drive signal to trigger it, which makes the electromagnet's drive process more precise. Compared with existing skeet machine electronic control systems, this solves the problem of frequent triggering and switching on, reduces the burden on the drive circuit, and reduces the risk of damage. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0027] Figure 1 This is a circuit diagram of an embodiment of the overcurrent protection circuit for the electromagnet provided in this application;

[0028] Figure 2 This is a circuit diagram of an embodiment of the overcurrent latch-up circuit and high-side current sampling circuit provided in this application;

[0029] Figure 3This is a circuit diagram of one embodiment of the enable control circuit provided in this application;

[0030] Figure 4 This is a circuit diagram of an embodiment of the driving circuit and low-side current sampling circuit provided in this application. Detailed Implementation

[0031] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0033] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly indicating the number, specific order, or primary and secondary relationship of the indicated technical features.

[0034] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0035] Please see Figure 1 As shown, Figure 1 This is a circuit diagram of an embodiment of the overcurrent protection circuit for an electromagnet provided in this application; the overcurrent protection circuit 100 of this embodiment includes an enable control circuit 10, a drive circuit 20, a low-side current sampling circuit 30, an overcurrent lockout circuit 40, and a high-side current sampling circuit 50.

[0036] The enable control circuit 10 is used to receive the control signal and enable signal from the control circuit (not shown), and output the drive signal based on the control signal and enable signal.

[0037] The control circuit includes, but is not limited to, the main controller of the pattern machine, such as a microcontroller unit (MCU).

[0038] In some embodiments, the enable control circuit 10 receives multiple control signals and an enable signal from the control circuit, and outputs multiple drive signals based on the multiple control signals and the enable signal; wherein the multiple control signals are configured correspondingly to the multiple drive signals; in this case, the multiple drive signals drive multiple electromagnets, and the multiple electromagnets are configured correspondingly to the multiple drive signals. For example, the enable control circuit 10 receives four control signals and one enable signal from the control circuit, and outputs four drive signals to drive four electromagnets.

[0039] The drive circuit 20 is connected to the enable control circuit 10 and the first terminal of the electromagnet CN. The drive circuit 20 is used to receive drive signals and drive the electromagnet CN based on the drive signals. The low-side current sampling circuit 30 is connected to the drive circuit 20 and is used to sample and output the low-side overcurrent signal.

[0040] The overcurrent lockout circuit 40 is connected to the power supply (not shown), the low-side current sampling circuit 30, and the enable control circuit 10, respectively.

[0041] The power supply includes, but is not limited to, +27V or +24V.

[0042] The high-side current sampling circuit 50 is connected to the overcurrent latch-up circuit 40, the drive circuit 20, and the second terminal of the electromagnet CN, respectively, and is used to sample and output the high-side overcurrent signal. The power supply is used to power the electromagnet CN through the overcurrent latch-up circuit 40 and the high-side current sampling circuit 50.

[0043] The overcurrent latch-up circuit 40 is used to receive the low-side overcurrent signal and control the electromagnet CN to de-energize through the high-side current sampling circuit 50. The overcurrent latch-up circuit 40 is also used to receive the high-side overcurrent signal and, based on the high-side overcurrent signal, output an intercept signal to the enable control circuit 10 and an output latch-up signal to the control circuit.

[0044] In some embodiments, when the low-side current sampling circuit 30 samples an overcurrent signal, it outputs a low-side overcurrent signal to the overcurrent latching circuit 40. The overcurrent latching circuit 40 controls the high-side current sampling circuit 50 to disconnect, thereby de-energizing the electromagnet CN. When the high-side current sampling circuit 50 samples an overcurrent signal, it outputs a high-side overcurrent signal to the overcurrent latching circuit 40. The overcurrent latching circuit 40 outputs an intercept signal to the enable control circuit 10, preventing the enable control circuit 10 from outputting a drive signal. Simultaneously, the overcurrent latching circuit 40 outputs a latching signal to the control circuit, notifying the control circuit that the overcurrent protection circuit 100 has entered the latching state. The control circuit stops outputting the enable signal to the enable control circuit 10. At this time, the relationship between the low-side current sampling circuit 30 and the high-side current sampling circuit 50 is OR. The overcurrent latching circuit 40 only needs one overcurrent signal (low-side overcurrent signal and high-side overcurrent signal) to trigger the latching state.

[0045] This embodiment uses a low-side current sampling circuit 30 to sample the low-side current of electromagnet CN in real time, and a high-side current sampling circuit 50 to sample the high-side current, forming a dual sampling method to make the monitoring of the current of electromagnet CN more comprehensive. Furthermore, through the setting of an overcurrent lockout circuit 40 and an enable control circuit 10, when the overcurrent lockout circuit 40 receives a low-side overcurrent signal, it directly and quickly controls the electromagnet CN to de-energize via the high-side current sampling circuit 50. When it receives a high-side overcurrent signal, it outputs an interception signal to the enable control circuit 10 to intercept the drive signal output by the enable control circuit 10, and simultaneously outputs a lockout signal to the control circuit. The drive of electromagnet CN requires the enable control circuit 10 to output a drive signal to trigger it, which makes the drive process of electromagnet CN more precise. Compared with existing pattern machine electronic control systems, this solves the problem of frequent triggering and turns-on, reduces the burden on the drive circuit 20, and reduces the risk of damage.

[0046] According to some embodiments of this application, see Figure 2 As shown, Figure 2 This is a circuit diagram of an embodiment of the overcurrent latch-up circuit and high-side current sampling circuit provided in this application; the overcurrent latch-up circuit 40 of this embodiment includes a first capacitor C1, a first resistor R1, a second resistor R2, a second capacitor C2, a third resistor R3, a first switch Q1, a photodiode D10, a fourth resistor R4, a second switch Q2, a fifth resistor R5, a sixth resistor R6, a third capacitor C3, a seventh resistor R7, and an eighth resistor R8.

[0047] One end of the first capacitor C1 is grounded, and the other end of the first capacitor C1 is connected to the power supply (+27V) and the first end of the high-side current sampling circuit 50. The first end of the first switch Q1 is connected between the other end of the first capacitor C1 and the first end of the high-side current sampling circuit 50. The second end of the first switch Q1 is connected to the positive terminal of the photodiode D10. The negative terminal of the photodiode D10 is connected through one end of the fifth resistor R5 and the sixth resistor R6. The other end of the sixth resistor R6 is grounded. The third end of the first switch Q1 is connected to the low-side current sampling circuit 30 through the second resistor R2. The first end of the second switch Q2 is connected between the third end of the first switch Q1 and the second resistor R2 through the fourth resistor R4. The second end of the second switch Q2 is connected to the other end of the sixth resistor R6. The third end of the second switch Q2 is connected between one end of the fifth resistor R5 and the sixth resistor R6.

[0048] One end of the first resistor R1 is connected between the other end of the first capacitor C1 and the first end of the first switch Q1. The other end of the first resistor R1 is connected between the second resistor R2 and the low-side current sampling circuit 30. One end of the third resistor R3 is connected between one end of the first resistor R1 and the first end of the first switch Q1. The other end of the third resistor R3 is connected between the third end of the first switch Q1 and the second resistor R2. One end of the second capacitor C2 is connected between one end of the third resistor R3 and one end of the first resistor R1. The other end of the second capacitor C2 is connected between the other end of the third resistor R3 and the second resistor R2.

[0049] One end of the seventh resistor R7 is connected to one end of the fifth resistor R5 and the sixth resistor R6. The other end of the seventh resistor R7 is connected to the second end of the high-side current sampling circuit 50. One end of the eighth resistor R8 is connected between the other end of the seventh resistor R7 and the second end of the high-side current sampling circuit 50. The other end of the eighth resistor R8 is grounded. One end of the third capacitor C3 is connected to one end of the sixth resistor R6. The other end of the third capacitor C3 is connected to the other end of the sixth resistor R6. The third end of the high-side current sampling circuit 50 is connected between the second end of the first switch Q1 and the positive terminal of the photodiode D10. The enable control circuit 10 is connected between the first end of the second switch Q2 and the fourth resistor R4.

[0050] For example, such as Figure 3 As shown, the overcurrent latch-up circuit 40 receives the low-side overcurrent signal / OCP from the low-side current sampling circuit 30, and the overcurrent latch-up circuit 40 outputs the intercept signal OCP_IN and the latch-up signal OCP_DET.

[0051] Optionally, the first switching transistor Q1 is a PNP transistor, and the second switching transistor Q2 is an NPN transistor. The first terminal of the first switching transistor Q1 and the second terminal of the second switching transistor Q2 are the emitters, the second terminal of the first switching transistor Q1 and the first terminal of the second switching transistor Q2 are the collectors, and the third terminal of the first switching transistor Q1 and the third terminal of the second switching transistor Q2 are the bases. In other embodiments, the first switching transistor Q1 and the second switching transistor Q2 can be replaced by other switching transistors, such as MOSFETs.

[0052] According to some embodiments of this application, see Figure 2 As shown, the high-side current sampling circuit 50 includes a first diode D1, a ninth resistor R9, a tenth resistor R10, a third switch Q3, a fourth switch Q4, an eleventh resistor R11, a twelfth resistor R12, a fourth capacitor C4, a thirteenth resistor R13, and a fifth capacitor C5.

[0053] The first terminal of the third switch Q3 is connected to the other terminal of the first capacitor C1. The second terminal of the third switch Q3 is connected to one terminal of the fifth capacitor C5 through the eleventh resistor R11. The other terminal of the fifth capacitor C5 is grounded. The third terminal of the third switch Q3 is grounded through the tenth resistor R10. The anode of the first diode D1 is connected between the second terminal of the first switch Q1 and the anode of the photodiode D10. The cathode of the first diode D1 is connected to one terminal of the ninth resistor R9. The other terminal of the ninth resistor R9 is connected between the first terminal of the third switch Q3 and the other terminal of the first capacitor C1. The other terminal of the ninth resistor R9 is connected between the third terminal of the third switch Q3 and the tenth resistor R10.

[0054] The first terminal of the fourth switch Q4 is connected between the second terminal of the third switch Q3 and the eleventh resistor R11. The second terminal of the fourth switch Q4 is connected to the other terminal of the seventh resistor R7. The third terminal of the fourth switch Q4 is connected between the eleventh resistor R11 and one terminal of the fifth capacitor C5 through the thirteenth resistor R13. One terminal of the twelfth resistor R12 is connected to the first terminal of the fourth switch Q4. The other terminal of the twelfth resistor R12 is connected to the third terminal of the fourth switch Q4. One terminal of the fourth capacitor C4 is connected between one terminal of the twelfth resistor R12 and the first terminal of the fourth switch Q4. The other terminal of the fourth capacitor C4 is connected between the other terminal of the twelfth resistor R12 and the third terminal of the fourth switch Q4. The second terminal of the drive circuit 20 and the electromagnet CN is connected between the eleventh resistor R11 and one terminal of the fifth capacitor C5.

[0055] Among them, the eleventh resistor R11 is the sampling resistor.

[0056] Optionally, the third switch Q3 is a PMOS transistor, with its first terminal being the source, its second terminal being the drain, and its third terminal being the gate; the fourth switch Q4 is a PNP transistor, with its first terminal being the emitter, its second terminal being the collector, and its third terminal being the base. In other embodiments, the third switch Q3 and the fourth switch Q4 can be replaced with other switches.

[0057] According to some embodiments of this application, when the overcurrent latching circuit 40 receives a low-side overcurrent signal, the first switch Q1 is turned on, the third switch Q3 is turned off, and the electromagnet CN is de-energized; when the overcurrent latching circuit 40 receives a high-side overcurrent signal, the fourth switch Q4 is turned on, the second switch Q2 is turned on, and the enable control circuit 10 stops outputting the drive signal.

[0058] In some embodiments, when the overcurrent latching circuit 40 receives a low-side overcurrent signal, due to the presence of the power supply (+27V), the first switch Q1 and the third switch Q3 are turned on, the low-side overcurrent signal triggers the overcurrent latching circuit 40, the second resistor R2 is pulled low to turn off the third switch Q3, thereby cutting off the power supply to the electromagnet CN; at the same time, the photodiode D10 lights up.

[0059] In some embodiments, when the overcurrent latching circuit 40 receives a high-side overcurrent signal, i.e., the eleventh resistor R11 samples an overcurrent, the fourth switch Q4 is turned on, the high-side overcurrent signal triggers the overcurrent latching circuit 40 through the fourth switch Q4, the second switch Q2 is turned on, and the overcurrent latching circuit 40 outputs an intercept signal (active low) to the enable control circuit 10 so that the enable control circuit 10 stops outputting the drive signal.

[0060] In this embodiment, the de-energization process of electromagnet CN is fast and reliable through the coordinated action of the first switch Q1 and the third switch Q3; through the coordinated action of the fourth switch Q4 and the second switch Q2, the enable control circuit 10 can be quickly prevented from outputting the drive signal, and the control circuit can be notified in time that it has entered the lock-up state.

[0061] According to some embodiments of this application, see Figure 3 As shown, Figure 3 This is a circuit diagram of an embodiment of the enable control circuit provided in this application; the enable control circuit 10 of this embodiment includes an enable signal interception circuit 11 and a buffer controller U1. The input terminal of the enable signal interception circuit 11 is connected to the control circuit and the overcurrent lockout circuit 40 respectively. The output terminal of the enable signal interception circuit 11 is connected to the first input terminal of the buffer controller U1. The second input terminal of the buffer controller U1 is connected to the control circuit. The output terminal of the buffer controller U1 is connected to the drive circuit 20.

[0062] Among them, the buffer controller U1 includes, but is not limited to, an eight-way bus buffer controller.

[0063] In some embodiments, the buffer controller U1 receives control signals from four control circuits and an enable signal from the enable signal interception circuit 11, and outputs four drive signals based on the enable signal and the four control signals.

[0064] For example, such as Figure 3As shown, the buffer controller U1 has 8 input pins (A1-A8), 8 output pins (Y1-Y8), and 2 enable pins ( / OE1 and / OE2). The buffer controller U1 receives 4 control signals from the control circuit through the input pins (A3-A6), namely OUT1_DRV, OUT2_DRV, OUT3_DRV, and OUT4_DRV. The buffer controller U1 receives the enable signal / OUT_EN from the enable signal interception circuit 11 through the enable pins ( / OE1 and / OE2). The buffer controller U1 outputs 4 drive signals through the output pins (Y3-Y6), namely OT1, OT2, OT3, and OT4.

[0065] According to some embodiments of this application, see Figure 3 As shown, the enable signal interception circuit 11 includes a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a sixth capacitor C6, a fifth switch Q5, and a seventeenth resistor R17.

[0066] The first terminal of the fifth switch Q5 receives the first reference voltage (+5V) through the seventeenth resistor R17. The second terminal of the fifth switch Q5 is grounded. The first input terminal (such as two enable pins) of the buffer controller U1 is connected between the first terminal of the fifth switch Q5 and the seventeenth resistor R17. The third terminal of the seventeenth resistor R17 is connected to the control circuit through the fifteenth resistor R15 and the fourteenth resistor R14. The overcurrent latch-up circuit 40 is connected between the fourteenth resistor R14 and the fifteenth resistor R15. One end of the sixteenth resistor R16 is connected to the third terminal of the fifth switch Q5, and the other end of the sixteenth resistor R16 is connected to the second terminal of the fifth switch Q5. One end of the sixth capacitor C6 is connected between the third terminal of the fifth switch Q5 and one end of the sixteenth resistor R16, and the other end of the sixth capacitor C6 is connected between the other end of the sixteenth resistor R16 and the second terminal of the fifth switch Q5.

[0067] In some embodiments, when the enable signal interception circuit 11 receives an enable signal from the control circuit and does not receive an interception signal, the fifth switch Q5 is turned on, and the enable signal interception circuit 11 outputs a low-level enable signal. When the enable signal interception circuit 11 receives an interception signal from the overcurrent latch-up circuit 40, the fifth switch Q5 is turned off, and the enable signal interception circuit 11 outputs a high-level enable signal. At this time, the buffer controller U1 stops outputting drive signals based on the high-level enable signal. The buffer controller U1 is enabled at a low level.

[0068] For example, such as Figure 3 As shown, the enable signal interception circuit 11 receives the enable signal OUT_EN from the control circuit, outputs the enable signal / OUT_EN, and receives the interception signal OCP_IN from the overcurrent lockout circuit 40.

[0069] Optionally, the fifth switch Q5 is an NPN transistor, with its first terminal being the collector, its second terminal being the emitter, and its third terminal being the base. In other embodiments, the fifth switch Q5 can be replaced by other switches, such as a MOSFET.

[0070] According to some embodiments of this application, see Figure 4 As shown, Figure 4 This is a circuit diagram of an embodiment of the driving circuit and low-side current sampling circuit provided in this application; the driving circuit 20 of this embodiment includes an eighteenth resistor R18, a sixth switch Q6, and a second diode D2.

[0071] The first terminal of the sixth switch Q6 is connected to the positive terminal of the second diode D2, and the negative terminal of the second diode D2 is connected to the high-side current sampling circuit 50. The first terminal of the electromagnet CN is connected between the first terminal of the sixth switch Q6 and the positive terminal of the second diode D2. The second terminal of the electromagnet CN is connected to the high-side current sampling circuit 50. The second terminal of the sixth switch Q6 is connected to the first input terminal of the low-side current sampling circuit 30. The third terminal of the sixth switch Q6 is connected to the output terminal of the buffer controller U1 through the eighteenth resistor R18. The second input terminal of the low-side current sampling circuit 30 is connected between the third terminal of the sixth switch Q6 and the eighteenth resistor R18.

[0072] In some embodiments, the drive circuit 20 receives a drive signal, the sixth switch Q6 is turned on, and the electromagnet CN is triggered. For example, as... Figure 4 As shown, the drive circuit 20 receives the drive signal OT1.

[0073] According to some embodiments of this application, see Figure 4 As shown, the low-side current sampling circuit 30 includes a third diode D3, a fourth diode D4, a nineteenth resistor R19, a twentieth resistor R20, a seventh switch Q7, and a twenty-first resistor R21.

[0074] One end of the 21st resistor R21 is connected to the second end of the 6th switch Q6, and the other end of the 21st resistor R21 is grounded. The anode of the 3rd diode D3 is connected to the overcurrent lockout circuit 40, and the cathode of the 3rd diode D3 is connected to the cathode of the 4th diode D4. The anode of the 4th diode D4 is connected between one end of the 21st resistor R21 and the second end of the 6th switch Q6 through the 19th resistor R19. The first end of the 7th switch Q7 is connected between the cathode of the 3rd diode D3 and the cathode of the 4th diode D4. The second end of the 7th switch Q7 is connected to the other end of the 21st resistor R21. The third end of the 7th switch Q7 is connected between one end of the 21st resistor R21 and the 19th resistor R19 through the 20th resistor R20. The anode of the 4th diode D4 is connected between the 18th resistor R18 and the third end of the 6th switch Q6.

[0075] Among them, the twenty-first resistor R21 is the sampling resistor, and the third diode D3 and the fourth diode D4 are Zener diodes.

[0076] Optionally, the sixth switch Q6 is an NMOS transistor, with its first terminal being the drain, its second terminal being the source, and its third terminal being the gate; the seventh switch Q7 is a PNP transistor, with its first terminal being the collector, its second terminal being the emitter, and its third terminal being the base. In other embodiments, the sixth and seventh switches Q6 can be replaced with other switches.

[0077] According to some embodiments of this application, see Figure 2 As shown, the overcurrent protection circuit 100 of this embodiment further includes a fifth diode D5, a sixth diode D6, a twenty-second resistor R22, a twenty-third resistor R23, and a seventh capacitor C7. The positive terminal of the fifth diode D5 is connected to the enable control circuit 10, and the negative terminal of the fifth diode D5 is connected to the negative terminal of the sixth diode D6. The positive terminal of the sixth diode D6 is connected to the control circuit through the twenty-second resistor R22. One end of the twenty-third resistor R23 is connected between the positive terminal of the sixth diode D6 and the twenty-second resistor R22, and the other end of the twenty-third resistor R23 receives a second reference voltage (+3.3V). One end of the seventh capacitor C7 is connected to the other end of the twenty-third resistor R23, and the other end of the seventh capacitor C7 is connected between the twenty-second resistor R22 and the control circuit. The overcurrent lockout circuit 40 is connected between the negative terminals of the fifth diode D5 and the sixth diode D6.

[0078] Another embodiment of this application provides an electronic device, including the overcurrent protection circuit 100 of the above embodiment. The electronic device includes, but is not limited to, a pattern machine electronic control system.

[0079] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. An overcurrent protection circuit for an electromagnet, characterized in that, include: An enable control circuit is used to receive control signals and enable signals from the control circuit, and output drive signals based on the control signals and enable signals; A driving circuit is connected to the enable control circuit and the first end of the electromagnet, respectively. The driving circuit is used to receive the driving signal and drive the electromagnet based on the driving signal. A low-side current sampling circuit, connected to the driving circuit, is used to sample and output a low-side overcurrent signal; The overcurrent latch-up circuit is connected to the power supply, the low-side current sampling circuit, and the enable control circuit, respectively. A high-side current sampling circuit is connected to the overcurrent latch-up circuit, the driving circuit, and the second terminal of the electromagnet, respectively, and is used to sample and output a high-side overcurrent signal; the power supply is used to supply power to the electromagnet through the overcurrent latch-up circuit and the high-side current sampling circuit; The overcurrent latching circuit is used to receive the low-side overcurrent signal and control the electromagnet to de-energize through the high-side current sampling circuit; the overcurrent latching circuit is also used to receive the high-side overcurrent signal and, based on the high-side overcurrent signal, output an intercept signal to the enable control circuit and output a latching signal to the control circuit.

2. The overcurrent protection circuit according to claim 1, characterized in that, The overcurrent locking circuit includes a first capacitor, a first resistor, a second resistor, a second capacitor, a third resistor, a first switching transistor, a photodiode, a fourth resistor, a second switching transistor, a fifth resistor, a sixth resistor, a third capacitor, a seventh resistor, and an eighth resistor. One end of the first capacitor is grounded, and the other end of the first capacitor is connected to the power supply and the first end of the high-side current sampling circuit, respectively. The first end of the first switch is connected between the other end of the first capacitor and the first end of the high-side current sampling circuit. The second end of the first switch is connected to the positive terminal of the photodiode. The negative terminal of the photodiode is connected through one end of the fifth resistor and the sixth resistor. The other end of the sixth resistor is grounded. The third end of the first switch is connected to the low-side current sampling circuit through the second resistor. The first end of the second switch is connected between the third end of the first switch and the second resistor through the fourth resistor. The second end of the second switch is connected to the other end of the sixth resistor. The third end of the second switch is connected between one end of the fifth resistor and the sixth resistor. One end of the first resistor is connected between the other end of the first capacitor and the first end of the first switching transistor. The other end of the first resistor is connected between the second resistor and the low-side current sampling circuit. One end of the third resistor is connected between the first end of the first resistor and the first end of the first switching transistor. The other end of the third resistor is connected between the third end of the first switching transistor and the second resistor. One end of the second capacitor is connected between the first end of the third resistor and the third end of the first resistor. The other end of the second capacitor is connected between the second end of the third resistor and the second resistor. One end of the seventh resistor is connected between the fifth resistor and the sixth resistor. The other end of the seventh resistor is connected to the second end of the high-side current sampling circuit. One end of the eighth resistor is connected between the second end of the seventh resistor and the second end of the high-side current sampling circuit. The other end of the eighth resistor is grounded. One end of the third capacitor is connected between the sixth resistor and the third end of the third capacitor. The third end of the high-side current sampling circuit is connected between the second end of the first switching transistor and the positive terminal of the photodiode. The enable control circuit is connected between the first end of the second switching transistor and the fourth resistor.

3. The overcurrent protection circuit according to claim 2, characterized in that, The high-side current sampling circuit includes a first diode, a ninth resistor, a tenth resistor, a third switch, a fourth switch, an eleventh resistor, a twelfth resistor, a fourth capacitor, a thirteenth resistor, and a fifth capacitor. The first terminal of the third switch is connected to the other terminal of the first capacitor. The second terminal of the third switch is connected to one terminal of the fifth capacitor through the eleventh resistor. The other terminal of the fifth capacitor is grounded. The third terminal of the third switch is grounded through the tenth resistor. The anode of the first diode is connected between the second terminal of the first switch and the anode of the photodiode. The cathode of the first diode is connected to one terminal of the ninth resistor. The other terminal of the ninth resistor is connected between the first terminal of the third switch and the other terminal of the first capacitor. The third terminal of the ninth resistor is also connected between the third terminal of the third switch and the tenth resistor. The first terminal of the fourth switch is connected to the... Between the second terminal and the eleventh resistor, the second terminal of the fourth switch is connected to the other end of the seventh resistor, and the third terminal of the fourth switch is connected through the thirteenth resistor to the eleventh resistor and one end of the fifth capacitor; one end of the twelfth resistor is connected to the first terminal of the fourth switch, and the other end of the twelfth resistor is connected to the third terminal of the fourth switch; one end of the fourth capacitor is connected between the twelfth resistor and the first terminal of the fourth switch, and the other end of the fourth capacitor is connected between the twelfth resistor and the third terminal of the fourth switch; the second terminal of the drive circuit and the electromagnet is connected between the eleventh resistor and one end of the fifth capacitor.

4. The overcurrent protection circuit according to claim 3, characterized in that, When the overcurrent latching circuit receives the low-side overcurrent signal, the first switch is turned on, the third switch is turned off, and the electromagnet is de-energized. When the overcurrent latching circuit receives the high-side overcurrent signal, the fourth switch is turned on, the second switch is turned on, and the enable control circuit stops outputting the drive signal.

5. The overcurrent protection circuit according to claim 1, characterized in that, The enable control circuit includes an enable signal interception circuit and a buffer controller. The input terminal of the enable signal interception circuit is connected to the control circuit and the overcurrent lockout circuit, respectively. The output terminal of the enable signal interception circuit is connected to the first input terminal of the buffer controller. The second input terminal of the buffer controller is connected to the control circuit. The output terminal of the buffer controller is connected to the drive circuit.

6. The overcurrent protection circuit according to claim 5, characterized in that, The enable signal interception circuit includes a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a sixth capacitor, a fifth switch, and a seventeenth resistor. The first terminal of the fifth switch receives a first reference voltage through the seventeenth resistor, and the second terminal of the fifth switch is grounded. The first input terminal of the buffer controller is connected between the first terminal of the fifth switch and the seventeenth resistor. The third terminal of the seventeenth resistor is connected to the control circuit through the fifteenth and fourteenth resistors. The overcurrent latch-up circuit is connected between the fourteenth and fifteenth resistors. One end of the sixteenth resistor is connected to the third terminal of the fifth switch, and the other end of the sixteenth resistor is connected to the second terminal of the fifth switch. One end of the sixth capacitor is connected between the third terminal of the fifth switch and one end of the sixteenth resistor, and the other end of the sixth capacitor is connected between the other end of the sixteenth resistor and the second terminal of the fifth switch.

7. The overcurrent protection circuit according to claim 6, characterized in that, The driving circuit includes an eighteenth resistor, a sixth switch, and a second diode. The first terminal of the sixth switch is connected to the anode of the second diode, and the cathode of the second diode is connected to the high-side current sampling circuit. The first terminal of the electromagnet is connected between the first terminal of the sixth switch and the anode of the second diode. The second terminal of the electromagnet is connected to the high-side current sampling circuit. The second terminal of the sixth switch is connected to the first input terminal of the low-side current sampling circuit. The third terminal of the sixth switch is connected to the output terminal of the buffer controller through the eighteenth resistor. The second input terminal of the low-side current sampling circuit is connected between the third terminal of the sixth switch and the eighteenth resistor.

8. The overcurrent protection circuit according to claim 7, characterized in that, The low-side current sampling circuit includes a third diode, a fourth diode, a nineteenth resistor, a twentieth resistor, a seventh switch, and a twenty-first resistor. One end of the twenty-first resistor is connected to the second end of the sixth switch, and the other end of the twenty-first resistor is grounded. The anode of the third diode is connected to the overcurrent latch-up circuit, and the cathode of the third diode is connected to the cathode of the fourth diode. The anode of the fourth diode is connected through the nineteenth resistor between one end of the twenty-first resistor and the second end of the sixth switch. The first end of the seventh switch is connected between the cathodes of the third and fourth diodes. The second end of the seventh switch is connected to the other end of the twenty-first resistor. The third end of the seventh switch is connected through the twenty-first resistor between one end of the twenty-first resistor and the nineteenth resistor. The anode of the fourth diode is connected between the eighteenth resistor and the third end of the sixth switch.

9. The overcurrent protection circuit according to claim 1, characterized in that, The overcurrent protection circuit further includes a fifth diode, a sixth diode, a twenty-second resistor, a twenty-third resistor, and a seventh capacitor. The anode of the fifth diode is connected to the enable control circuit, and the cathode of the fifth diode is connected to the cathode of the sixth diode. The anode of the sixth diode is connected to the control circuit through the twenty-second resistor. One end of the twenty-third resistor is connected between the anode of the sixth diode and the twenty-second resistor, and the other end of the twenty-third resistor receives a second reference voltage. One end of the seventh capacitor is connected to the other end of the twenty-third resistor, and the other end of the seventh capacitor is connected between the twenty-second resistor and the control circuit. The overcurrent lockout circuit is connected between the cathodes of the fifth diode and the sixth diode.

10. An electronic device, characterized in that, Includes the overcurrent protection circuit as described in any one of claims 1-9.

Images