Voltage reference source start-up delay circuit and power supply device

Abstract

The application relates to the field of power electronics, and discloses a voltage reference source starting delay circuit and a power supply device. The circuit sets a delay starting circuit at the power input end of the reference source, and drives the delay starting circuit through an enable signal, so that the reference source outputs a reference source signal after a buck circuit establishes an output power supply voltage. In this way, the problem that an existing operational amplifier conditioning delay circuit cannot guarantee that the reference source outputs an accurate voltage is solved, the reference source signal is guaranteed to lag behind the power supply voltage, and the amplitude of the reference source signal is prevented from exceeding the amplitude of the power supply voltage during the starting process.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and in particular to a voltage reference source start-up delay circuit and power supply device. Background Technology

[0002] In analog circuit systems, the voltage reference source is a core module that ensures the accuracy of signal acquisition and processing, and its output stability directly determines the performance of key components such as ADCs and DACs. Currently, high-precision voltage reference sources are typically generated by dedicated reference chips, and their startup timing is controlled by external conditioning circuits.

[0003] like Figure 1 As shown, an operational amplifier (op-amp) conditioning delay circuit is added to the output of the reference source. This circuit is designed using an op-amp and combined with an RC filter circuit to achieve delayed startup, ensuring that the reference voltage (VREFHI) is established after the analog supply voltage (VDDA) has stabilized. However, to ensure that the reference voltage (VREFHI) is established after the analog supply voltage (VDDA) has stabilized, the parameters of the RC filter circuit need to be adjusted. Such adjustments will inevitably lead to a deviation in the voltage output of the op-amp conditioning delay circuit. Utility Model Content

[0004] In view of this, this application proposes a voltage reference source start-up delay circuit and power supply device to solve the problem that existing operational amplifier conditioning delay circuits cannot guarantee the accurate output voltage of the reference source.

[0005] The first aspect of this application provides a voltage reference source start-up delay circuit, including: a power supply circuit, a delay start-up circuit, a reference source, and a buck circuit;

[0006] The output terminal of the power supply circuit is connected to the power input terminal of the delayed start circuit and the input terminal of the buck circuit, respectively, and the power output terminal of the delayed start circuit is connected to the power input terminal of the reference source.

[0007] An enable signal is also connected to the control terminal of the delay start circuit, and when the enable signal reaches a preset value, the delay start circuit controls the reference source to output a reference source signal during the operation delay.

[0008] In one feasible implementation, the delayed start circuit includes: a first switching circuit, a second switching circuit, and a delay control circuit;

[0009] The input terminal of the first switching circuit is connected to the output terminal of the power supply circuit, and the output terminal of the first switching circuit is connected to the power input terminal of the reference source; the control terminal of the first switching circuit is connected to the output terminal of the second switching circuit.

[0010] The input terminal of the second switching circuit is grounded, and the control terminal of the second switching circuit is connected to the enable signal through the delay control circuit.

[0011] In one feasible implementation, the input terminal of the delay control circuit is connected to the output terminal of the power supply circuit or the output terminal of the buck circuit to provide the enable signal.

[0012] In one feasible implementation, if the input terminal of the delay control circuit is the same as the output terminal of the buck circuit, the delay control circuit includes a first current-limiting resistor and a first pull-down resistor;

[0013] One end of the first current-limiting resistor is connected to the output terminal of the buck circuit, and the other end is connected to one end of the first pull-down resistor and the control terminal of the second switching circuit respectively; the other end of the first pull-down resistor is grounded.

[0014] In one feasible implementation, the delay control circuit further includes: a first capacitor connected in parallel with the first pull-down resistor, the first capacitor and the first current-limiting resistor forming a first RC filter to perform delay conduction control on the second switching circuit.

[0015] In one feasible implementation, if the input terminal of the delay control circuit is the same as the output terminal of the power supply circuit, the delay control circuit includes a second current-limiting resistor, a second capacitor, and a second pull-down resistor, wherein the second capacitor and the second current-limiting resistor constitute a second RC filter to perform delay conduction control on the second switching circuit;

[0016] The second current-limiting resistor is located between the output terminal of the power supply circuit and the control terminal of the second switching circuit; the second capacitor and the second pull-down circuit are connected in parallel and located between the control terminal of the second switching circuit and ground.

[0017] In one feasible implementation, the first switching circuit includes a pull-up resistor and a P-type switching transistor;

[0018] The pull-up resistor is located at the source of the P-type switching transistor, and the source is connected to the output terminal of the power supply circuit; the gate of the P-type switching transistor is connected to the output terminal of the second switching circuit, and the drain of the P-type switching transistor is connected to the power input terminal of the reference source.

[0019] In one feasible implementation, the second switching circuit is a P-type switching transistor or an N-type switching transistor.

[0020] In one feasible implementation, if the number of delay control circuits is two or more, the delay start circuit further includes a switching switch, the input terminal of the switching switch is connected to the enable signal, and each output terminal of the switching switch is connected to a delay control circuit.

[0021] A second aspect of this application provides a power supply device including a voltage reference source start-up delay circuit as described above.

[0022] In the technical solution provided in this application, the circuit sets a delayed start-up circuit at the power input terminal of the reference source and drives it with an enable signal so that the reference source outputs a reference source signal after the buck circuit establishes the output power supply voltage. This method not only solves the problem that the existing op-amp conditioning delay circuit cannot guarantee the accurate output voltage of the reference source, but also ensures that the reference source signal lags behind the power supply voltage, and avoids the amplitude of the reference source signal exceeding the amplitude of the power supply voltage during the startup process. Attached Figure Description

[0023] Figure 1 This is a first schematic diagram of a voltage reference source start-up delay circuit provided in an embodiment of this application;

[0024] Figure 2 This is a second schematic diagram of the voltage reference source start-up delay circuit provided in the embodiments of this application;

[0025] Figure 3 This is a third schematic diagram of the voltage reference source start-up delay circuit provided in the embodiments of this application;

[0026] Figure 4 This is a fourth schematic diagram of the voltage reference source start-up delay circuit provided in the embodiments of this application;

[0027] Figure 5 This is a first schematic diagram of a delayed start circuit provided in an embodiment of this application;

[0028] Figure 6 The second schematic diagram of the delayed start circuit provided in the embodiments of this application. Detailed Implementation

[0029] This application provides a voltage reference source start-up delay circuit and a power supply device. The voltage reference source start-up delay circuit is set at the input terminal of the reference source and uses an enable signal to control its signal establishment to lag behind that of the buck circuit, thereby ensuring the accuracy of the output voltage of the reference source and preventing the amplitude of the reference source signal from exceeding the voltage value output by the buck circuit when the circuit starts up.

[0030] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0031] like Figure 1 As shown in the figure, an embodiment of this application provides a voltage reference source start-up delay circuit, which includes: a power supply circuit 110, a delay start-up circuit 120, a reference source 130, and a buck circuit 140; the output terminal of the power supply circuit 110 is connected to the power input terminal of the delay start-up circuit 120 and the input terminal of the buck circuit 140, respectively, and the power output terminal of the delay start-up circuit 120 is connected to the power input terminal of the reference source 130.

[0032] It should be noted that the voltage reference source start-up delay circuit generates two signals: a reference source signal output by the reference source 130 and a supply voltage output by the buck circuit 140. Both the reference source signal and the supply voltage are used by subsequent electrical equipment or modules. The reference source 130 is controlled by the delay start-up circuit 120. Specifically, an enable signal is also connected to the control terminal of the delay start-up circuit 120. When the enable signal reaches a preset value, the delay start-up circuit 120 controls the reference source 130 to output the reference source signal after a working delay.

[0033] Understandably, the input of the enable signal needs to be determined based on the power supply voltage setup time of the buck circuit 140. That is, the time point at which the enable signal is input to the delay start circuit 120 is after the power supply voltage output time of the buck circuit 140, or the enable signal controls the turn-on / operation time of the delay start circuit 120 after the power supply voltage output time of the buck circuit 140.

[0034] In this embodiment, the enable signal can be provided by the buck circuit 140 or the power supply circuit 110. That is, the input terminal of the delayed start circuit 120 is connected to the output terminal of the power supply circuit 110 or the output terminal of the buck circuit 140 to provide the enable signal.

[0035] Figure 2 and 3 The diagram shows the control terminals of the delayed start circuit 120 connected to the power supply circuit 110 and the buck circuit 140, respectively. The delayed start circuit 120 includes an input terminal, a control terminal, and an output terminal. The input terminal is connected to the output terminal of the power supply circuit 110, which outputs a +5V voltage signal to provide operating voltage for both the delayed start circuit 120 and the buck circuit 140. When the control terminal of the delayed start power supply 120 is connected to the output terminal of the power supply circuit 110 (i.e., connected to +5V), the delay control of the delayed start circuit 120 should occur after the output of the buck circuit 140. When the control terminal of the delayed start power supply 120 is connected to the output terminal of the buck circuit 140, the delayed start circuit 120 can be turned on along with the output of the buck circuit 140.

[0036] In one feasible implementation, the delay start circuit 120 includes: a first switching circuit 121, a second switching circuit 122, and a delay control circuit 123, such as... Figure 4 As shown. The input terminal of the first switching circuit 121 is connected to the output terminal of the power supply circuit 110, and the output terminal of the first switching circuit 121 is connected to the power input terminal of the reference source 130; the control terminal of the first switching circuit 121 is connected to the output terminal of the second switching circuit 122; the input terminal of the second switching circuit 122 is grounded, and the control terminal of the second switching circuit 122 is connected to the enable signal through the delay control circuit 123.

[0037] The first switching circuit 121 and the second switching circuit 122 are specifically composed of at least one switching device and a driving auxiliary device. The switching device can be a transistor, a power transistor, etc., while the driving auxiliary device is a resistor, capacitor, etc. connected to the emitter, collector, and base of the switching device, respectively, for current limiting, filtering, and other functions to protect the switching device.

[0038] It should be noted that the switching device in the first switching circuit 121 must be a power transistor, while the switching device in the second switching circuit 121 can be implemented using a power transistor or a triode. The delay control circuit 123 is located at the gate of the second switching circuit 122 and is used to control the conduction and turn-off of the second switching circuit 122. The conduction and turn-off of the first switching circuit 121 are controlled by the conduction and turn-off of the second switching circuit 122.

[0039] Specifically, the first switching circuit 121 includes a pull-up resistor and a P-type switching transistor; the pull-up resistor is located at the source of the P-type switching transistor, and the source is connected to the output terminal of the power supply circuit 110; the gate of the P-type switching transistor is connected to the output terminal of the second switching circuit 122, and the drain of the P-type switching transistor is connected to the power input terminal of the reference source 130.

[0040] If the input terminal of the delay control circuit 123 is connected to the output terminal of the buck circuit 140, the delay control circuit 123 includes a first current-limiting resistor R6 and a first pull-down resistor R7; one end of the first current-limiting resistor R6 is connected to the output terminal of the buck circuit 140, and the other end is connected to one end of the first pull-down resistor R7 and the control terminal of the second switching circuit 122 respectively; the other end of the first pull-down resistor R7 is grounded.

[0041] Understandably, when the input terminal of the delay control circuit 123 is connected to the output terminal of the buck circuit 140, its delay start circuit 120 has already started working after the buck circuit 140 is established. Therefore, at this time, the delay control circuit 123 does not actually need to perform delay control, but only needs to retain current limiting to protect the switching devices in the second switching circuit 122.

[0042] In another feasible embodiment, the delay control circuit 123 further includes: a first capacitor C9 connected in parallel with the first pull-down resistor R7, wherein the first capacitor C9 and the first current limiting resistor R6 form a first RC filter to perform delay conduction control on the second switching circuit 122.

[0043] The specific circuit principle for connecting the input terminal of the delay control circuit 123 to the output terminal of the buck circuit 140 is as follows: Figure 5 As shown in the figure, the circuit design with the delay function is used as an example. The first switching circuit 121 includes a PMOS transistor Q1 and a resistor R5, wherein the resistor R5 is connected between the source and gate of Q1; the second switching circuit 122 includes a switching transistor Q2, which can be a P-type MOS transistor or an N-type MOS transistor. Here, the Q2 is an N-type MOS transistor. The delay control circuit 123 includes a resistor R6, a resistor R7 and a capacitor C9. The output terminal of the buck circuit 140 is connected to the gate of Q2 through the resistor R6. The capacitor C9 and the resistor R7 are connected in parallel between the source and gate of Q2.

[0044] The entire delayed start circuit 120 is mainly composed of Q1, Q2, R5, R6, R7, and C9. Q1 is a PMOS, Q2 is an NMOS, R5 is the gate pull-up resistor of Q1, R7 is the gate pull-down resistor of Q2, R6 is the gate drive current limiting resistor of Q2, and C9 is the gate filter capacitor of Q2. Since the ADC reference current is less than 10mA, both MOS transistors can be selected as low-power, small-package transistors to reduce the board area. C5 is the input bypass capacitor of reference source U2, and C6 is the output filter capacitor of reference source U2.

[0045] When the entire circuit powers on, the +5V output voltage signal from the power supply circuit 110 is established first. The output supply voltage VDDA from the buck circuit 140 is not fully established, and the enable signal VGS_EN has not reached the Q2 turn-on threshold voltage, so Q2 is off. The gate of Q1 is pulled up to +5V through resistor R5, at which point the gate of Q1 is at a high level, and Q1 is off. When the enable signal VGS_EN reaches the Q2 turn-on threshold voltage, Q2 turns on, pulling the gate level of Q1 low, and Q1 turns on. After Q1 turns on, U2 receives a 5V power supply and begins to work, outputting a 3.3V reference voltage. The above circuit design uses R6 and C9 to form an RC filter to achieve delay and filtering. This delayed start-up circuit 120 design, through the enable signal and R6 and C9, achieves a double delay for the reference source 130, ensuring that VREFHI lags behind the VDDA voltage, thus preventing VREFHI from exceeding the VDDA voltage during power-on.

[0046] In another feasible embodiment, if the input terminal of the delay control circuit 123 is the same as the output terminal of the power supply circuit 110, the delay control circuit 123 includes a second current-limiting resistor, a second capacitor, and a second pull-down resistor. The second capacitor and the second current-limiting resistor form a second RC filter to perform delay conduction control on the second switching circuit 122. The second current-limiting resistor is located between the output terminal of the power supply circuit 110 and the control terminal of the second switching circuit 122. The second capacitor and the second pull-down circuit are connected in parallel and located between the control terminal of the second switching circuit 122 and ground.

[0047] Similarly, for the input terminal of the delay control circuit 123 and the output terminal of the power supply circuit 110, the entire delay start circuit 120 still operates as follows: Figure 5 The electronic components were designed in this way, but the difference is that resistor R6 is connected between the gates of Q1 and Q2, and the enable signal VGS_EN is provided by the +5V output of power supply circuit 110. For example... Figure 6 As shown, by changing the input voltage of Q2 through resistor R6, and changing VDDA to +5V, another reference source delay start-up circuit can be obtained. Its overall connection method is as follows: Figure 3 As shown, Figure 5 and Figure 6 The differences also include Figure 6 The selection of R6 and C9 parameters requires increasing the size of the RC time constant.

[0048] In another feasible embodiment, if the number of delay control circuits 123 is two or more, the delay start circuit 120 further includes a switch 124, the input terminal of the switch 124 is connected to the enable signal, and each output terminal of the switch 124 is connected to a delay control circuit 123.

[0049] By setting multiple delay control circuits 123, the parameters of R6 and C9 can be changed to change the delay time, so that the reference source signal VREFHI is established lagging behind the supply voltage VDDA. This avoids VREFHI exceeding VDDA voltage during power-on. Furthermore, the output pin of U2 can directly drive a capacitive load, which reduces the output matching resistor in the op-amp conditioning delay circuit compared to existing technologies.

[0050] By implementing this embodiment, a delayed start-up circuit is added. The delayed start-up control signal is controlled by an enable signal. When the level of the enable signal reaches a certain threshold, the delayed start-up circuit will turn on to provide input power to the reference source. This makes the reference source setup time lag behind the buck circuit, preventing the amplitude of the reference source signal from exceeding the voltage amplitude output by the buck circuit during the startup process. Compared with existing circuits, the delayed start-up circuit uses a low-power PMOS as a switching device, which can optimize the PCB layout, reduce reference output error, and achieve the goal of reducing costs.

[0051] This application also provides a power supply device, characterized in that it includes the voltage reference source start-up delay circuit provided in the above embodiments.

[0052] Finally, it should be noted that the above embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the technical scope disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.

Claims

1. A voltage reference source start-up delay circuit, characterized in that, include: Power supply circuit, delayed start circuit, reference source and buck circuit; The output terminal of the power supply circuit is connected to the power input terminal of the delayed start circuit and the input terminal of the buck circuit, respectively, and the power output terminal of the delayed start circuit is connected to the power input terminal of the reference source. An enable signal is also connected to the control terminal of the delay start circuit, and when the enable signal reaches a preset value, the delay start circuit controls the reference source to output a reference source signal during the operation delay.

2. The voltage reference source start-up delay circuit according to claim 1, characterized in that, The delayed start circuit includes: a first switching circuit, a second switching circuit, and a delayed control circuit; The input terminal of the first switching circuit is connected to the output terminal of the power supply circuit, and the output terminal of the first switching circuit is connected to the power input terminal of the reference source; the control terminal of the first switching circuit is connected to the output terminal of the second switching circuit. The input terminal of the second switching circuit is grounded, and the control terminal of the second switching circuit is connected to the enable signal through the delay control circuit.

3. The voltage reference source start-up delay circuit according to claim 2, characterized in that, The input terminal of the delay control circuit is connected to the output terminal of the power supply circuit or the output terminal of the buck circuit to provide the enable signal.

4. The voltage reference source start-up delay circuit according to claim 3, characterized in that, If the input terminal of the delay control circuit is connected to the output terminal of the buck circuit, the delay control circuit includes a first current-limiting resistor and a first pull-down resistor; One end of the first current-limiting resistor is connected to the output terminal of the buck circuit, and the other end is connected to one end of the first pull-down resistor and the control terminal of the second switching circuit, respectively. The other end of the first pull-down resistor is grounded.

5. The voltage reference source start-up delay circuit according to claim 4, characterized in that, The delay control circuit further includes: a first capacitor connected in parallel with the first pull-down resistor, the first capacitor and the first current-limiting resistor forming a first RC filter to perform delay conduction control on the second switching circuit.

6. The voltage reference source start-up delay circuit according to claim 3, characterized in that, If the input terminal of the delay control circuit is connected to the output terminal of the power supply circuit, the delay control circuit includes a second current-limiting resistor, a second capacitor, and a second pull-down resistor, wherein the second capacitor and the second current-limiting resistor constitute a second RC filter to perform delay conduction control on the second switching circuit; The second current-limiting resistor is located between the output terminal of the power supply circuit and the control terminal of the second switching circuit; the second capacitor and the second pull-down resistor are connected in parallel and located between the control terminal of the second switching circuit and ground.

7. The voltage reference source start-up delay circuit according to any one of claims 2-6, characterized in that, The first switching circuit includes a pull-up resistor and a P-type switching transistor; The pull-up resistor is located at the source of the P-type switching transistor, and the source is connected to the output terminal of the power supply circuit; the gate of the P-type switching transistor is connected to the output terminal of the second switching circuit, and the drain of the P-type switching transistor is connected to the power input terminal of the reference source.

8. The voltage reference source start-up delay circuit according to any one of claims 2-6, characterized in that, The second switching circuit is a P-type switching transistor or an N-type switching transistor.

9. The voltage reference source start-up delay circuit according to any one of claims 2-6, characterized in that, If the number of delay control circuits is two or more, the delay start circuit further includes a switching switch, the input terminal of the switching switch is connected to the enable signal, and each output terminal of the switching switch is connected to a delay control circuit.

10. A power supply device, characterized in that, Includes a voltage reference source start-up delay circuit as described in any one of claims 1-9.

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