A hot standby redundancy state control system

Abstract

The utility model discloses a kind of hot backup redundancy state control systems, including two redundancy modules, each module integrated microprocessor MCU, redundancy switching control module, UART interface, GPIO interface;Two modules are periodically healthy data interaction by UART interface, real-time monitoring module survival state by GPIO interface, MCU handles fault acquisition signal, redundancy switching control module detects MCU abnormality situation control output enable and module switching.Redundancy switching control module is made of and gate circuit and D flip-flop, the working state of D flip-flop is controlled by the level combination of operating mode control signal and MCU state signal, the state retention and millisecond level seamless switching when MCU abnormality in single computer / redundancy mode are realized.The utility model passes through the redundancy control system of the cooperation of constructing UART and GPIO interface, the reliability and certainty of redundancy system are significantly improved.

Description

Technical Field

[0001] This utility model relates to the field of redundancy control technology, specifically to a system for hot standby redundancy safe switching. Background Technology

[0002] In fields such as industrial control and automation equipment, high system reliability and continuous operation are crucial. Hot standby redundancy technology achieves seamless switching during failures by setting up master-slave modules, thus ensuring uninterrupted system operation. Existing hot standby redundancy systems often use network communication or dedicated buses for state synchronization, but these have the following drawbacks: 1. High communication latency: Network or bus-based communication protocols are complex and data transmission latency is large, resulting in long fault diagnosis and switching times, making it difficult to meet millisecond-level response requirements.

[0003] 2. Complex master-slave switching logic: Existing systems rely on software polling or interrupt mechanisms, which involve cumbersome judgment logic and are prone to accidental switching due to communication jitter, thus reducing system stability.

[0004] 3. Untimely fault diagnosis: The health status monitoring cycle between redundant modules is long, and faults cannot be detected in real time. This may result in a "dual master" or "dual slave" state, leading to system conflicts or shutdowns.

[0005] 4. Unstable state under redundant communication failure: When the main communication channel fails, the backup channel switching mechanism is not perfect, and the system may fall into a deadlock. Summary of the Invention

[0006] The purpose of this invention is to address the shortcomings of existing technologies by providing a hot standby redundant state control system that enables millisecond-level fault diagnosis and seamless switching, ensuring continuous and stable system operation.

[0007] To achieve the above objectives, this utility model provides a hot standby redundant state control system based on the collaboration of a Universal Asynchronous Receiver / Transmitter (UART) and Universal Input / Output Ports (GPIO), comprising at least two redundant modules (a master module and a slave module). Each module includes a microprocessor, a multi-channel current output circuit, a redundancy switching control module, a UART interface, GPIO input pins, and GPIO output pins. The redundancy switching control module includes an AND gate circuit and a D flip-flop. The first input of the AND gate circuit is connected to the MCU's status signal, and the second input is connected to the MCU's operating mode control signal. The output of the AND gate circuit is electrically connected to the enable pin of the D flip-flop, and the output of the D flip-flop is connected to the multi-channel current output circuit. The UART interfaces of the two redundant modules are connected. Each redundant module is connected to the GIPO output pin of the other redundant module through a GIPO input pin.

[0008] This invention adopts a dual-module communication architecture. The master and slave modules interact with each other through the UART interface for health data exchange and master-slave voting, while the GPIO interface monitors the survival status of the modules in real time.

[0009] Utilizing the UART communication function, the UART interface is configured in a high-speed asynchronous communication mode to periodically exchange module health data and determine the master-slave status based on a preset voting algorithm.

[0010] By utilizing the GPIO status monitoring function, the GPIO output pin of each module is connected to the GPIO input pin of other modules to directly output a "live" signal; changes in GPIO status can trigger hardware interrupts to quickly detect faults.

[0011] It adopts a collaborative working mechanism, with UART responsible for health communication. When UART communication fails, the system automatically switches to GPIO status judgment.

[0012] Simultaneously, a redundancy switching control module is employed, which is a circuit module for redundancy switching, using a D flip-flop + AND gate design. The first input of the AND gate is connected to the MCU status signal, and the second input is connected to the operating mode control signal. The output of the AND gate is electrically connected to the enable terminal of the D flip-flop, and the output of the D flip-flop is used to control the current output of the master and slave modules and the master-slave switching action. This ensures that different operating states are met when the MCU malfunctions during single-board operation or redundant operation.

[0013] By detecting the status signals of the MCU module and the operating mode control signals, and after passing through AND gate circuits and flip-flop circuits, the master-slave judgment and switching are directly performed in hardware, which improves the redundancy switching speed.

[0014] Furthermore, the operating mode control signal is a redundant mode output signal, which outputs a low level when running in standalone mode and a high level when running in redundant mode.

[0015] Furthermore, the MCU status signal is an IO control signal. It outputs a low level when the MCU is running normally or in redundant mode, and outputs a high level when an MCU malfunction is detected.

[0016] Compared with the prior art, the beneficial effects of this utility model are as follows: 1) High real-time performance: This utility model achieves millisecond-level fault diagnosis through a collaborative communication architecture of UART and GPIO, where UART transmits health signals and GPIO detects the survival status of the module; 2) Seamless switching: The redundant switching control circuit adopts AND gate + D flip-flop. By combining the levels of MCU status signals and operating mode control signals, differentiated state control of MCU anomalies in single-machine / redundant modes is realized, ensuring the continuity of system output during restart. 3) Anomalies are controllable: By making redundant logic independent of task units, the problem of complex master-slave switching logic is avoided, effectively preventing abnormal states of "dual master" and "dual slave", and ensuring stable system operation. Attached Figure Description

[0017] Figure 1 This is a diagram illustrating the architecture of the hot standby redundancy state control system of this utility model. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the described embodiments of this utility model without creative effort are within the scope of protection of this utility model. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art to which this utility model pertains.

[0019] The terms "first," "second," and similar words used in this utility model patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, unless the context clearly indicates otherwise, the singular forms of "an," "a," or "the," etc., do not indicate a quantity limitation, but rather indicate the presence of at least one. Terms such as "comprising" or "including" indicate that the element or object preceding "comprising" encompasses the features, integrals, steps, operations, elements, and / or components listed following "comprising" or "including," and do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0020] This invention provides a multi-redundancy control system that achieves hot standby redundancy switching based on a dual-module UART and GPIO communication architecture. Its core objective is to ensure that services can be quickly and smoothly switched to slave devices when the master device fails, minimizing service interruption time.

[0021] like Figure 1The diagram shows the overall system architecture and dual-module UART communication. Through UART communication and GPIO port status judgment, the board determines the master-slave status through continuous interaction of redundant data. UART serves as the communication interface for health communication, and GPIO port serves as an indicator of whether the module is alive.

[0022] The redundant modules employ the same hardware design. Each module includes a microprocessor (MCU), a redundancy switching control module, a UART interface, and GPIO pins (GPIO1, GPIO2). The UART transmit pin of module 1 is connected to the UART receive pin of module 2, and vice versa, forming full-duplex communication. The GPIO output pins of module 1 are connected to the GPIO input pins of module 2, and vice versa. The GPIO output pins continuously output a liveness signal, while the GPIO input pins continuously detect the liveness signal of the other module, enabling mutual monitoring of their liveness status.

[0023] The MCU combines configuration instructions and fault acquisition signals, and controls output enable and module switching through a redundancy switching control module. The redundancy switching control module includes an AND gate and a D flip-flop. The first input of the AND gate is connected to the MCU status signal, and the second input is connected to the operating mode control signal. The output of the AND gate is electrically connected to the enable terminal of the D flip-flop. The output of the D flip-flop is used to control the current output of the master and slave modules and the master-slave switching action. The MCU uses the GD32E103RBT6 chip, the AND gate uses the GT74LVC1G08S5 chip, and the D flip-flop uses the AiP74HC374TA20.TR chip.

[0024] The first input of the AND gate is connected to the MCU status signal (output from the MCU's general I / O port), the second input is connected to the operating mode control signal (redundant mode output port), and the output is connected to the enable terminal of the D flip-flop. The output of the D flip-flop is electrically connected to the current output control terminals of the master and slave modules respectively, and is used to control the current output and master-slave switching.

[0025] The master-slave determination of the redundancy control module is as follows: Normal stand-alone operation: The system is only connected to the main module. The operation mode control signal outputs a low level, and the MCU status signal outputs a low level. The AND gate chip outputs a high level to enable the D flip-flop. The D flip-flop controls the current output terminal of the main module (i.e., the multi-channel current output circuit) to output current normally, and the system operates in stand-alone mode.

[0026] Standalone operation + MCU abnormal state: When the MCU of the main module malfunctions, the MCU status signal outputs a high level, while the operation mode control signal still outputs a low level; the AND gate chip maintains a high level output, the D flip-flop continues to be enabled, and the main module maintains the current output state before the malfunction. After the MCU restarts, the system automatically resumes normal standalone operation.

[0027] Redundant normal operation state: The system connects to the master and slave modules, the operation mode control signal outputs a high level, and the MCU status signal outputs a low level; the AND gate chip outputs a high level to enable the D flip-flop, the D flip-flop controls the normal output current of the master module, and the slave module is in hot standby state.

[0028] Redundant operation + MCU abnormal state: When the MCU of the master module malfunctions, the MCU status signal outputs a high level, and the operation mode control signal still outputs a high level; the AND gate chip outputs a low level to turn off the enable terminal of the D flip-flop, and the redundancy switching control module triggers the master-slave switching action: the current output of the master module is turned off, and the slave module is switched to the master module; if the slave module does not have an MCU malfunction, the D flip-flop controls the switched master module (the original slave module) to output current normally, achieving seamless switching.

[0029] This invention achieves low-cost, highly reliable hot standby redundancy control through hardware circuit design, and can be widely used in industrial control and automation equipment.

[0030] The above description is only a preferred embodiment of the present utility model and is not intended to limit the scope of protection of the present utility model. Any equivalent structural or procedural transformations made based on the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are similarly included within the patent protection scope of the present utility model.

Claims

1. A hot standby redundancy state control system, comprising at least two redundant modules, each redundant module including a microprocessor and a multi-channel current output circuit; characterized in that, Each redundant module also includes a redundancy switching control module, a UART interface, GPIO input pins, and GPIO output pins. The redundancy switching control module includes an AND gate circuit and a D flip-flop. The first input of the AND gate circuit is connected to the MCU's status signal, and the second input is connected to the MCU's operating mode control signal. The output of the AND gate circuit is electrically connected to the enable pin of the D flip-flop, and the output of the D flip-flop is connected to the multi-channel current output circuit. The UART interfaces of the two redundant modules are connected. Each redundant module is connected to the GIPO output pin of the other redundant module through a GIPO input pin.

2. The hot standby redundancy control system according to claim 1, characterized in that, The operating mode control signal adopts a redundant mode output signal, which outputs a low level when running in standalone mode and a high level when running in redundant mode.

3. The hot standby redundancy control system according to claim 2, characterized in that, The status signal of the MCU is an I / O control signal; when the system is in a stand-alone normal operation state or a redundant normal operation state, the MCU status signal outputs a low level; when the MCU malfunctions, the MCU status signal outputs a high level.

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