Multilayer system for supporting thin wafers in semiconductor manufacturing with the property of holding them in place by means of electrostatic charging

DE102006009353B4Inactive Publication Date: 2025-03-27NISSAN CHEM CORP
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Patent Information

Application Number
DE102006009353
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2006-03-01
Publication Date
2025-03-27
Estimated Expiration
Not applicable · inactive patent

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Abstract

Method for treating wafers with components during the thinning of the wafer (1) and the subsequent singulation of the components and any intermediate manufacturing steps, wherein the front side of the wafer (1) is coated with a layer having separating properties (4) and a carrier layer (5, 6) with electrostatic properties, wherein the wafer (1) is fixed by the carrier layer (5, 6) due to its electrostatic properties.
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Description

Area of ​​application

[0001] The invention is intended to facilitate the production of thinner wafers and / or their safer processing, and / or to reduce and / or make more cost-effective the manufacturing effort for electrical components and / or circuits, and / or sensors, etc., and / or—but especially—to enable and / or facilitate the coating of the backside of the thinned wafer. This simplification lies in its suitability for electrostatically holding and supporting wafers. State of the art

[0002] The procedure in the prior art can vary from user to user. In general, however, the procedure is as follows. In the manufacture of electronic components and circuits (diodes, transistors, ICs, sensors, etc.), structures, layers, etc. are applied to wafers (disks made of silicon, GaAs, etc.) using various technologies. Currently, after completion of the necessary manufacturing steps, these wafers are provided with a protective film or other protective layer on the front side (active side or side on which the applied structures are located). This film or layer has the task of protecting the top side of the wafer and thus the applied electrical and mechanical structures during the subsequent thinning of the wafer (by grinding, lapping, sanding, etching, etc. of the back side). After the film or layer has been applied, the wafer is thinned down on the back side.This reduces the original thickness of the wafer. The remaining thickness is determined permanently by the expected mechanical stresses and / or the subsequent process steps, which must be withstood without significantly increasing the risk of breakage. After thinning, the back of the wafer can be chemically treated to improve the wafer's fracture properties. After any cleaning steps, the protective film is peeled off or removed from the top of the wafer. Any further manufacturing steps and / or measures to improve properties and / or tests can then follow. The back of the thinned wafer is often coated with a metallic layer. This coating process is usually carried out using sputtering or similar deposition processes in a vacuum and often requires thermal stress and / or thermal support.The wafer is then placed back-down (active side up) onto a sawing film (expansion film or frame). Finally, the wafer is sawn (the components are separated) using rotary cutting wheels or other mechanical sawing devices. Laser cutting processes are also occasionally used for this purpose. Wafers are occasionally broken during this process, with scribing being used as an additional method in some cases. It is very difficult to treat or produce thin wafers using conventional processes. This difficulty arises, among other things, from the fact that the wafer must be subjected to mechanical stress after thinning. This stress occurs, among other things, in the following ways: a) during the removal of the protective film or layer that protects the front side of the wafer during thinning, b) during the placement of the wafer on the sawing foil, and c) During transport between the thinning and dicing of the wafer, and any subsequent manufacturing steps. This is especially true during the coating of the backside. It is irrelevant whether this coating process takes place before or after the wafer is dicing.

[0003] As an alternative to the methods described, methods are already being used and / or developed in which the wafer is structured on the surface (the structured side) before the thinning process by grinding scribe structures and / or scribing and / or chemical etching and / or plasma etching of trenches and / or structures in such a way that these structures are exposed during the subsequent thinning process by means of mechanical and / or chemical processes, thus resulting in the wafer being separated.

[0004] 1. US 2004 / 0 038 469 A1 discloses a method for thinning the backside of a wafer.

[0005] The inventor's application, international patent application WO 2004 / 051 708 A2 (published application), describes a method using a separating layer. This separating layer is preferably applied directly to the active side of the wafer and reinforced with suitable materials. This material acts as a carrier, which can be removed from the wafer again using the separating layer. Disadvantages of the state of the art

[0006] International patent application WO 2004 / 051 708 A2 (open publication), listed as prior art, mentions a carrier layer whose technological design is not further described. Application DE 10 2006 004 834 A1 (open publication) filed with the German Patent and Trademark Office describes a multilayer system consisting of at least one hard layer, which is primarily intended to stabilize the carrier, and a soft layer, which is intended to adapt to the topography of the wafer surface—the active side of the wafer—and primarily protect it. The use of the method in both inventions simplifies the handling and supporting of a wafer. However, the methodology for applying methods for holding or fixing wafers and their carriers using electrostatic methods is not further described. Object of the invention

[0007] The invention is based on the object of describing the carrier layer described in international patent application WO 2004 / 051 708 A2 (open publication) – which is further described in application DE 10 2006 004 834 A1 (open publication) filed with the German Patent and Trademark Office – in such a way that it can be applied economically, efficiently, and with technological simplicity. In particular, the aim is to simplify the holding and / or fixing of the wafer and its carrier by also applying electrostatic charging methods. Solution to the task

[0008] International patent application WO 2004 / 051 708 A2 (open application) describes a wafer coated with a release layer. German Patent and Trademark Office application DE 10 2006 004 834 A1 (open application) further describes this as a multilayer system. It consists of at least one elastomer layer and one hard layer.

[0009] The invention describes that the described layers and / or further layers are modified, manufactured, and / or enriched with suitable materials in such a way that they can be electrostatically charged themselves or fixed by other electrostatically charged surfaces and / or devices. It is possible for the carrier to be provided with a layer specifically to achieve suitable electrostatic properties, which facilitates or even enables this.

[0010] This property of electrostatic charging or the ability to be fixed by other electrostatically charged surfaces and / or devices may result from the materials used to produce the layer and / or layers. However, it can be achieved by adding suitable materials to these materials, such as suitable metals, oxides, or other inorganic and / or organic materials. Advantages of the invention

[0011] The invention enables the realization of significant technological advantages in the manufacturing and handling of wafers in the production of electrical components, ICs, sensors, etc. The process simplifies production and makes it more cost-effective. Furthermore, thinner wafers can be realized more easily, economically, and reliably.

[0012] In addition to the advantages of the international patent application WO 2004 / 051 708 A2 (publication document), there are advantages in the economical and efficient coating of a carrier for thin wafers.

[0013] In particular, the described procedure, in which the carrier is applied by means of a layer system (multi-layer film) consisting of a layer of elastomer and a layer of polyimide in the form of a fabricatable film, simplifies economic use.

[0014] The wafer can now be fixed using the electrostatic properties of its carrier and / or the interaction of the carrier with electrostatically charged surfaces and devices. This is particularly true for applications where the wafer is processed in a vacuum. Example description

[0015] The assumption is that the wafer has already undergone significant manufacturing steps for applying the electrical components and / or mechanical structuring or layers. It now has a diameter of 200 mm, a thickness of 800 µm, and bumps with a height of 80 µm on its active side. The wafer will then be thinned to a remaining thickness of 50 µm.

[0016] The wafer is then coated with a carrier layer, regardless of whether it consists of one or more layers. Due to the properties of the carrier and its layer(s), it can be fixed, held, and / or transported by electrostatic charging itself or another surface or device. These devices can be chucks, such as those used by UNAXIS, Lichtenstein, for vacuum processes, and / or manufactured and offered as chucks or devices by ProTec®, Siegen, Germany. The invention is explained in more detail below with reference to the drawings.

[0017] They are not to scale: Drawing 1

[0018] Shows a finished film consisting of a layer of polyimide (e.g. Kapton ®) and a layer of elastomer (e.g., silicone). The film is coated with a protective film on the elastomer side, which is removed before the film is applied to the wafer. First layer of the carrier (preferably elastomer) designated 5Second layer of the carrier (preferably polyimide) (which is exemplary here suitable for electrostatic charging) designated 6

[0019] Attention! Instead of the second layer (6) shown, any other layer or all layers may be suitable for electrostatic charging. Protective film marked with 9Drawing 2

[0020] Shows a finished foil which has been bonded to a wafer on its structured side. Wafer marked with 1 Structured (active) zone of the wafer designated 2 Protective layer (passivation) of the structured (active) zone of the wafer designated with 3 Separation layer designated with 4 First layer of the carrier (preferably elastomer) marked 5 Second layer of the carrier (preferably polyimide) designated 6 Bumps marked with 7 Any scratch or etching trenches marked with 8

Claims

[1] Method for treating wafers with components during thinning of the wafer (1) and the subsequent singulation of the components and any intermediate manufacturing steps, wherein the front side of the wafer (1) is coated with a layer with separating properties (4) and a carrier layer (5, 6) with electrostatic properties, wherein the wafer (1) is fixed by the carrier layer (5, 6) due to its electrostatic properties. [2] Method according to claim 1, wherein the carrier layer consists of at least one elastomeric layer (5) which is suitable for electrostatic charging and / or can be fixed by electrostatic surfaces and / or devices. [3] Method according to claim 1, wherein the carrier layer consists of at least one hard layer of polyimide (6) which is suitable for electrostatic charging and / or can be fixed by electrostatic surfaces and / or devices. [4] Method according to claim 1, wherein the carrier layer (5) consists of at least one layer which is suitable for electrostatic charging and / or can be fixed by electrostatic surfaces and / or devices. [5] Method according to claim 1, wherein the carrier layer (5) consists of at least several layers which are suitable for electrostatic charging and / or can be fixed by electrostatic surfaces and / or devices.

Citation Information

Patent Citations

  • Wafer production having components uses wafer thinning and further production steps, then individualizes the components after applying a protective cover including polyimide

    DE102006004834A1

  • Method of processing a semiconductor wafer

    US20040038469A1

  • Method and device for machining a wafer, in addition to a wafer comprising a separation layer and a support layer

    WO2004051708A2