Laser scanning microscope system and method for data transmission, in particular for laser scanning microscopes, as well as for the operation of a laser scanning microscope system

Abstract

Laser scanning microscope system comprising a control computer (1) and a laser scanning microscope with at least one component that can be connected to or is connected to the control computer (1) via a peripheral interface (4), wherein the peripheral interface (4) comprises a computer connection for a system bus (8) of the control computer (1), a peripheral connection for the component as a peripheral device (10), and a control unit (11) which accesses a predefinable working memory area of ​​the control computer (1), which serves as a buffer (16, 17), for the unidirectional transmission of a predefinable number of data from the control computer (1) to the peripheral device (10) and / or vice versa via the system bus (8), characterized in thatthat the control unit (11) provides the control computer (1) with a progress report of the transmission for retrieval and that the control computer (1) can communicate a progress report of the processing of the buffer to the control unit (11) independently of the transmission, taking into account the progress of the processing when accessing the buffer.

Description

[0001] The invention relates to a laser scanning microscope system comprising a control computer and a laser scanning microscope with at least one component that is or can be connected to the control computer via a peripheral interface. The peripheral interface has a computer connection for a system bus of a control computer, a peripheral connection for a peripheral device, and a control unit that accesses a predeterminable working memory area of ​​the control computer, which serves as a buffer, for the unidirectional transmission of a predeterminable number of data items from the control computer to the peripheral device and / or vice versa via the system bus. It also relates to a method for transmitting data from a control computer to a peripheral device and / or vice versa, and to a method for operating a laser scanning microscope system.

[0002] A peripheral interface is used for communication between a control computer and one or more peripheral devices through electronic data transfer. Currently, peripheral devices are connected via standard interfaces such as USB (Universal Serial Bus), Ethernet, or Firewire, which provide a separate bus on the peripheral side. Data transfer via the peripheral interface is essentially controlled by the control computer, or more precisely, by its central processing unit (CPU). This is usually done by driver software executed by the central processing unit, which triggers the interface module's access to the control computer's random access memory (RAM). Access to the RAM occurs cyclically using direct memory access (DMA) via the control computer's system bus.For this purpose, the peripheral interface features a DMA controller. Typically, the DMA controller transfers a data block in each DMA cycle, the size of which usually corresponds to a single memory page of the main memory. Therefore, with a large amount of data, a large number of data blocks must be transferred. This requires a corresponding number of DMA cycles.

[0003] The driver software reports each DMA cycle to the peripheral device's DMA controller. The control computer then executes other software, such as an application program with user interaction. It later receives confirmation of the complete transfer in the form of an interrupt request (IRQ). Upon the interrupt request, regular program execution is interrupted and the driver software executes instead, which must continue the data transfer by triggering the next DMA cycle. To achieve a consistently high data transfer speed, the driver software must have a very short response time to such an interrupt request in order to trigger the next DMA cycle in a timely manner. Particularly in a real-time-critical system, a maximum response time must not be exceeded to prevent a gap in the data transfer.However, if the control computer uses a non-real-time capable operating system, deterministic handling of an interrupt request for a DMA cycle is not possible. The response time to an interrupt request can increase almost arbitrarily if the system load increases or if there are a large number of concurrent DMA transfer operations. The number of concurrent DMA transfer operations increases with the desired data transfer speed and is also determined by the size of the data to be transferred.

[0004] Data transfer via DMA with interrupt requests is known, for example, from DE 42 31 580 A1.

[0005] DMA controllers are known that can be assigned multiple memory access steps at once for a single DMA cycle in order to reduce the number of required DMA cycles. The DMA controller of the peripheral interface processes these steps independently and, in turn, notifies the driver software of their completion via an interrupt request. For this purpose, the control computer, for example, transmits a list of data blocks to be transferred to the DMA controller when a DMA cycle is triggered. This process is called "scatter-gathering" or "chained DMA."

[0006] From DE 198 02 868 C2 a method for acquiring measurement data in real time is known, using DMA with changing block sizes and a FIFO buffer.

[0007] What the aforementioned methods and arrangements have in common is that the control computer's software must define detailed processing steps for the DMA control of the peripheral interface and communicate these to the hardware in a timely manner before the ongoing data transfer ends, so that the data stream is not interrupted. The response time of a peripheral device to instructions to be transmitted from the control computer and the response time of the control computer to a state change of the peripheral device to be transmitted are therefore determined in particular by the data transfer rate of the respective peripheral interface, which in turn depends, among other things, on how often the control computer must intervene in the data transfer process.

[0008] It is known in the art to relieve the central processing unit of the control computer by using special input / output processors, for example the 8089 type, to handle data transfer operations. For this purpose, the control tasks of the data transfer can be partially taken over by such an I / O processor instead of the software executed by the central processing unit. I / O processors can be programmed to independently transfer data between individual members of the system bus without intervention from the main processor. However, their use is expensive and requires a relatively large amount of space. Furthermore, their programming is complex and inflexible. At the end of a transfer, an I / O processor also generates an interrupt request to the central processing unit of the control computer, which must respond to this in a time-critical manner to ensure that the data stream is not interrupted.For time-critical data transfers, a real-time capable operating system must still be used.

[0009] In known methods for controlling and acquiring data from laser scanning microscopes (LSM), the data segments that must be transmitted continuously in the form of a data stream, the transmission of which must be triggered anew each time, amount to only about 10 kilobytes each. The size of these data segments is essentially determined by the memory capacity of the required buffer modules of the control computer and the peripheral interface. These buffer modules with fast, static memory are only available in limited memory sizes and are very expensive. Maximum response times to interrupt requests of less than 200 µs are necessary, during which new data must be calculated and supplied if necessary. The known peripheral interfaces used in LSM systems therefore generate a high operating overhead on the control computer side in the form of short response times of the driver software coupled with frequent interrupt requests.If the driver software, i.e. the control computer, reacts too slowly, a consistent control data stream cannot be established or the incoming data is lost. If the control data stream is interrupted, components of the LSM, such as the scanner mirrors, can be damaged, which must be avoided. Until now, these high demands on an LSM system could only be met with the help of a real-time capable operating system. Using a non-real-time capable operating system required a significantly lower data transmission speed. As a result, scanning of a sample could only be performed at a low speed or only a small number of detection channels could be used.

[0010] From US 2007 / 0174411 A1 a method for data transmission with a FIFO ring buffer and two pointers for status transmission is known.

[0011] The invention is based on the object of improving a laser scanning microscope system of the type mentioned above so that, particularly in the case of a non-real-time capable operating system of the control computer, data can be transmitted seamlessly and without loss between the control computer and peripheral device at high transmission speeds with minimal effort. In particular, the rapid transmission of large amounts of data in LSM systems should be enabled.

[0012] The object is achieved by a laser scanning microscope system having the features specified in claim 1 and by methods having the features specified in claims 11 and 15.

[0013] Advantageous embodiments of the invention are the subject of the respective subclaims.

[0014] According to the invention, the control unit provides the control computer with a transfer progress for retrieval during the transfer, and the control unit can be informed by the control computer, i.e. by its central unit, of a transfer progress in the buffer processing independently of the transfer, wherein the control unit takes the processing progress into account when accessing the buffer. The transfer progress can be provided continuously or upon request from the control computer. The control unit of the peripheral interface operates independently of the central unit of the control computer. The control unit is spatially separated from the central unit of the control computer and can be connected to it via the system bus. The control unit's memory access to the control computer's main memory can be direct or indirectly via the system bus, preferably by direct memory access.Indirect memory access occurs, for example, when the main memory, or at least parts of it, must be buffered in another area before it can be transferred to its actual destination. This can be done, for example, by the central processing unit or another DMA controller.

[0015] This peripheral interface and the associated operating method weaken the strict separation existing in the state of the art between the software of the control computer, executed by its central processing unit, and the hardware of the peripheral interface. The peripheral interface, namely its control unit, assumes traditional software tasks, thus no longer leaving the control of a data transfer process solely to the software. For this purpose, the software, i.e., the control computer, specifies a specific action framework for the hardware, within which the hardware can then perform independent operations. For data transfer from the control computer to the peripheral device, the control computer provides the peripheral interface with one or more large memory areas as read buffers.The control computer stores the data stream to be transmitted in the memory area shared by the control computer and the peripheral interface and communicates this area to the peripheral interface. The peripheral interface can then use this memory area independently without requiring further instructions from the control computer: The peripheral interface automatically reads and sends the data stream stored in the shared memory to the peripheral device, without any intervention from the control computer, and simply communicates the status of the read operation to the control computer, i.e., the software. This allows the data volume, transmission time, and buffer fill level to be continuously varied. No time-critical interrupt requests to parameterize the continuation of data transmission are necessary, so that with a sufficiently large buffer, a real-time capable operating system is unnecessary.

[0016] The size of the data volume that can be transferred without an interrupt request (in other words, the length of a seamless data stream section) can advantageously be several megabytes, since the memory size of the buffer modules is no longer a limiting factor. With conventional methods, however, a software operation would have to be performed approximately every 10 kilobytes, triggered by an interrupt request. While the state of the art, with the well-known "scatter-gathering" methods, also offers the possibility of working with larger memory areas in order to transfer a larger volume of data without intervention by the control computer software, flow control through progress feedback is not possible. The limited memory size of the required buffer modules also limits the size of the data segments, as described above. This also applies to the I / O processors described above.

[0017] In a first possible embodiment, the control unit can be informed by the control computer of, on the one hand, a source working memory area as a read buffer and, on the other hand, a position, in particular of data to be transferred to the peripheral device, as the progress of buffer processing. The control unit reads the data from the source working memory area using direct memory access and transfers it via the peripheral connection. Preferably, the position of the data to be transferred can be expanded independently of the read operation and, in particular, repeatedly, whereupon the control unit extends the reading and transfer to the expanded data position.

[0018] In particular, thanks to the retrievable progress reports, the laser scanning microscope system according to the invention and the method according to the invention allow new data to be stored in the memory area during data transmission and to communicate the presence of this new data to the peripheral interface in the form of the buffer's processing status. This allows data transmission from the control computer to the peripheral device to be extended seamlessly, without interrupt requests triggered by the peripheral interface, but rather at the initiative of the control computer, for example, when it has completed a new control data stream section. For this purpose, the peripheral interface does not need to be explicitly informed of what needs to be transmitted to the peripheral device and when, since it is itself responsible for continuing the transmission at the correct time.For example, the peripheral interface only receives the start address and the length of the new data in the buffer as a changed processing state, independent of the read operation. It appends this information to an internal list of data to be transferred, which it processes sequentially. This allows for continuous transmission of a data stream that can be expanded at any time, provided the list is not completely exhausted.

[0019] In a second possible embodiment, as described above, the control computer can communicate a target working memory area to the control unit as a write buffer. The control unit can then write a number of data items transferred from the peripheral device into the write working memory area of ​​the control computer using direct memory access, and an upper limit for the data to be transferred can be communicated to it as the progress of the buffer processing. Preferably, the upper limit is independent of the write operation and, in particular, can be repeatedly expanded, whereupon the control unit extends the write operation up to the expanded upper limit if necessary.

[0020] Data transfer from the peripheral device to the control computer functions in the opposite direction. The software, i.e. the control computer, allocates a memory area to the hardware, i.e. the peripheral interface, as a write buffer, in which the peripheral interface can store data without any intervention from the control computer. This allows data transfer from the peripheral device to the control computer to be seamlessly extended without interruption requests. Here, too, the software can obtain information about the progress by retrieving the transfer progress and, based on this information, can retrieve the valid data from the shared memory area, while the hardware continues to store data in the memory area, but in an area that the control computer has marked as free using the processing status communicated to the peripheral interface.The peripheral interface then provides the control computer with information about the location of new, valid data as the transfer progresses. The control computer can retrieve this information independently of the transfer and, in particular, without a prior interrupt request. For example, an interval timer can be configured at the application level for this purpose.

[0021] The buffer, especially the read and write buffers, can be selected so that the response times of the control computer are in the range of seconds without resulting in an overflow or emptying of the respective buffer or the respective internal list of the peripheral interface. A real-time capable operating system is then unnecessary.

[0022] In this way, even with a non-real-time capable operating system, it is possible to handle the complex control tasks of LSM systems without significant performance losses or a reduction in the number of detection channels. The invention also enables very high data transmission speeds, as only a small amount of computing time is required by the central processing unit of the control computer. In return, the control computer has more computing time for recording, processing, and presentation, or rather, preparation and provision of the data. In the LSM system, when using a non-real-time capable operating system of the control computer, dynamic buffering and asynchronous status reporting enable transmission speeds that were previously only possible with real-time capable operating systems under otherwise identical conditions.

[0023] Both design options, from the peripheral device to the control computer and vice versa, can be implemented in parallel in the same peripheral interface if both a read buffer and a write buffer with associated communication facilities for retrieving progress messages and communicating data positions are set up for two opposing, unidirectional data transmission channels.

[0024] The laser scanning microscope system according to the invention, or rather the transmission method, achieves its full performance only when the peripheral interface can directly access the main memory. This is only possible if the peripheral interface is directly connected to the system bus, for example, PCI (Peripheral Component Interconnect) or PCIe (PCI Express). A bridge module can connect additional system bus components, such as ISA (Industry Standard Architecture) or CardBus, and mediate memory access without the need for drivers.

[0025] In one possible embodiment of the invention, the control unit addresses the respective memory area as a ring buffer. The use of such a FIFO (First In First Out) buffer allows for simple communication between the control computer and the peripheral interface, as well as very simple buffer management by the peripheral interface.

[0026] In the first possible embodiment, the control unit advantageously receives a first pointer past the end of the data still to be transmitted from the control computer for a read buffer as a notification of the amount of data to be transferred. It also provides the control computer with a second pointer, which it increments during the read process, pointing to the beginning of the data still to be sent, as a notification of progress. In this way, only two pointers are required for the entire data transfer in the read direction. The amount of data to be exchanged between the control computer and the peripheral interface to set up and process the data transfer from the peripheral device to the control computer is correspondingly small.

[0027] In the second possible embodiment, the control unit advantageously receives a first pointer from the control computer behind the end of a free buffer area for a write buffer as a notification of the upper limit of the data to be transferred. It also provides the control computer with a second pointer, which it increments during the write process, pointing to the beginning of the data already written for retrieval as a notification of progress. In this way, only two pointers are required for the entire data transfer in the write direction. The amount of data to be exchanged between the control computer and the peripheral interface to initiate and expand the data transfer from the peripheral device to the control computer is correspondingly small.

[0028] Preferably, the control unit provides a respective register for one of the first pointers that can be written to, and in particular also read from, the system bus, and a respective register for one of the second pointers that can be read from the system bus. This enables easy, high-speed access by the control computer. The registers are expediently provided via memory-mapped I / O.

[0029] Advantageously, when the control computer specifies a memory area as a read or write buffer, the control unit initializes the corresponding first pointer and the corresponding second pointer to the beginning of this memory area. This enables the use of the buffer, especially a ring buffer, with minimal effort.

[0030] Preferably, the control unit issues an interrupt request to the control computer when one of the second counters reaches the value of the corresponding first counter while counting. In this way, the control computer can be informed in a known manner about a buffer overflow of a write buffer or a buffer underrun of a read buffer, and thus about an impending data loss or an impending transmission interruption.

[0031] Conveniently, the respective working memory area can be assembled from scattered memory blocks in a "scatter-gathering" manner, whereby a relevant list of the memory blocks can be communicated to the control unit to specify the working memory area. A first such list can be passed for a read buffer and a second list for a write buffer.

[0032] Advantageously, the peripheral port can be configured as an I / O bus. This allows multiple peripheral devices to be connected to the same peripheral port.

[0033] Preferably, the computer connection and / or the peripheral connection are detachable by means of a corresponding plug-in connection. This allows the peripheral interface to be designed as a replaceable plug-in card.

[0034] The control unit's software first reserves a non-movable, non-pageable area of ​​the control computer's main memory and communicates this to the peripheral interface. When data to be transmitted to the peripheral device is identified, the data to be transmitted is written to the reserved memory area adjacent to data that has not yet been transmitted, and the peripheral interface is informed of a position, in particular the end address, of the written data as the processing progress. When data to be transmitted by the peripheral device is identified in the reserved memory area based on a transmission progress provided by the peripheral interface, the transmitted data is read from the reserved memory area, and the peripheral interface is informed of a position of the data that has not yet been read, in particular the start address, as the processing progress.

[0035] In addition, a control unit of the peripheral interface receives a target working memory area from the control computer as a write buffer and writes a number of data transmitted by the peripheral device into the write working memory area of ​​the control computer, whereby as a progress of the buffer processing an upper limit for data to be transferred is received independently of the write process and in particular repeatedly extended, whereupon the writing is extended up to the extended upper limit if necessary.

[0036] Alternatively or additionally, a source working memory area is received as a read buffer from the control computer by means of a control unit of the peripheral interface, and a position of data to be transferred to the peripheral device is received as the progress of the buffer processing independently of the read operation and in particular repeatedly extended, wherein the data is read from the source working memory area and transferred via the peripheral connection and upon notification of an extended position, the reading and transferring is extended to the extended number of data.

[0037] In addition to the laser scanning microscope system and the methods to be carried out by the control unit or the control computer, the invention also comprises a computer program which is designed to carry out one of the aforementioned methods, in particular a firmware for an interface control unit.

[0038] The invention is explained in more detail below using an exemplary embodiment.

[0039] The drawings show: Fig. 1 a block diagram of a first control computer with connected peripheral device, Fig. 2 a block diagram of a second control computer with connected peripheral device, Fig. 3 schematically shows the setup of buffers in the main memory of the control computer and Fig. 4, Fig. 5, Fig. 6 schematically shows several states of the working memory during two simultaneous, opposite data transfer operations.

[0040] In all drawings, corresponding parts have the same reference numerals.

[0041] Fig. Figure 1 shows a control computer 1 with a central processing unit 2, a main memory 3, a peripheral interface 4, and a bridge module 5 as a link between the processor bus 6, the memory bus 7, and the system bus 8. A peripheral device 10 is connected to the peripheral interface 4 via a peripheral bus 9. The bridge module 5 forwards memory accesses without the need for a driver for the central processing unit 2. This allows the control unit 11 of the peripheral interface 4 to directly read and write to the main memory 3 of the control computer 1 via the system bus 8. The control unit 11 is designed as an FPGA (Field Programmable Gate Array). The data transmission process is encoded in the firmware or in the FPGA program of the FPGA.

[0042] The peripheral interface 4 is designed, for example, as a PCI Express plug-in card with a detachable system bus connection (not shown) and a detachable peripheral bus connection (not shown) and comprises, for example, a buffer memory (not shown) with a size of 8 kilobytes for each transmission direction. The first buffer memory serves to temporarily store data read from the read buffer 16 of the control computer 1 before further transmission via the peripheral bus 9 to the peripheral device. The second buffer memory serves to temporarily store data received from the peripheral device via the peripheral bus 9 before being written to the write buffer 17 of the control computer 1. In other embodiments, other buffer memory sizes can also be provided.

[0043] Direct access of the control unit 11 to the main memory 3 is also possible in the Fig. 2 is possible. Here, the peripheral interface 4 is connected to the system bus 8 via a second bridge module 12 and an intermediate bus 13. Due to the mediation of the second bridge module 12, the direct memory accesses in this configuration are delayed accordingly. Here, too, the peripheral interface 4 is correspondingly Fig. 1 designed as a plug-in card, but in this example as a CardBus plug-in card.

[0044] The implementation of the method according to the invention is related to the configuration of the Fig. 1 as well as with the configuration of the Fig. 2 is possible. In both configurations, the respective plug-in card can have, for example, an LVDS interface (low voltage differential signaling interface) as a peripheral connection.

[0045] The method according to the invention or the peripheral interface 4 can be implemented in different ways. One possibility is to set up one or more virtual FIFO buffers in the main memory 3 for access by the control unit 11 of the peripheral interface 4. Any type of FIFO buffer that is mapped in the main memory can be used, for example, a ring buffer. An arrangement of different, non-contiguous memory areas can also be used, which are addressed sequentially by an algorithm, for example, by respective pointers to the subsequent memory area.

[0046] In alternative embodiments (not shown), an additional working memory can be integrated into the peripheral interface 4, which is mapped into the address range of the central processing unit 2 of the control computer 1, particularly in the area of ​​the working memory 3 of the control computer 1, and used as a buffer. The shared buffer memory area of ​​the peripheral interface 4 and the control computer 1 is then physically located in the peripheral interface, but, as in the embodiments described above, is part of the working memory 3 of the control computer.

[0047] In further alternative embodiments (not shown), an additional working memory, which is not mapped into the address range of the central processing unit 2 of the control computer 1, can be integrated into the peripheral interface 4. The buffer(s) 16, 17 for the inventive data transfer are / are set up in this additional working memory. The data transfer between the peripheral interface 4 and the control computer 1 and vice versa takes place via DMA accesses of the peripheral interface 4 to the working memory 3 of the control computer 1, for example, using interrupt requests to the central processing unit 2 when the write buffer 17 is full or the read buffer 16 is empty. The management of the additional working memory is carried out by the peripheral interface 4.In such hybrid embodiments, the frequency of interrupt requests is higher than in the previously mentioned embodiments, which require virtually no interrupt requests, but advantageously lower than in the prior art, since the size of the required buffer blocks is not important. This allows data segment sizes of several hundred kilobytes each to be transmitted without an interrupt request.

[0048] In Fig. Figure 3 shows the creation of buffers by the control computer 1 in its working memory 3. The central unit 2 of the control computer 1 executes software 14 in which subprograms with software logic 15 are configured to carry out the part of the inventive method relating to the control computer. Independently of the software 14 and the central unit 2, the control unit 11 of the peripheral interface 4 carries out the complementary part of the inventive method. For two opposing unidirectional data streams, the software 14 expediently reserves a read buffer 16 and a write buffer 17. The read buffer 16 serves the control computer 1 to store data that is to be read out by the control unit 11 and transferred to the peripheral device 10 by the software 15.The write buffer 17 serves the peripheral interface 4 to store data received from the peripheral device 10 and to be read by the software 14 by the control unit 11. Both buffers are addressed, for example, as ring buffers by both the control computer 1 and the peripheral interface 4. However, the invention can also be implemented with any other type of memory management.

[0049] Each of the buffers 16 and 17 consists, for example, of several distributed blocks of the main memory 3, combined using the "scatter-gathering" method to form a virtually contiguous FIFO buffer. The buffers 16 and 17 are reserved by the software 14 as non-pageable and each have a size of 32 MB. In other embodiments (not shown), they can also have different and other sizes. It is also possible to reserve one or both buffers as a physically contiguous block. The cache (not shown) of the central processing unit 2 is deactivated for the address ranges in which the buffers 16 and 17 are located. After the reservation, the software 14 informs the control unit 11 of the starting address and the size of the read buffer 16 and the write buffer 17. For this purpose, the control unit 11 provides two hardware registers, which are mapped into the address range of the central processing unit 2.

[0050] As from Fig. 4, in addition to the start addresses and sizes of the buffers 16, 17, the control unit 11 uses only two pointers each to manage the ring buffers 16 and 17, which are accessible to the central processing unit 2 in further hardware registers: For the read buffer 16, it uses a first pointer SV beyond the end of the valid data still to be transmitted and a second pointer SC to the end of the data already transmitted and thus to the beginning of the data still to be transmitted. The control unit 11 only reads in the buffer area A between the second pointer SC and the first pointer SV. Complementary to this, the software 14 only writes to the buffer area B. For the write buffer, the control unit 11 uses a first pointer RV beyond the end of the free buffer area and a second pointer RC to the beginning of the data already written.The control unit 11 only writes into the buffer area D between the second pointer RC and the first pointer RV, but not into the buffer area E.

[0051] The two hardware registers of the first pointers SV, RV are readable and writable by the central processing unit 2 of the control computer 1, i.e., by the software 14. They are not modified by the control unit 11 of the peripheral interface 4. The two hardware registers of the second pointers SC, RC are read-only by the central processing unit 2. They are incremented by the control unit 11 during data transfer: The second read pointer SC is incremented by the number of data units read each time the control unit 11 accesses the read buffer 16. Such access can occur in individual data units such as bytes, words, double words, or quad words. Alternatively, multiple data units can be read in one access using a burst transfer. The second write pointer RC is incremented by the number of data units written each time the control unit 11 accesses the write buffer 17.Such access can be performed in individual data units such as bytes, words, double words, or quad words. Alternatively, multiple data units can be read in a single access using a burst transfer.

[0052] If the software 14 allocates a memory area to the control unit 11 as a read buffer 16 or a write buffer 17, the control unit 11 initializes the corresponding first pointer SV or RV and the corresponding second pointer SC or RC to the beginning of the respective memory area. The pointer pairs SV / SC or RV / RC now enable independent access by the central processing unit 2 and the control unit 11 to the respective shared buffer memory area. By providing the pointers SV, SC, RV, and RC in hardware registers, access to them is automatically synchronized via the system bus 8.

[0053] Fig. Figures 4 to 6 show three states of the main memory and the two pointer pairs during two simultaneous, independent, data transfer operations in opposite directions. Fig. Figure 4 shows a state in which software 14 has already stored data to be transferred to peripheral device 10 in read buffer 16 and has subsequently placed the first pointer SV beyond the end of this data. Furthermore, by setting the first pointer RV, software 14 has marked a portion of write buffer 17 as free, so that control unit 11 can store incoming data from peripheral device 10 there. Based on the second pointers SC, RC, which still point to the beginning of the respective buffer 16 or 17, it can be seen that neither a read nor a write operation has taken place by control unit 11 since initialization.

[0054] The control unit 11 now identifies that data to be transferred is present in buffer area A based on the fact that the first pointer SV differs from the second pointer SC. The control unit 11 will then independently execute read operations and increment the second pointer SC according to the number of data units read, as well as transfer the read data to the peripheral device 10 via the relevant internal buffer memory of the peripheral interface 4. Buffer area B is not yet released for transfer; here, the software 14 can access it at will and append data to be transferred, independent of the accesses of the control unit 11 to buffer area A.

[0055] In principle, control unit 11 repeats its steps until the first pointer SV and the second pointer SC are identical again. This situation can be avoided by software 14 by timely appending additional data and correspondingly relocating the first pointer SV, which, given the buffer size of 32 MB, is possible without any problems even with a non-real-time capable operating system. Software 14 can append additional data and correspondingly relocate the first pointer SV independently of the read, count, and transfer operations of control unit 11, so that no waiting times occur apart from the synchronized access via system bus 8.

[0056] Similarly, based on the discrepancy between the first pointer RV and the second pointer RC, the control unit 11 detects that a free buffer area D exists. The buffer area E is not yet enabled for reception. As soon as data to be transmitted to the software 14 arrives from the peripheral device via the internal buffer memory, the control unit 11 will automatically write this data to the write buffer 17 and increment the second pointer RC according to the number of written data units. In principle, it repeats these steps until no more data is present in the internal buffer memory or until the first pointer RV and the second pointer RC are identical again.

[0057] This situation can be avoided by software 14 by reading the data from the write buffer 17 in a timely manner and releasing the read area by appropriately moving the first pointer RV. Given the buffer size of 32 MB, this is also possible without any problems with a non-real-time capable operating system. Reading the data and correspondingly moving the first pointer RV is possible for software 14 independently of the transfer, write, and counting operations of control unit 11, so that apart from the synchronized access via system bus 8, no waiting times occur. Resynchronization between control unit 11 and software 14 is not necessary.

[0058] In Fig. Figure 5 shows a later state in which the control unit 11 has already read data from the read buffer 16, incremented the second pointer SV accordingly, and transferred the relevant data to the peripheral device 10. By incrementing the second pointer SV, a buffer area C has been formed, which contains data that has already been transferred but not yet read out by the software 14. This buffer area C is part of the buffer area B, which the software 14 can access at will and append further data. The buffer area B has therefore increased accordingly, taking buffer circulation into account. In addition, the control unit 11 has already written data that it received from the peripheral device 10 into the write buffer 17 and incremented the second pointer RC accordingly. As a result, a buffer area F has been formed, which contains the data that has already been transferred but not yet read out by the software.Since this buffer area F is also not enabled for writing, it can be considered as part of the buffer area E.

[0059] Fig.6 shows a further state in which the software 14 has stored further data to be transmitted in the read buffer 16 and, by appropriately moving the first pointer SC, has expanded the buffer area A to include this data. In addition, the software 14 has read the received data from the buffer area F and moved the first pointer RV accordingly. In doing so, the first pointers SV, RV have circled the end of the ring buffers 16, 17 once. At the same time, the control unit 11 has added further data received from the peripheral device 10 to the buffer area F and incremented the second pointer RC accordingly. As a result, the buffer area C now occupies the entire buffer area B. Likewise, the buffer area F now occupies the entire buffer area E. This is a consequence of the fact that only in this state are the buffers 16, 17 both completely filled with data.

[0060] By incrementing the second pointers SC, RC, the control unit 11 continuously provides the software 14 with the progress of the transfer from the control computer 1 to the peripheral device 10 for retrieval, whereby the intermediate storage in the internal buffer memory of the peripheral interface 4 is not taken into account. By receiving the first pointers SV, RV, the control unit 11 can inform the software 14 of the progress of processing the respective buffer 16, 17, namely the appending or reading of data, independently of the write, read, and transfer operations. Complex, time-critical interrupt requests can, in principle, be dispensed with, so that the temporal behavior of the software 14 can be designed much more loosely than in the prior art.This significantly improves, for example, the interaction with a user because the software 14 can be optimized to respond quickly to the user's operating actions.

[0061] If one of the second counters SV, RV reaches the value of the corresponding first counter SC, RC while counting, it is still conceivable that the control unit 11 issues an interrupt request to the control computer 1, i.e., to the central processing unit 2. A predetermined routine of the software 14 can then be executed to avert an impending data loss or an impending interruption of the transmission by appending data to be transmitted or by reading transmitted data and correspondingly shifting the relevant first pointer SV, RV. Due to the temporal flexibility of the method, this case will only occur at the scheduled end of the transmission. The interrupt request can thus serve to indicate the end of the transmission.

[0062] With the method according to the invention and the peripheral interface 4, a data transmission speed approximately three times higher is possible compared to the DMA data transmission conventionally managed by the central unit 2 via interrupt request.

[0063] The invention can be used in various application areas in laser scanning microscope systems. Using a control computer 1 and a correspondingly configured peripheral interface 4, it is possible to commission and test any microscope hardware for testing purposes or for troubleshooting during LSM development. Only an adaptation of the application software 14 is necessary. Alternatively, it is possible to communicate with individual components, install new software versions, or identify faulty components in an existing LSM system during maintenance without the previously required hardware overhead. Alternatively, the invention can be used in regular operation in productive systems to achieve high data throughput at low cost with a non-real-time capable operating system. List of reference symbols 1 tax calculator 2 central unit 3 RAM 4 Peripheral interface 5 bridge building blocks 6 Processor bus 7 memory bus 8 System bus 9 Peripheral bus 10 Peripheral device 11 Control unit 12 bridge blocks 13 intermediate bus 14 Software 15 Software logic 16 read buffers 17 write buffers

Claims

[1] Laser scanning microscope system, comprising a control computer (1) and a laser scanning microscope with at least one component which is connectable or connected to the control computer (1) via a peripheral interface (4), wherein the peripheral interface (4) has a computer connection for a system bus (8) of the control computer (1), a peripheral connection for the component as a peripheral device (10) and a control unit (11) which, for the unidirectional transmission of a predeterminable number of data from the control computer (1) to the peripheral device (10) and / or vice versa, accesses a predeterminable working memory area of ​​the control computer (1), which serves as a buffer (16, 17), characterized bythat the control unit (11) provides the control computer (1) with a progress of the transmission for retrieval and that the control unit (11) can be informed by the control computer (1) of a progress of the processing of the buffer independently of the transmission, wherein the control unit takes the progress of the processing into account when accessing the buffer. [2] Laser scanning microscope system according to claim 1, characterized by that the control unit (11) can be informed by the control computer (1) of a target working memory area as a write buffer (17) and that the control unit (11) writes a number of data items transmitted by the peripheral device (10) into the write working memory area of ​​the control computer (1), wherein an upper limit for data to be transmitted can be communicated to it as the progress of the buffer processing. [3] Laser scanning microscope system according to claim 2, characterized bythat the upper limit is independent of the writing process and in particular can be extended repeatedly, whereupon the control unit (11) extends the writing up to the extended upper limit if necessary. [4] Laser scanning microscope system according to claim 1, characterized by that the control unit (11) can be informed by the control computer (1) of a source working memory area as a read buffer (16) and that the control unit (11) can be informed of a position of data to be transmitted to the peripheral device (10) as the progress of the buffer processing, wherein it reads the data from the source working memory area and transmits it via the peripheral connection. [5] Laser scanning microscope system according to claim 4, characterized by that the position of the data to be transmitted is independent of the reading process and in particular can be repeatedly extended, whereupon the control unit (11) extends the reading and transmission to the extended position of data. [6] Laser scanning microscope system according to one of claims 1 to 5, characterized by that the control unit (11) addresses the respective working memory area as a ring buffer. [7] Laser scanning microscope system according to one of claims 1 to 6, characterized by that the control unit (11) for a read buffer (16) - receives a first pointer (SV) behind an end of the data still to be transmitted from the control computer (1) as a message about the number of data to be transmitted and - provides the control computer (1) with a second pointer (SC) as a progress notification, which it continues to count during the reading process, pointing to a start of the data still to be sent for retrieval. [8] Laser scanning microscope system according to one of claims 1 to 6, characterized by that the control unit (11) for a write buffer (17) - receives a first pointer (RV) behind an end of a free buffer area from the control computer (1) as a message about the upper limit of the data to be transmitted and - provides the control computer (1) with a second pointer (RC) as a progress notification, which it continues to count during the writing process, pointing to a start of the data already written for retrieval. [9] Laser scanning microscope system according to claim 7 or 8, characterized by that the control unit (11) provides a respective register that can be written to, and in particular also read out, via the system bus (8) for one of the first pointers (SV, RV) and a respective register that can be read out via the system bus (8) for one of the second pointers (SC, RC). [10] Laser scanning microscope system according to one of the preceding claims, characterized by an integrated additional working memory which serves as a buffer for the transmission instead of the working memory (3) of the control computer (1). [11] Method for the unidirectional transmission of data from a control computer (1) to a peripheral device (10) and / or vice versa, wherein the following steps are carried out by means of a central unit (2) of the control computer (1): - Communicating a reserved, non-movable, non-pageable area of ​​a working memory of the control computer (1) to the peripheral interface (4), - if data to be transmitted to the peripheral device (10) is identified: writing the data to be transmitted into the reserved memory area adjacent to data not yet transmitted and communicating a position, in particular the end address (SV), of the written data as processing progress to the peripheral interface (4), - if data transmitted by the peripheral device in the reserved memory area is identified on the basis of a transmission progress (RC) provided by the peripheral interface (4): reading the transmitted data from the reserved memory area and communicating a position of the data not yet read, in particular the start address (RV), to the peripheral interface as processing progress. [12] Method according to claim 11, wherein a target working memory area is received as a write buffer (17) from the control computer (1) by means of a control unit (11) of the peripheral interface (4) and a number of data transmitted from the peripheral device (10) are written into the write working memory area of ​​the control computer (1), wherein as the progress of the buffer processing an upper limit (RV) for data to be transmitted is received independently of the write process and in particular repeatedly extended, whereupon the writing is extended as required up to the extended upper limit (RV). [13] Method according to claim 11 or 12, wherein a source working memory area is received as a read buffer (16) from the control computer (1) by means of a control unit (11) of the peripheral interface (4), and a position (SV) of data to be transferred to the peripheral device (10) is received as the progress of the buffer processing independently of the read operation and in particular repeatedly extended, wherein the data are read from the source working memory area and transferred via the peripheral connection and upon notification of an extended position (SV) the reading and transferring is extended to the extended number of data. [14] Computer program arranged to carry out a method according to one of claims 11 to 13. [15] A method for operating a laser scanning microscope system comprising a control computer (1) and a laser scanning microscope with at least one component that is connectable or connected to the control computer (1) via a peripheral interface (4), wherein the peripheral interface (4) has a computer connection for a system bus (8) of the control computer (1), a peripheral connection for the component as a peripheral device (10), wherein for the unidirectional transmission of a predeterminable number of data from the control computer (1) to the peripheral device (10) and / or vice versa via the system bus (8), access is made to a predeterminable working memory area of ​​the control computer (1), which serves as a buffer (16, 17), or to an additional working memory integrated into the peripheral interface (4), which serves as a buffer (16, 17),wherein the control computer (1) is provided with a progress of the transmission for retrieval and the control computer (1) receives a progress of the processing of the buffer independently of the transmission, wherein the progress of the processing is taken into account when accessing the buffer., [16] Computer or FPGA program, in particular firmware, configured to carry out the method according to claim 15.

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