Device and method for optical fibers and optocouplers, and manufacturing methods therefor

Abstract

Optical device with: a semiconductor substrate (1120; 1620; 1920) that contains solid single-crystal silicon; a trench (1185; 1285; 1685; 1886; 1985) arranged in the semiconductor substrate (1120; 1620; 1920) comprising sidewalls which are either substantially perpendicular to a surface of the semiconductor substrate (1120; 1620; 1920) or inclined obliquely outwards, such that the trench width at the surface is greater than at a bottom of the trench (1285); a first cladding layer (1140; 1240; 1640; 1940) which is arranged in the trench (1185; 1285; 1685; 1886; 1985) and which has an upper surface which is substantially coplanar with, below, or above the surface of the semiconductor substrate (1120; 1620; 1920); at least one core region (1160; 1360; 1660; 1960) comprising single-crystal silicon and arranged above the first cladding layer (1140; 1240; 1640; 1940) such that it provides at least one optical waveguide (1170; 1370; 1670; 1970) coupled to at least one grating (1175; 1375; 1675; 1975) having an upper surface that is substantially coplanar with an upper surface of the optical waveguide (1170; 1370; 1670; 1970); a distributed Bragg reflector (DBR) arranged within the first cladding layer (1140; 1240; 1640; 1940) comprising at least a first and a second material layer (A, B), each of which is in contact with a third material layer having a refractive index different from that of the first and second material layers (A, B); wherein at least the first and second material layers (A, B) each have three distinct sections arranged such that the first section is substantially parallel to the bottom of the trench (1185; 1285; 1685; 1886; 1985), the second section is substantially parallel to a first side wall of the trench (1185; 1285; 1685; 1886; 1985), and the third section is substantially parallel to a second side wall of the trench (1185; 1285; 1685; 1886; 1985).

Description

BACKGROUND 1. Field of the invention

[0001] The invention relates to optical devices and methods and relates in particular to optical waveguides and couplers used for implementing optical communications, as well as methods for manufacturing the optical waveguides and couplers. 2. Description of the related technology

[0002] Optical devices, such as optical fibers, optical waveguides, and optocouplers, are used for high-speed, low-power communication in various devices and systems. Optical interconnects have been used to achieve high-capacity, high-speed, low-power communication in semiconductor memory devices, modules, and systems. In such systems, optical fibers can be used to communicate between modules. The optical fibers can be coupled to memory modules and devices via optocouplers, and the optical signals can be transmitted within modules and memory devices via optical waveguides.

[0003] Due to the need for small dimensions, interconnects in memory modules, devices, and systems typically require optical waveguides and couplers to be integrated into a semiconductor wafer. Integrated optical waveguides and couplers are usually formed on a silicon-on-insulator (SOI) substrate, which comprises a layer of an insulating material, such as silicon dioxide (SiO2), deposited over a single-crystal silicon substrate or wafer. The insulating material serves as a bottom-cladding layer for the optical waveguide. An optical waveguide core material, such as amorphous silicon, which has a higher refractive index than that of the bottom cladding layer, is deposited on top of the bottom cladding layer.An upper cladding layer, such as a layer of a material with a lower refractive index than the core layer, can be formed over and / or around the core layer to complete the optical waveguide cladding. The upper cladding layer can be another layer of silicon oxide, a layer of polysilicon, or another material with a lower refractive index than the core. For example, in some cases, air can serve as an upper cladding layer.

[0004] SOI wafers in which conventional devices are formed are significantly more expensive than conventional semiconductor wafers. Since conventionally integrated optical devices are formed on SOI substrates, full integration of optical devices with other circuitry, such as memory device circuitry, is not possible because such devices are not typically formed on SOI substrates. Consequently, optical devices are typically formed as separate devices on separate chips and / or in separate packages. This results in devices, modules, and systems with large dimensions and complexity, and also higher relative costs.

[0005] As the demand for small dimensions, high speed, low power and cost-effective storage devices, modules and systems continues to increase, there is a growing need for optical interconnect devices and systems that can be manufactured more cheaply, have smaller dimensions, operate at high speed and with low power consumption, and can be efficiently integrated with the other circuit arrangements on a single chip or wafer.

[0006] From US 2002 / 0 005 050 A1, a method for manufacturing integrated optical waveguides is known in which, by means of a common mask structure, both the position of the waveguide cores and the horizontal positions of micromechanically manufactured structural elements such as grooves, depressions or inclined surfaces are defined relative to each other in order to enable precise optical coupling to external and / or internal components.

[0007] Taillaert, Dirk et al., “Grating Couplers for Coupling between Optical Fibers and Nanophotonic Waveguides”, Jpn. J. Appl. Phys., Vol. 45(8A), 2006, pp. 6071-6077 describes the use of grating couplers for coupling light into nanophotonic waveguides, whereby grating couplers can be flexibly integrated into photonic circuits and coupling efficiencies of over 30% have already been achieved at a bandwidth of 40 nm.

[0008] From US 2004 / 0156589 A1, an optical wavelength grating coupler is known which includes one or more distributed Bragg reflectors (DBRs) or other reflector elements to increase the coupling efficiency, wherein light exiting through the grating towards the substrate is reflected through the DBR and directed back to the grating, and the grating coupler may optionally have a gas-filled cavity and an antireflection coating to reduce reflection losses.

[0009] From US 2010 / 0 189402 A1 a method for adjusting the effective refractive index of optical waveguide structures is known, in which the effective refractive index and thus the operating wavelength of an optical component can be adjusted by compacting the cladding material in a compaction area arranged next to the core structures.

[0010] From US 2007 / 0 101 927 A1, a method for producing silicon-based thin-film waveguides is known, in which a thin dielectric layer is deposited on a substrate, a channel is formed in it, and the channel is then filled with a silicon layer, wherein the silicon can be deposited epitaxially or amorphously or semi-crystallinely and subsequently crystallized. SUMMARY

[0011] The object of the invention is to provide improved optical devices and improved methods for manufacturing optical devices.

[0012] An optical device according to the invention comprises a semiconductor substrate, a trench, a first cladding layer, at least one core region, and a distributed Bragg reflector. The semiconductor substrate comprises solid single-crystal silicon. The trench is arranged in the semiconductor substrate and includes sidewalls that are either substantially perpendicular to a surface of the semiconductor substrate or inclined outwards, such that the trench width is greater at the surface than at the bottom of the trench. The first cladding layer is arranged in the trench and has an upper surface that is substantially coplanar with, below, or above the surface of the semiconductor substrate.The at least one core region comprises single-crystal silicon and is arranged above the first cladding layer such that it provides at least one optical waveguide coupled to at least one grating having an upper surface that is substantially coplanar with an upper surface of the optical waveguide. The distributed Bragg reflector is arranged within the first cladding layer (1140; 1240; 1640; 1940) and comprises at least a first and a second material layer, each of which is in contact with a third material layer having a refractive index different from that of the first and second material layers.The at least first and second layers of material each have three distinct sections arranged such that the first section is essentially parallel to the bottom of the trench, the second section is essentially parallel to a first side wall of the trench, and the third section is essentially parallel to a second side wall of the trench.

[0013] In one embodiment, a first side wall of the core area is a distance d1 away from a first side wall of the trench, and a second side wall of the core area is a distance d2 away from a second side wall of the trench.

[0014] In one embodiment, the distances d1 and d2 are greater than approximately 0.27 µm, and a leakage loss in the optical waveguide is less than 1 dB / mm.

[0015] In one embodiment, an upper surface of the first cladding layer is lower than an upper surface of the semiconductor substrate, and the distances d1 and d2 are greater than about 0.35µm, and a leakage loss in the optical waveguide is less than 1 dB / mm.

[0016] In a further embodiment, the optical device further comprises a second cladding layer arranged such that at least one section is covered by an upper surface and side walls of the core area.

[0017] In another embodiment, the distributed Bragg reflector is formed below the at least one optical waveguide and the at least one grating.

[0018] In one embodiment, the core area consists of single-crystal silicon with defects.

[0019] According to another aspect, the invention relates to a method for manufacturing an optical device. The method comprises the following steps: Providing a semiconductor substrate that features solid single-crystal silicon; Forming a trench in the semiconductor substrate such that the side walls of the trench are either substantially perpendicular to a surface of the semiconductor substrate or are inclined outwards, so that the trench width at the surface is greater than at the bottom of the trench; Forming a first cladding layer substantially within the trench, such that the first cladding layer has an upper surface that is substantially coplanar with, below, or above the surface of the semiconductor substrate; Forming a core region comprising single-crystal silicon on the first cladding layer such that it provides at least one optical waveguide coupled to at least one lattice having an upper surface that is substantially coplanar with an upper surface of the optical waveguide; Forming a distributed Bragg reflector within the first mantle layer, comprising at least a first and a second material layer, each of which is in contact with a third material layer having a refractive index different from that of the first and second material layers, and wherein the at least first and second material layers each have three distinct sections arranged such that the first section is substantially parallel to the bottom of the trench, the second section is substantially parallel to a first side wall of the trench, and the third section is substantially parallel to a second side wall of the trench.

[0020] In one embodiment, the first cladding layer is made of a dielectric material with the general formula Si Z N Y Oz formed.

[0021] In one embodiment, the method further includes the formation of a second sheath layer that covers at least a section of an upper surface and a lateral surface of the core area.

[0022] In one embodiment, a first side wall of the core area is located a distance d1 from a first side wall of the trench, a second side wall of the core area is located a distance d2 from a second side wall of the trench, and the core area has a width w, where the width w is a distance between the first and second side walls of the core area, and the distances d1 and d2 are selected based on a desired leakage loss caused by the substrate. In one embodiment, the leakage loss caused by the substrate is no more than 1 dB / mm if both distances d1 and d2 are at least 0.27 µm.

[0023] In one embodiment, a first side wall of the core region is located a distance d3 from a first side wall of a second core region adjacent to the core region, and a second side wall of the core region is located a distance d4 from a first side wall of a third core region adjacent to the core region, wherein the distances d3 and d4 are selected based on a desired leakage loss in the optical waveguide caused by the adjacent core regions. In one embodiment, the leakage loss in the optical waveguide caused by the adjacent core regions is not greater than 1 dB / mm if the smaller of the two distances, d3 and d4, is at least 0.35 µm.

[0024] In one embodiment, the core area has a refractive index that is higher than that of the first cladding layer.

[0025] In one embodiment, the method further includes the formation of a conversion unit for converting between optical and electrical signals.

[0026] In one embodiment, the method further comprises forming a transmitter-receiver for transmitting and receiving optical signals.

[0027] One embodiment of the invention can be used to provide an integrated semiconductor device, such as a storage device, with integrated optical interconnect devices, such as optical waveguides and optocouplers.

[0028] Another embodiment of the invention can be used to provide a module, such as a storage module, which has an optical interconnection system with integrated optical interconnection devices, such as optical waveguides and optocouplers.

[0029] Another embodiment of the invention can be used to provide an optical interconnection system, such as an optical interconnection system for a storage system, in which storage devices on storage modules include integrated optical interconnection devices, such as optical waveguides and optocouplers.

[0030] Another embodiment of the invention can be used to manufacture storage devices, storage modules, storage systems and interconnection systems, in which storage devices on storage modules comprise optical interconnection devices integrated, such as optical waveguides and optocouplers. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The foregoing, as well as other features and advantages of the invention, will become clear from the more detailed description of the preferred embodiments of the invention, which are also illustrated in the accompanying drawings. In these drawings, the same reference numerals refer to the same parts across the various views. The drawings are not necessarily to scale; instead, the focus is on illustrating the principle of the invention. For clarity, the thickness of layers and areas is exaggerated in the drawings. Fig. Figure 1A is a schematic cross-sectional diagram of an exemplary optical waveguide structure. Fig. 1B is a graph of the optical leakage through the substrate of the structure of Fig. 1A as a function of the distances d1 and d2. Fig. Figure 2 is a schematic cross-sectional view of a section of a device which contains the optical waveguide structure of Fig. 1A includes. Fig. Figure 3A is a schematic cross-sectional diagram of another exemplary optical waveguide structure. Fig. 3B is a graph of the optical leakage through the substrate of the structure of Fig. 3A as a function of the distances d5 and d6. Fig. Figures 4A to 4G are schematic cross-sectional views illustrating a method for fabricating an optical waveguide structure of Fig. 1A. Fig. Figures 5A to 5G are schematic cross-sectional views illustrating a method for fabricating an optical waveguide structure of Fig. 3A. Fig. Figure 6 is a schematic perspective view showing an exemplary vertical optical coupling with an integrated optical waveguide structure. Fig. Figure 7 is a schematic perspective view of an exemplary optocoupler structure or device. Fig. Figure 8 is a schematic perspective view of another exemplary optocoupler structure. Fig. Figure 9 is a schematic perspective view of another exemplary optocoupler structure or device. Fig. Figure 10 is a schematic perspective view of another exemplary optocoupler structure or device. Fig. Figure 11 is a schematic perspective view of another exemplary optocoupler structure or device. Fig. Figure 12 is a schematic perspective view of another exemplary optocoupler structure or device. Fig. Figures 13 to 18 are schematic perspective views of the [images / structures] in the Fig. Optocoupler structures or devices shown in Figures 7 to 12, extended by a distributed Bragg reflector, according to exemplary embodiments of the invention. Fig. Figure 19 is a schematic perspective representation of another exemplary embodiment of a coupler structure or device according to the invention. Fig. Figures 20A to 20F are schematic perspective views illustrating a method for manufacturing a coupler structure or device used in Fig. 7 is shown. Fig. Figures 21A to 21F are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. 8 is shown. Fig. Figures 22A to 22F are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. 9 is shown. Fig. Figures 23A to 23F are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. 10 is shown, represent. Fig. Figures 24A to 24F are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. 11 is shown, represent. Fig. Figures 25A to 25E are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. 12 is shown, represent. Fig. Figures 26A to 26I are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. Figure 13 shows an exemplary embodiment of the invention. Fig. Figures 27A to 27G are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. Figure 14 shows an exemplary embodiment of the invention. Fig. Figures 28A to 28I are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. Figure 15 shows an exemplary embodiment of the invention. Fig. Figures 29A to 29H are schematic perspective views illustrating a method for manufacturing the coupler structure or device described in Fig. Figure 16 shows an exemplary embodiment of the invention. Fig. Figures 30A to 30H are schematic perspective views illustrating a method for manufacturing the coupler structure or device used in Fig. Figure 17 shows an exemplary embodiment of the invention. Fig. Figure 31 shows a graph of the optical coupling efficiency versus a thickness of the base of the cladding layer, which is applicable to the embodiments of the invention described herein. Fig. Figure 32 shows a schematic block diagram of a processing system in which the optical waveguide and optocoupler devices and methods can be applied according to an exemplary embodiment of the invention. Fig. Figure 33 shows a schematic block diagram of a processing system in which the optical waveguide and optocoupler devices and methods can be applied according to an exemplary embodiment of the invention. Fig. Figure 34 shows a schematic block diagram of a processing system in which the optical waveguide and optocoupler device and method can be applied according to an exemplary embodiment of the invention. Fig. Figure 35 is a schematic functional diagram of a memory circuit, e.g. a DRAM memory circuit, which includes the optocoupler and optical waveguide devices of the invention, which are integrated on the same chip or raw chip as the chip or raw chip on which the memory circuit is formed. Fig. Figure 36 is a schematic perspective view of a section of a computer or processing system in which the optical waveguide and optocoupler of the invention can be applied according to an exemplary embodiment of the invention. Fig. Figure 37 is a schematic cross-sectional view of a section of a computer or processing system in which the optical waveguide and optocoupler of the invention can be applied according to an exemplary embodiment of the invention. Fig. Figures 38A to 38C are schematic perspective views of an optical intermediate connection, e.g. optical waveguides, structures to which the invention is applicable. Fig. Figure 39 is a schematic cross-sectional view of a device in a housing, which includes the optical devices according to an exemplary embodiment of the invention. Fig. Figure 40 is a schematic block diagram of a general processing, communication or display system to which the invention is applicable. DETAILED DESCRIPTION

[0032] Several exemplary embodiments are described in more detail below with reference to the accompanying drawings, in which some exemplary embodiments are shown. However, the present invention can be implemented in many different forms and should not be limited to the exemplary embodiments listed here.

[0033] It is to be understood that when an element or layer is described as "on," "connected to," or "coupled with" another element or layer, it may be directly on top of, connected to, or coupled with that other element or layer, or intermediate elements or layers may be present. Conversely, no intermediate elements or layers are present when an element is described as "directly on," "directly connected to," or "directly coupled with" another element or layer. As used herein, the term "and / or" includes any and all combinations of the one or more associated items listed.

[0034] It should be understood that although the terms first, second, third, etc. are used here to describe different elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited to these terms. These terms are used merely to distinguish one element, component, region, layer, or section from another. Accordingly, a first element, component, region, layer, or section discussed below could likewise be referred to as a second element, component, region, layer, or section without departing from the teaching of the present invention.

[0035] Spatially relative terms such as "below," "under," "lower," "above," "upper," and the like can be used here for the sake of simplification to describe the relationship of one element or feature to another, as illustrated in the figures. It is important to understand that spatially relative terms are intended to encompass various orientations of the device during use or operation, in addition to the orientation shown in the figures. For example, if a device in the figures is turned upside down, the elements labeled "below" or "under" other elements or features would then be oriented "above" them. In this sense, the exemplary expression "below" includes both an orientation above and below.The device may be oriented differently (rotated by 90° or otherwise oriented), and the spatially relative terms can be interpreted accordingly.

[0036] The terminology used here serves solely to provide a detailed description of the exemplary embodiments and is not intended to limit the present invention. The singular forms "a" and "the" are used here to include the plural forms unless the context clearly indicates otherwise. Furthermore, the terms "have" and / or "have" when used here specify the presence of the indicated features, numbers, steps, processes, elements, and / or components, but do not exclude the presence or addition of one or more or other features, numbers, steps, processes, elements, components, and / or groups thereof.

[0037] Exemplary embodiments are described here with reference to cross-sectional views, which are schematic representations of idealized exemplary embodiments (and intermediate structures). As such, deviations from the shapes shown are to be expected as a result of, for example, manufacturing techniques and / or tolerances. Accordingly, exemplary embodiments should not be interpreted as limited to the specific shapes of areas shown here, but should also encompass deviations in shape resulting from the manufacturing process. For example, an inserted area shown as a rectangle will typically have more rounded or curved features and / or gradients at the edges of the inserted clusters than an abrupt transition from an inserted to a non-inserted area.Similarly, a buried area formed by insertion may occur in some insertions into a region between the buried area and the surface through which the insertion takes place. Therefore, the areas depicted in the figures are schematic in nature, and their shapes are not intended to represent the actual shape of any area of ​​a device, nor are they intended to limit the scope of the present invention.

[0038] According to the invention, various optical devices, in particular optical waveguides and optocoupler devices, are provided. Interconnect systems that utilize the optical devices of the invention are also provided. In particular, some exemplary embodiments provide optical interconnect systems that are used with semiconductor memory circuits, e.g., DRAM circuits. The invention also provides modules, e.g., memory modules, DRAM modules, DIMM modules, and DRAM DIMM modules, that utilize the optical devices and interconnect systems of the invention. Likewise, computational and / or processing systems are provided that utilize the optical devices, interconnect systems, and / or modules of the invention.

[0039] Below, various exemplary embodiments of the invention are described in detail with reference to the accompanying drawings.

[0040] Fig. Figure 1A is a schematic cross-sectional diagram of an optical waveguide structure 100 to illustrate partial aspects of exemplary embodiments of the invention. The optical waveguide structure 100 is formed on or in a solid semiconductor wafer, such as a solid silicon wafer or substrate 10. The solid silicon substrate 10 comprises an upper or front surface 10a and a lower or rear surface 10b. A trench region 12 is formed through the front surface 10a in the substrate 10. The trench region has side walls 12a and 12b and a trench width TW.

[0041] A soil mantle layer 14 is formed in the trench 12. The soil mantle layer 14 consists of an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. The upper surface of the soil mantle layer 14 is level with, or at the same height as, the upper surface 10a of the substrate 10. This is achieved, for example, by chemical-mechanical polishing (CMP) after the formation of the soil mantle layer material in the trench 12.

[0042] A core region 22a is formed on the upper surface of the base-cladding layer 14. The core region 22a consists of a material having a higher refractive index than that of the base-cladding layer 14. According to an exemplary embodiment, the core region 22a is, for example, formed from a single-crystal silicon with defects. That is, the core region 22a is formed from a single-crystal silicon with a lower degree of crystallinity, i.e., a higher percentage of crystal defects, than in a solid single-crystal silicon substrate. The core region 22a serves as the core of the optical waveguide 100. Light propagates through the core region 22a and is confined to the core region 22a by the refractive index contrast between the core region 22a and the base-cladding layer 14.This means that the lower refractive index of the soil mantle layer 14 limits the spreading light to the interior of the core region 22a, which has a higher refractive index than the soil mantle layer.

[0043] Although not in Fig. As shown in Figure 1A, the optical waveguide structure can also include an upper or higher cladding layer formed over the upper and lateral surfaces of the core region 22a and over the bottom cladding layer 14. Like the bottom cladding layer 14, the higher cladding layer can be made of an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. Alternatively, the higher cladding layer can be omitted. In this case, air can serve as the upper cladding layer of the optical waveguide. The higher cladding layer serves the same purpose as the bottom cladding layer 14. In particular, the higher cladding layer also serves to confine the propagating light in the core region 22a, since the refractive index of the higher cladding layer is lower than that of the core region 22a.

[0044] The core area 22a has a width w. The left side wall of the core area 22a is positioned at a distance d1 from the left side wall 12a of the trench 12, and the right side wall of the core area 22a is positioned at a distance d2 from the right side wall 12b of the trench 12. According to the invention, the distances d1 and d2 are selected such that the leakage loss in the optical waveguide 100, caused by the propagation of light through the substrate via the side walls 12a and 12b of the trench 12, is reduced or minimized. Fig. 1B is a graph of the optical leakage loss through substrate 10 of the structure of Fig. 1A as a function of the distances d1 and d2. As shown in the graph of Fig. As shown in Figure 1B, the optical leakage loss in the substrate of some exemplary embodiments is less than or equal to 1.0 dB / mm when the distances d1 and d2 are greater than or equal to 0.27 µm. To achieve this sufficient optical leakage loss in the substrate, the distances d1 and d2 can be expressed by the ratio: 0.27 µm ≤ d1, d2 ≤ TW - w - 0.27 µm. In many cases, larger optical leakage losses are tolerable. According to the invention, the optical leakage loss in the substrate is less than or equal to 24 dB / mm when the distances d1 and d2 are greater than or equal to 0.1 µm. To achieve this sufficient optical leakage loss in the substrate, the distances d1 and d2 can be expressed by the equation: 0.1µm ≤ d1, d2 ≤ TW - w - 0.1 µm.

[0045] Fig. Figure 2 is a schematic cross-sectional view of a section of a device which contains the optical waveguide structure 100 of Fig. 1A includes the description of features and elements of the structure of Fig. 2, which are the same as those of the structure of Fig. 1A is not repeated. The section of the device from Fig. 2 includes, in addition to the optical waveguide structure, 100 additional “dummy” core areas 22b, which are connected simultaneously with core area 22a of Fig. 1A are formed. It should be noted that the dummy core regions 22b can be core regions of optical waveguide structures formed adjacent to the optical waveguide structure 100. The left side wall of core region 22a is a distance d3 from a right side wall of a left dummy core region 22b, and the right side wall of core region 22a is a distance d4 from a left side wall of a right dummy core region 22b. According to the invention, the distances d3 and d4 are selected such that an optical leakage loss in the optical waveguide 100 caused by adjacent core regions is reduced or minimized. According to the invention, the optical leakage loss caused by adjacent core regions is less than or equal to 1 dB / mm in some exemplary embodiments when the distances d3 and d4 are greater than or equal to 0.35 µm.This means that d3, d4 ≥ 0.35µm for an optical leakage loss of less than or equal to 1db / mm.

[0046] Fig. Figure 3A is a schematic cross-sectional diagram of another optical waveguide structure 200 to illustrate partial aspects of exemplary embodiments of the invention. A description of features and elements of the structure of Fig. 3A, which are related to the structure of Fig. References 1A and 1A are identical and should not be repeated. The optical waveguide structure 200 is formed on or in a solid semiconductor wafer, such as a solid silicon wafer or substrate 10. The solid silicon substrate 10 comprises an upper or front surface 10a and a lower or rear surface 10b. A trench region 12 is formed through the front surface 10a in the substrate 10. The trench region 12 has sidewalls 12a and 12b and a trench width TW.

[0047] A soil mantle layer 44 is formed in the trench 12. The soil mantle layer 44 consists of an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. The upper surface of the soil mantle layer 44 is lower than the upper surface 10a of the substrate 10.

[0048] A core region 52a is formed on the upper surface of the base-cladding layer 44. The core region 52a consists of a material having a higher refractive index than that of the base-cladding layer 44. For example, according to an exemplary embodiment, the core region 52a is formed from a single-crystal silicon with defects. That is, the core region 52a is formed from a single-crystal silicon with a lower degree of crystallinity, i.e., a higher percentage of crystal defects, than in the solid single-crystal silicon substrate. The core region 52a serves as the core of the optical waveguide 100. Light propagates through the core region 52a and is confined to the core region 52a by the refractive index contrast between the core region 52a and the base-cladding layer 44.This means that the lower refractive index of the soil mantle layer 44 limits the propagating light to the interior of the core region 52a, which has a higher refractive index than that of the soil mantle layer.

[0049] Although not in Fig. As shown in Figure 3A, the optical waveguide structure 200 can also have an upper or higher cladding layer formed over the upper and lateral surfaces of the core region 52a and over the bottom cladding layer 44. Like the bottom cladding layer 44, the higher cladding layer can also be made of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. Alternatively, the higher cladding layer can be omitted. In this case, air serves as the higher cladding layer of the optical waveguide. The upper cladding layer serves the same purpose as the bottom cladding layer 44. In particular, the higher cladding layer also serves to confine the light propagating in the core region 52a, since the refractive index of the higher cladding layer is lower than that of the core region 52a.

[0050] The core area 52a has a width w. The left side wall of the core area 52a is a distance d5 from the left side wall 12a of the trench 12, and the right side wall of the core area 52a is a distance d6 from the right side wall 12b of the trench 12. According to the invention, the distances d5 and d6 are selected such that an optical leakage loss in the optical waveguide 200, caused by the propagation of light through the substrate via the side walls 12a and 12b of the trench 12, is reduced or minimized. Fig. 3B is a graph of the optical leakage through substrate 12 of the structure of Fig. 3A as a function of the distances d5 and d6. As shown in the graph of Fig. As shown in Figure 3B, the optical leakage loss in the substrate is less than or equal to 1 dB / mm in some exemplary embodiments when the distances d5 and d6 are greater than or equal to 0.35 µm. To achieve this sufficient optical leakage loss in the substrate, the distances d5 and d6 can be expressed by the ratio: 0.35 µm ≤ d5, d6 ≤ TW - w - 0.35 µm. In many cases, larger optical leakage losses are tolerable. According to the invention, the optical leakage loss in the substrate is less than or equal to 22 dB / mm when the distances d5 and d6 are greater than or equal to 0.15 µm. To achieve this sufficient optical leakage loss in the substrate, the distances d5 and d6 can be expressed by the ratio: 0.15µm ≤ d5, d6 ≤ TW - w- 0.15µm.

[0051] One difference between the optical waveguide structures 100 and 200, which are used in the Fig. 1A and Fig. The difference shown in 3A is that, in the case of the Fig. 1A the upper surface of the soil mantle layer 14 is flush with the upper surface of the substrate 10, and in the case of the Fig. 3A the upper surface of the soil mantle layer 44 is lower than the upper surface of the substrate 10. That is, in the optical waveguide structures of Fig. 3A is the core region recessed or buried in the trench. In both optical waveguide structures, the optical waveguide is applicable to silicon photonics because the optical waveguide is fabricated in a solid silicon substrate, and it can be easily integrated with other circuits on a chip or wafer, such as a CMOS circuit or a semiconductor memory circuit. In some such applications, it is desirable for the optical waveguide core region to be located above the top of the trench ( Fig. 1A) is designed to simplify integration with the other circuits, and in some such applications it is desirable to have the core area within the trench ( Fig. 3A) to simplify integration with the other circuits. The optical waveguide structure of the invention is applicable to all such applications.

[0052] It should also be noted that the core area 52a in the optical fiber structure 200 of Fig. 3A has a certain height h1, and the distance between the top of the soil mantle layer 44 and the upper surface of the substrate has a certain height h2. Although in Fig. While h1 and h2 are shown to be of equal size in 3A, this is not necessarily the case. For example, h1 may be larger than h2, or h2 may be larger than h1. The relative heights h1 and h2 are selected based on the desired facilitation of integrating the optical waveguide structure 200 with other circuits on the same chip or wafer.

[0053] The Fig. Figures 4A-4G are schematic cross-sectional views illustrating a method for manufacturing the optical waveguide structure 100 of Fig. 1A illustrates partial aspects of exemplary embodiments of the invention. With reference to Fig. In step 4A, a substrate 10, such as a solid semiconductor substrate, for example, a solid silicon substrate, is provided. The substrate 10 comprises an upper or front surface 10a and a lower or rear surface 10b. The substrate 10 is selectively etched to form a trench 12, which has side walls 12a and 12b. The depth of the trench 12 is selected based on the desired thickness of a bottom-case layer formed in the trench 12. Next, the bottom-case layer 14 is formed in the trench 12. The bottom-case layer 14 is formed from an insulating material that has a lower refractive index than that of the core region of the optical waveguide, which is subsequently formed on the bottom-case layer 14. The material of the bottom-case layer 14 can be, for example, silicon oxide, silicon nitride, or silicon oxynitride.The upper surface of the soil mantle layer is level with or at the same height as the upper surface 10a of the substrate 10. This can be achieved by using a polishing process, such as chemical mechanical polishing (CMP), on the soil mantle layer after it has been formed, filling the trench 12.

[0054] With reference to Fig. 4B, a layer 16 of an amorphous semiconductor material, such as amorphous silicon, is then formed over the bottom mantle layer 14 and the upper surface 10a of the substrate 10. The amorphous silicon layer 16 can be formed, for example, by chemical vapor deposition (CVD), atomic layer deposition (ALD), or similar processes. Next, with reference to Fig. 4C, layer 16 of amorphous silicon is at least partially crystallized in order to transform layer 16 of amorphous silicon into layer 18 of imperfect single-crystal silicon. That is, layer 18 is formed from single-crystal silicon with a lower degree of crystallinity, i.e., a higher percentage of crystal defects than in the solid single-crystal silicon substrate 10. The crystallization of the amorphous silicon layer 16 can be carried out, for example, by laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), solid-phase crystallization (SPC), or similar methods.

[0055] Next, with reference to Fig. 4D, a mask pattern 20 is formed on layer 18 of the single-crystal silicon with defects to define the core region of the optical waveguide. The mask pattern 20 can be formed, for example, from a photoresistant and / or a combination of a photoresistant and a hard mask material. Subsequently, with reference to Fig. 4E The structure is selectively etched using the mask pattern 20 as an etching mask to remove unmasked sections of layer 18 and form the core region 22a of the optical waveguide structure 100. Likewise, additional regions 22b are formed simultaneously with the same material as that of the core region 22a. These other regions 22b can be core regions of other adjacent optical waveguide structures or such regions.

[0056] In relation to Fig. 4F then removes mask pattern 20. Regarding Fig. 4G can then form a higher or upper cladding layer 23 over the upper and lateral surfaces of the core region 22a and over the bottom cladding layer 14. Like the bottom cladding layer 14, the higher cladding layer 23 can be made of an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. Alternatively, the higher cladding layer 23 can be omitted. In this case, air can serve as the higher cladding layer of the optical waveguide. The higher cladding layer serves the same purpose as the bottom cladding layer 14. In particular, the higher cladding layer also serves to confine the light propagating in the core region 22a, since the refractive index of the higher cladding layer is lower than that of the core region 22a.

[0057] The Fig. Figures 5A-5G are schematic cross-sectional views illustrating a method for manufacturing the optical waveguide structure 200 of Fig. Section 3A illustrates partial aspects of an exemplary embodiment of the invention. With regard to Fig. In step 5A, a substrate 10, such as a solid semiconductor substrate, for example, a solid silicon substrate, is provided. The substrate 10 comprises an upper or front surface 10a and a lower or rear surface 10b. The substrate is selectively etched to form a trench 12, which has side walls 12a and 12b, within the substrate 10. The depth of the trench 12 is selected based on the desired thickness of the bottom-case layer formed within the trench 12. The bottom-case layer 44 is then formed within the trench 12. The bottom-case layer 44 is formed from an insulating material and has a lower refractive index than that of the optical waveguide subsequently formed on the bottom-case layer 44. The material of the bottom-case layer 44 can be, for example, silicon oxide, silicon nitride, or silicon oxynitride.The upper surface of the soil mantle layer 44 is lower than the upper surface 10a of the substrate 10.

[0058] With reference to Fig. 5B, a layer 46 of an amorphous semiconductor material, for example amorphous silicon, is then formed over the bottom mantle layer 44 and the upper surface 10a of the substrate 10. The amorphous silicon layer 46 can be formed, for example, by chemical vapor deposition (CVD), atomic layer deposition (ALD), or a similar process. With regard to Fig. In step 5C, layer 46 of the amorphous silicon is then at least partially crystallized to transform it into a layer 48 of imperfect single-crystal silicon. That is, layer 48 is formed from single-crystal silicon with a lower degree of crystallinity, i.e., a higher percentage of crystal defects, than the solid single-crystal silicon substrate 10. The crystallization of the amorphous silicon layer 46 can be carried out, for example, by laser-assisted epitaxial growth (LEG), solid-phase epitaxy (FPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), solid-phase crystallization (FPC), or similar methods.

[0059] With reference to Fig. In 5D, a mask pattern 50 is then formed on layer 48 of the single-crystal silicon with defects to define a core region of the optical waveguide. The mask pattern 50 can, for example, be formed from a photoresistant and / or a combination of a photoresistant and a hard mask material. Regarding Fig. 5E, the structure is then selectively etched using the mask pattern 50 as an etching mask to remove the unmasked sections of layer 48 and form the core region 52a of the optical waveguide structure 200. Additional regions 52b of the same material as that of core region 52a are also formed simultaneously. These other regions 52b can be core regions of other adjacent optical waveguide structures or other such regions.

[0060] In relation to Fig. 5F, then mask pattern 50 is removed. Regarding Fig. In 5G, a higher or upper cladding layer 53 can subsequently be formed over the upper and lateral surfaces of the core region 52a and over the bottom cladding surface 44. Like the bottom cladding surface 44, the higher cladding layer 53 can be made of an insulating material, such as silicon oxide, silicon nitride, or silicon oxynitride. Alternatively, the higher cladding layer 53 can be omitted. In this case, air serves as the higher cladding layer of the optical waveguide. The higher cladding layer serves the same purpose as the bottom cladding layer 44. In particular, the higher bottom cladding layer also serves to confine the light propagating in the core region 52a, since the refractive index of the higher cladding layer is lower than that of the core region 52a.

[0061] The integrated optical waveguide structure of the invention is optically coupled to other devices, such as external devices, by means of an optical coupler structure according to various exemplary embodiments of the invention described herein. Fig. Figure 6 is a schematic perspective view showing a vertical optical coupling to an integrated optical waveguide structure according to an exemplary embodiment of the invention.

[0062] In relation to Fig. 6. An optical waveguide structure 150 according to exemplary embodiments of the invention can be integrated on or in a semiconductor substrate 10, such as a silicon substrate, as described above in conjunction with various partial aspects of exemplary embodiments of the invention. In order to couple the optical waveguide 150 for transmitting and receiving optical energy to and from other external devices, ends of the optical waveguide 150 are connected to optical fibers which are Fig. Figure 6 shows a first input fiber 121 and a second output fiber 123, coupled together. According to exemplary embodiments of the invention, the ends of the optical waveguide 150 are tapered in the horizontal dimension, and not in the vertical dimension, to accommodate the larger dimensions of the fiber ends, as shown by 160 and 170. The tapered sections 160 and 170 are each connected to wider coupling end sections 190 and 180, on which optical coupling devices are formed.

[0063] According to exemplary embodiments of the invention, the following occurs in the vertical grid coupler (VGC) of Fig. Light emitted from the end of the input fiber 121 strikes a grating 153 formed in a region 152 at the wide coupling end section 190. The light is coupled through the grating 153 into the core of the optical fiber 150, causing it to propagate through the optical fiber 150. Similarly, light propagating towards the output end of the optical fiber 150 strikes a grating 155 formed in a region 154 at the wide coupling end section 180. The grating 155 couples the light out of the optical fiber 150 and into the end of the output fiber 123. The grating structure in the coupling device converts the direction of propagation of the light between the vertical and horizontal directions.

[0064] In vertical couplings according to exemplary embodiments of the invention, the optical waveguide ends are, as in Fig. Figure 6 shows the fiber ends tapering to a point only in the horizontal dimension and being relatively flat in the vertical dimension. Therefore, the fiber ends only need to couple vertically to the optical waveguide ends. This vertical coupling is particularly desirable for improved integration of the optical waveguide and optocoupler with other circuits formed on or in the substrate. This also leads to a reduction in device dimensions, manufacturing time, complexity, and cost. Testing and packaging costs are also reduced.

[0065] The following describes various optical coupling devices according to partial aspects of exemplary embodiments of the invention. The optical coupling devices of the invention are novel and non-obvious types of vertical grating couplers in which the grating is formed in the core region at a coupling region of the optical waveguide structure. Like the optical waveguide structures mentioned above, the optical waveguide structures of the invention are formed in a trench within a solid semiconductor substrate, such as a solid silicon substrate. The bottom layer of the coupler is formed in the bottom of the trench with a desired thickness, which is determined by the desired performance parameters of the device. The bottom layer can, for example, be formed from an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.The core layer is formed by amorphous silicon or polysilicon deposited on the bottom mantle layer. The amorphous silicon or polysilicon is crystallized to transform the core layer into a single-crystal silicon with defects. The single-crystal silicon with defects is selectively etched to define the size of the coupler's core region and to form the lattice within that region. According to exemplary embodiments, the coupler structure, like the optical waveguide structure described above, can be integrated into a single wafer or chip with other circuits, such as CMOS circuits or memory circuits, and is compatible with the requirements of silicon photonics.Consequently, electrical connections on a wafer or chip are replaced with optical connections, resulting in higher speed, reduced dimensions, lower power consumption, and higher capacity.

[0066] Fig. Figure 7 contains a schematic perspective view of an optocoupler structure or device 1100 to illustrate partial aspects of an exemplary embodiment of the invention. With regard to Fig. 7. The optocoupler device 1100 is formed in a solid semiconductor substrate 1120, such as a solid silicon substrate. A trench 1185 is formed in the substrate 1120. A bottom-cladding layer 1140, consisting of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, is formed in the trench 1140. A core region 1160 of the coupler 1100, which is also the core region of the connected optical waveguide structure 1170, is formed above the bottom-cladding layer 1140. In this optocoupler structure or device 1100, the core region 1160 is formed from a single-crystal silicon with defects. In an exemplary embodiment, the single-crystal silicon with defects can consist of crystallized amorphous silicon. A lattice 1175 is formed in the upper surface of the core area 1160.An upper or higher cladding layer 1180, which in an exemplary embodiment may consist of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, is formed over the coupler structure 1100. It should be noted that the higher cladding layer 1180 can be omitted, in which case air can serve as the upper cladding of the coupler 1100 and / or the optical waveguide 1170.

[0067] Fig. Figure 8 contains a schematic perspective view of an optocoupler structure or device 1200 to illustrate partial aspects of another exemplary embodiment of the invention. The optocoupler structure or device 1200 of Fig. 8 is essentially associated with the optocoupler structure or device 1100 of Fig. 7 similarly, except that the side walls of the trench 1285 and the bottom mantle layer 1240 are inclined instead of vertical. The inclined walls of the trench 1285 and the bottom mantle layer 1240 are used to simplify the fabrication of the device 1200, particularly when the trench 1285 is formed to a depth. The inclined trench walls reduce the complexity and cost of the trench forming process, especially when the trench is relatively deep. The coupler structure 1200 includes the core region 1160, which is also the core region of the connected optical waveguide 1170, and on which the grating 1175 is formed. The structure may also include the upper or top mantle layer 1180. It should be noted that the upper cladding layer 1180 can be omitted, in which case air can serve as the upper cladding of the coupler 1200 and / or the optical fiber 1170.

[0068] Fig. Figure 9 contains a schematic perspective view of an optocoupler structure or device 1300 to illustrate partial aspects of another exemplary embodiment of the invention. The optocoupler structure or device 1300 of Fig. 9 is connected to the optocoupler structure or device 1100 of Fig. 7 is substantially similar, except that the core region 1360, which consists of single-crystal silicon with defects, is formed from crystallized polysilicon instead of amorphous silicon. The core of the connected optical waveguide 1370 can also be formed from crystallized polysilicon instead of amorphous silicon. The structure 1300 comprises the bottom mantle layer 1140, which is formed in the trench 1185, which is formed in the massive silicon substrate 1120. Although not shown in the figures, the upper or higher mantle layer 1180 can be formed above the structure, or it can be omitted, so that air serves the purpose of the higher mantle layer 1180.

[0069] Fig. Figure 10 contains a schematic perspective view of an optocoupler structure or device 1600 to illustrate partial aspects of another exemplary embodiment of the invention. The optocoupler structure or device 1600 of Fig. 10 is connected to the optocoupler structure or device 1100 of Fig. Figure 7 is essentially similar, except that the trench 1685 is not completely filled with the material of the soil mantle layer 1640. That is, the upper surface of the soil mantle layer 1640 is below the upper surface of the substrate 1620. It follows that the core area 1660, which includes the grid 1675, and the optical waveguide 1670 are recessed relative to the substrate 1620. Although not shown in the figures, the upper or higher mantle layer 1180 may be formed above the structure, or it may be omitted, so that air serves the purpose of the higher mantle layer 1180.

[0070] In the optocoupler structure or device 1600 of Fig. 10. A residual substrate area ARE remains adjacent to trench 1685 because the upper surface of the soil mantle layer 1640 is lower than that of substrate 1620. The sidewall of area ARE is a distance from the sidewall of core area 1660 designated as ITV. Area ARE is formed from the same material as substrate 1920, which has a relatively high refractive index. Because core area 1660 is lower than that of substrate 1920, the distance ITV is selected to maintain the leakage loss in the ARE area of ​​the substrate at a desired level.

[0071] It should be noted that the height of the core area 1660 is determined by the thickness of the bottom mantle layer 1640 and the depth of the trench 1685. As a result of these two features, the core area 1660 can be completely recessed within the trench 1685, or a portion of the core area 1660 can protrude above the top of the trench 1685. One advantage of the recessed bottom mantle layer is a reduction in the cost and complexity of monolithically integrating the optical device of the invention with other circuits, such as CMOS transistors, that are fabricated together on the same substrate. In the case of a CMOS transistor, for example, the optical device of the invention can be buried in the trench below the top surface of the substrate to simplify integration, since the height of the transistor is relatively low compared to a conventional optical device.

[0072] Fig. Figure 11 contains a schematic perspective view of an optocoupler structure or device 1900 to illustrate partial aspects of another exemplary embodiment of the invention. The structure of the optocoupler structure or device 1900 of Fig. 11 is connected to the optocoupler structure or device 1600 of Fig. 10 essentially similar and can generally be compared to the structure of device 1600 from Fig. 10 be identical. The difference between these two devices lies primarily in the methods used to manufacture devices 1600 and 1900, as described below in conjunction with the Fig. 23A-23F and the Fig. 24A-24F is described.

[0073] Fig. Figure 12 contains a schematic perspective view of an optocoupler structure or device 11000 to illustrate partial aspects of another exemplary embodiment of the invention. The optocoupler structure or device 11000 of Fig. 12 is connected to the optocoupler structure or device 1100 of Fig. 7 is substantially similar, except that the core region 11060 of the coupler 11000 and the optical waveguide 11070 are formed from amorphous silicon or polysilicon instead of single-crystal silicon with defects. During fabrication, the layer is not crystallized after deposition of the core layer of amorphous silicon or polysilicon to form the single-crystal silicon core region with defects, as in the other exemplary embodiments. The structure 11000 comprises the bottom mantle layer 1140, which is formed in the trench 1185 formed in the solid silicon substrate 1120. Although not shown in the figures, the upper or higher mantle layer 1180 may be formed above the structure, or it may be omitted, so that air serves the purpose of the higher mantle layer 1180.

[0074] It should be noted that although the use of amorphous silicon or polysilicon for the core area is only in conjunction with Fig. As described in section 12, this applies to each of the exemplary embodiments described herein. That is to say, in each of the exemplary embodiments described, the core region can be made of amorphous silicon or polysilicon instead of single-crystal silicon with defects.

[0075] In some exemplary embodiments of the invention, a reflective element can be included below the optocoupler device and also below the integrated optical waveguide. The reflective element is provided to improve the optical efficiency, i.e., to reduce the optical loss of the coupler and, in some exemplary embodiments, of the optical waveguide. In exemplary embodiments of the invention, the reflective element is a distributed Bragg reflector (DBR) formed in the base-mantle layer. A DBR is a multilayered structure formed by alternating materials with different refractive indices.In the exemplary embodiment of the invention described here, the DBR structures are represented as having three layers, two of which are designated A and B and are separated by a third layer having a different refractive index than layers A and B. It should be understood that any number of layers can be used for the DBR, depending on the desired reflectivity of the DBR. The refractive indices of layers A and B are typically identical, but they can also differ depending on the desired property of the DBR.

[0076] In some exemplary embodiments, the DBR is formed on a section of the bottom mantle layer that insulates the DBR from the substrate. Another section of the bottom mantle is formed directly beneath the core layer on the DBR. This section of the bottom mantle layer performs the same function as the bottom mantle in some exemplary embodiments where the DBR is not formed. By adjusting its thickness, this layer is also used to cause the optical waves reflected by the DBR to constructively interfere with the optical waves coupled directly from the grating coupler.

[0077] The Fig. Figures 13-18 are schematic perspective views of the respective exemplary embodiments of the invention, which are similar to those of the Fig. 7-12 correspond, with the modification that these include a DBR. The DBR of each exemplary embodiment of the Fig. Figures 13-18 are shown including layers A and B, which may consist of a material with the same refractive index, and which are separated by a layer of a material having a different refractive index than those of layers A and B. It should be noted that the use of a three-layer DBR is for illustrative purposes only. As noted above, the DBR can have any number of layers, depending on the desired reflectivity of the DBR. It should also be noted that each of the Fig. Figures 13-18 are intended for illustration purposes and do not indicate that the DBR is not necessarily located solely beneath the coupler section of the device. It can also be positioned beneath the optical fiber to reduce optical losses. A description of features and elements identical to those described above is not repeated. It should also be noted that some of the exemplary embodiments in the Fig. Figures 13-17 show the higher shell layer 1180, and some show it without. This serves to illustrate that each of the exemplary embodiments described here can have the higher shell layer 1180, or the higher shell layer 1180 can be omitted. Where it is omitted, air can serve the purpose of the higher shell layer.

[0078] In relation to Fig. 13 The coupler structure or device 1100A comprises the DBR structure within the soil mantle layer 1140. An additional layer 1142 is formed above the DBR and the lower mantle layer 1140. The additional layer can be made of the same material as the lower mantle layer 1140.

[0079] In relation to Fig. 14, the coupler structure or device 1200A comprises the DBR structure within the bottom mantle layer 1240, which has inclined side walls.

[0080] In relation to Fig. 15, the coupler structure or device 1300A comprises the DBR structure within the bottom mantle layer 1140. An additional layer 1142 is formed above the DBR and the lower mantle layer 1140. The additional layer can be made of the same material as the lower mantle layer 1140.

[0081] In relation to Fig. 16, the coupler structure or device 1600A comprises the DBR structure within the soil mantle layer 1640.

[0082] In relation to Fig. 17, the coupler structure or device 1900A comprises the DBR structure within the soil mantle layer 1940.

[0083] In relation to Fig. 18, the coupler structure or device 11000A comprises the DBR structure within the soil mantle layer 1940.

[0084] Fig. Figure 19 is a schematic perspective view of another exemplary embodiment of the coupler structure or device 1800A according to the invention. With regard to Fig. 19 The coupler structure or device 1800A comprises the DBR structure below the bottom mantle layer 1140. The coupler 1800A is combined with the exemplary embodiments 1100A and 1300A, each described in the Fig. 13 and Fig. 15 are shown, essentially similar, with the exception that in the exemplary embodiment of Fig. 19 The spacing between the adjacent optical waveguides is chosen such that the remaining ARE section of the substrate, defined by the sidewalls 1885, is comparatively narrow. This is achieved by setting the distance between the adjacent optical waveguide structures to be greater than the width of the optical waveguide trench 1886. The DBR and the bottom mantle layer 1140 are formed within the trench 1886, and the core region 1160 is formed above the bottom mantle layer 1140. The sidewalls 1885 are spaced such that a narrow remaining ARE section and an increased ITV distance are created. This results in a reduced optical loss of the device due to its proximity to the substrate 1120.

[0085] The Fig. Figures 20A to 20F are schematic perspective views illustrating a method for manufacturing the coupler structure or device 1100, which is described in Fig. Figure 7 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 20A is a solid semiconductor substrate 1120, such as a solid silicon substrate. A trench 1185, having vertical sidewalls, is formed in the solid silicon substrate 1120 by selective etching. The depth of the trench 1185 is chosen based on the desired thickness of the bottom mantle layer formed in the trench, the thickness of which is determined based on the desired performance parameters of the coupler and the optical waveguide connected to the coupler.

[0086] In relation to Fig. In 20B, the soil mantle layer 1140 is formed in the trench 1185 such that its upper surface is level with or at the same height as the upper surface of the substrate 1120. The soil mantle surface 1140 can, for example, be formed by an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0087] In relation to Fig. At 20°C, a layer of amorphous silicon 1155 is formed on the bottom mantle layer 1140 and the upper surface of the substrate 1120. With respect to Fig. In step 20D, a layer of amorphous silicon 1155 is crystallized to transform the layer 1155 into a layer 1160 of impurity-containing single-crystal silicon, which is used for the core region of the coupler and the associated optical waveguide. The crystallization method used can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0088] In relation to Fig. In step 20E, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1160 and shaped into the desired pattern of the lattice 1175 to be formed on the core region of the coupler. The core region layer 1160 is etched using the patterned mask to form the lattice 1175 in the core region layer 1160.

[0089] In relation to Fig. In step 20F, the core region layer 1160 is selectively etched to produce the final core region 1160, which contains the coupler's grid 1175. At the same time, the core region for the connected optical waveguide 1170 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1140.

[0090] The Fig. Figures 21A to 21F are schematic perspective views illustrating a method for manufacturing the coupler structure or device 1200, which is described in Fig. Figure 8 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 21A is a solid semiconductor substrate 1120, such as a solid silicon substrate. A trench 1285, having inclined sidewalls, is formed in the solid silicon substrate 1120 by selective etching. The depth of the trench 1285 is selected based on the desired thickness of the bottom mantle layer formed in the trench, the thickness of which is determined based on the performance parameters of the coupler and the optical waveguide connected to the coupler.

[0091] In relation to Fig. In 21B, the soil mantle layer 1240 in the trench 1285 is formed such that its upper surface is level with or at the same height as the upper surface of the substrate 1120. The soil mantle surface 1240 can, for example, be made of an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0092] In relation to Fig. At 21C, a layer of amorphous silicon 1155 is formed on the bottom mantle layer 1240 and the upper surface of the substrate 1120. With respect to Fig. In step 21D, the layer of amorphous silicon 1155 is crystallized to transform the layer 1155 into a layer 1160 of impurity-containing single-crystal silicon, which is used for the core region of the coupler and the attached optical waveguide. The crystallization method used can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0093] In relation to Fig. In step 21E, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1160 and shaped into the desired pattern of the lattice 1175 to be formed on the core region of the coupler. The core region layer 1160 is etched using the patterned mask to form the lattice 1175 in the core region layer 1160.

[0094] In relation to Fig. In step 21F, the core region layer 1160 is selectively etched to produce the final core region 1160, which contains the coupler's grid 1175. At the same time, the core region for the connected optical waveguide 1170 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1240.

[0095] The Fig. Figures 22A to 22F are schematic perspective views illustrating a method for manufacturing the coupler structure or device 1300, which is described in Fig. Figure 9 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 22A is a solid semiconductor substrate 1120, such as a solid silicon substrate. A trench 1185, having vertical sidewalls, is formed in the solid silicon substrate 1120 by selective etching. The depth of the trench 1185 is chosen based on the desired thickness of the bottom mantle layer formed in the trench, the thickness of which is determined based on the desired performance parameters of the coupler and the optical waveguide connected to the coupler.

[0096] In relation to Fig. In 22B, the soil mantle layer 1140 is formed in the trench 1185 such that its upper surface is level with or at the same height as the upper surface of the substrate 1120. The soil mantle layer 1140 can be formed, for example, from an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0097] In relation to Fig. At 22C, a layer of polysilicon 1355 is formed on the soil mantle layer 1140 and the upper surface of the substrate 1120. With regard to Fig. In step 22D, the polysilicon 1355 layer is crystallized to transform the 1355 layer into a 1360 layer of single-crystal silicon with defects, which is used for the core region of the coupler and the attached optical waveguide. The crystallization method used can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0098] In relation to Fig. In step 22E, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1360 and shaped into the desired pattern of the lattice 1375 to be formed on the core region of the coupler. The core region layer 1360 is etched using the patterned mask to form the lattice 1375 in the core region layer 1360.

[0099] In relation to Fig. In step 22F, the core region layer 1360 is selectively etched to produce the final core region 1360, which contains the coupler's grid 1375. At the same time, the core region for the connected optical waveguide 1370 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1140.

[0100] The Fig. Figures 23A to 23F are schematic perspective views shown in the procedure for manufacturing the coupler structure or device 1600, which is described in Fig. Figure 10 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 23A is a solid semiconductor substrate 1620, such as a solid silicon substrate. A trench 1685, having vertical sidewalls, is formed in the solid silicon substrate 1620 by selective etching. The depth of the trench 1685 is selected based on the desired thickness of the bottom mantle layer and the desired height of the coupler and the attached optical waveguide relative to the upper surface of the substrate 1620.

[0101] In relation to Fig. 23B The soil mantle layer 1640 in trench 1685 is formed such that its upper surface is level with or at the same height as the upper surface of the substrate 1620. The soil mantle layer 1640 can be formed, for example, by an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. With reference to Fig. At 23C, the bottom-case layer 1640 is etched to a predetermined thickness within the trench 1685 such that the upper surface of the bottom-case layer 1640 is below the upper surface of the substrate 1620, so that the coupler structure and the connected optical fiber are recessed within the trench 1685. The thickness of the bottom-case layer 1640 is determined based on the desired performance parameters of the coupler and the optical fiber connected to the coupler. Subsequently, a layer of amorphous silicon 1655 is formed on the bottom-case layer 1640 within the trench 1685.

[0102] In relation to Fig. In 23D, the layer of amorphous silicon 1655 is crystallized to transform the layer 1655 into a single-crystal silicon layer 1660 containing defects, which is used for the core region of the coupler and the attached optical waveguide. The crystallization method can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0103] In relation to Fig. In step 23E, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1660 and shaped into the desired pattern of the lattice 1675 to be formed on the core region of the coupler. The core region layer 1660 is etched using the patterned mask to form the lattice 1675 in the core region layer 1660.

[0104] In relation to Fig. In step 23F, the core region layer 1660 is selectively etched to produce the final core region 1660, which contains the coupler's grid 1675. At the same time, the core region of the connected optical waveguide 1670 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1640.

[0105] The Fig. Figures 24A to 24F are schematic perspective views illustrating a method for manufacturing the coupler structure or device 1900, which is described in Fig. Figure 11 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 24A is a solid semiconductor substrate 1920, such as a solid silicon substrate. A trench 1985, having vertical sidewalls, is formed in the solid silicon substrate 1920 by selective etching. The depth of the trench 1985 is selected based on the desired thickness of the bottom mantle layer formed in the trench and the desired height of the coupler and the attached optical waveguide relative to the upper surface of the substrate 1920.

[0106] In relation to Fig. In 24B, the soil mantle layer 1940 is formed in the trench such that its upper surface is below the upper surface of the substrate 1620. The soil mantle layer 1640 can be formed, for example, from an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The soil mantle layer 1940 is formed within the trench 1985 with a predetermined thickness, such that the upper surface of the soil mantle layer 1940 is below the upper surface of the substrate 1920, so that the coupler structure and the connected optical fiber are recessed within the trench 1985. The thickness of the soil mantle layer 1940 is determined based on the desired performance parameters of the coupler and the optical fiber connected to the coupler.

[0107] In relation to Fig. 24C next forms a layer of amorphous silicon in 1955 on top of the soil mantle layer in 1940 in the trench in 1985. Regarding Fig. In step 24D, the layer of amorphous silicon 1955 is crystallized to transform it into a layer 1960 of single-crystal silicon with defects, which is used for the core region of the coupler and the attached optical waveguide. The crystallization method used can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0108] In relation to Fig. In step 24E, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1960 and shaped into the desired pattern of the lattice 1975 to be formed on the core region of the coupler. The core region layer 1960 is etched using the patterned mask to form the lattice 1975 in the core region layer 1960.

[0109] In relation to Fig. In step 24F, the core region layer 1960 is selectively etched to produce the final core region 1960, which contains the coupler's grid 1975. At the same time, the core region for the attached optical waveguide 1970 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1940.

[0110] It should be noted that the Fig. 23A to 24F a method for manufacturing the device 1600 of Fig. 10 describe, and the Fig. 24A to 24F a method for manufacturing the device 1900 of Fig. 11. Devices 1600 and 1900 can have essentially similar or identical structures. The differences between the two exemplary embodiments lie primarily in the manufacturing processes, as described in detail above.

[0111] The Fig. Figures 25A to 25F are schematic perspective views illustrating a method for manufacturing the coupler structure or device 1100, which is described in Fig. Figure 12 illustrates aspects of an exemplary embodiment of the invention. With regard to Fig. 25A, a solid semiconductor substrate 1120, such as a solid silicon substrate, is provided. A trench 1185, having vertical sidewalls, is formed in the solid silicon substrate by selective etching. The depth of the trench 1185 is selected based on the desired thickness of the bottom mantle layer formed in the trench, the thickness of which is determined based on the desired performance parameters of the coupler and the optical waveguide connected to the coupler.

[0112] In relation to Fig. 25B, the soil mantle layer 1140 is formed in the trench 1185 such that its upper surface is level with or at the same height as the upper surface of the substrate 1120. The soil mantle layer 1140 can be formed, for example, from an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0113] In relation to Fig. At 25°C, a layer of amorphous silicon or polysilicon 1160 is formed on the bottom mantle layer 1140 and the upper surface of the substrate 1120. With respect to Fig. In step 25D, a mask consisting of a photoresistant and / or hard mask material is formed on layer 1160 and shaped into the desired pattern of the grating 1175 to be formed on the core region of the coupler. The core region layer 1160 is etched using the patterned mask to form the grating 1175 in the core region layer 1160.

[0114] In relation to Fig. In step 25E, the core region layer 1160 is selectively etched to produce the final core region 1160, which contains the coupler's grid 1175. At the same time, the core region for the connected optical waveguide 1170 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1140.

[0115] As described above, the optocoupler structure and device of the invention can include a reflective element, such as a distributed Bragg reflector (DBR), to improve optical coupling and transmission efficiency and to reduce optical loss. According to the invention, the DBR can be formed within or beneath the coupler and / or the optical waveguide. As further described above, a DBR is a multilayer structure formed from alternating materials with different refractive indices. In the exemplary embodiment of the invention described herein, the DBR structures are made with three layers, two of which are designated A and B and separated by a third layer having a different refractive index than layers A and B. It is understood that each proportion of layers can be used for the DBR, depending on the desired reflectivity.The refractive indices of layers A and B are typically identical, but they can also be different depending on the desired performance characteristics of the DBR.

[0116] In some exemplary embodiments, the DBR is formed on a section of the bottom mantle surface that insulates the DBR from the substrate. Another section of the bottom mantle layer, immediately below the core layer, is formed on the DBR. By adjusting its thickness, this layer is also used to constructively interfere with the optical waves reflected by the DBR and the optical waves coupled directly from the grating coupler.

[0117] The Fig. Figures 26A to 26I contain schematic perspective views illustrating a method for manufacturing the coupler structure or device 1100A, which is described in the Fig. Figure 13 illustrates an exemplary embodiment of the invention. With regard to Fig. 26A is a solid semiconductor substrate 1120, such as a solid silicon substrate. A trench 1185, having vertical sidewalls, is formed in the solid silicon substrate 1120 by selective etching. The depth of the trench 1185 is selected based on the desired thickness of the bottom mantle layer formed in the trench, the thickness of which is determined based on the desired performance parameters of the coupler and the optical waveguide connected to the coupler.

[0118] In relation to Fig. In trench 1185, section 26B, a layer 1141, which may be of the same material as the soil mantle layer, is formed. The DBR structure, which comprises the three-layer structure of layers A and B, separated by a layer having a different refractive index than layers A and B, is formed on top of layer 1141. Regarding Fig. At 26°C, the soil mantle layer 1140 in the trench 1185 above the DBR is formed such that its upper surface is level with or at the same height as the upper surface of the substrate 1120. The soil mantle surface 1140 can be formed, for example, from an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. With regard to Fig. 26D, the bottom mantle layer 1140, a layer 1141 and side wall sections of the DBR are etched to a predetermined thickness based on a desired structure and performance characteristics of the device. Regarding Fig. 26E an additional mantle layer 1142 is formed above the soil mantle layer 1140, layer 1141 and the DBR to fill the trench, so that the upper surface of the additional mantle layer 1142 is level with or at the same height as the upper surface of the substrate.

[0119] In relation to Fig. 26F, a layer of amorphous silicon 1155 is formed over the structure. Regarding Fig. In step 26G, the layer of amorphous silicon 1155 is crystallized to transform the layer 1155 into a layer 1160 of impurity-containing single-crystal silicon, which is used for the core of the coupler and the attached optical waveguide. The crystallization method used can be laser-assisted epitaxial growth (LEG), solid-phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid-phase crystallization (SPC).

[0120] In relation to Fig. In step 26H, a mask consisting of a photoresistant and / or hard mask material is formed on the crystallized silicon layer 1160 and shaped into the desired pattern of the lattice 1175 to be formed on the core region of the coupler. The core region layer 1160 is etched using the patterned mask to form the lattice 1175 in the core region layer 1160.

[0121] In relation to Fig. In step 26I, the core region layer 1160 is selectively etched to produce the final core region 1160, which contains the coupler's grid 1175. At the same time, the core region for the connected optical waveguide 1170 can be formed. The optional higher cladding layer 1180 can then be formed over the structure. The higher cladding layer 1180 can be made of the same material as the bottom cladding layer 1140.

[0122] The Fig. Figures 27A to 27G contain schematic perspective views illustrating a method for manufacturing the coupler structure or device 1200A, which is described in Fig. Figure 14 illustrates an exemplary embodiment of the invention. The methods of the Fig. 27A to 27G are analogous to the procedures described above in conjunction with the Fig. 26A to 26I are shown and described, and the procedures described above in conjunction with the Fig. Sections 21A to 21F are shown and described. For the expert, this is described in the Fig. Methods for production from the described in sections 27A to 27G Fig. 21A to 21F and 26A to 26I and the detailed descriptions contained therein are understandable. Accordingly, a detailed description of the procedure described in the Fig. The figures shown are 27A to 27G and are not repeated.

[0123] The Fig. Figures 28A to 28I contain schematic perspective views illustrating a method for manufacturing the coupler structure or device 1300A, which is described in Fig. Figure 15 represents an exemplary embodiment of the invention. The steps required to manufacture the exemplary embodiment of Fig. 15 are used and in the Fig. The items shown in sections 28A to 28I are the same as those described above and in connection with the Fig. 26A to 26I, with the exception of the Fig. 28F and Fig. 28G, are shown. As in Fig. 28F shows a layer 1355 made of polysilicon instead of a layer 1155 made of amorphous silicon, which is shown in Fig. 26C is shown, trained. As in Fig. As shown in Figure 28G, layer 1355 is crystallized to form layer 1360 from a single-crystal silicon containing defects. Since the remaining steps, with the exception mentioned above, are the same as those described above in conjunction with the Fig. Sections 2A to 26I describe the remaining steps in the procedures for manufacturing the exemplary embodiments of Fig. 15 not repeated.

[0124] The Fig. Figures 29A to 29H contain schematic perspective views illustrating a method for manufacturing the coupler structure or device 1600A, which is described in Fig. Figure 16 illustrates an exemplary embodiment of the invention. The process steps of Fig. 29A to 29H are analogous to the procedure steps described above in conjunction with the Fig. 26A to 26I are shown and described, and the process steps associated with them. Fig. Figures 23A to 23F are illustrated and described. For a person skilled in the art, the manufacturing process shown in the figures is clear. Fig. 29A to 29H are shown, from the Fig. 23A to 23F and 26A to 26I and the detailed description contained therein are understandable. Accordingly, a detailed description of the [missing information] is provided. Fig. The procedure described in sections 29A to 29H was not repeated.

[0125] The Fig. Figures 30A to 30H contain schematic perspective views illustrating a method for manufacturing the coupler structure or device 1900A, which is described in Fig. Figure 17 illustrates an exemplary embodiment of the invention. The process steps of Fig. 30A to 30H are analogous to the process steps described above in conjunction with the Fig. 26A to 26I are shown and described, and the process steps shown above in conjunction with the Fig. 24A to 24F are shown and described. For a person skilled in the art, the manufacturing process described in the Fig. 30A to 30H is shown, from the Fig. 24A to 24F and 26A to 26I and the detailed description contained therein are understandable. Accordingly, a detailed description of the [missing information] is provided. Fig. The procedure shown in sections 30A to 30H was not repeated.

[0126] It should be noted that the exemplary embodiment of the coupler structure or device 1100A, which is described in Fig. 18 is manufactured in the same way as the exemplary embodiment shown in the Fig. 30A to 30H is shown, except that in exemplary embodiment 1100A the core layer 1160 is an amorphous silicon or polysilicon, and the layer 1160 is not crystallized after it has formed.

[0127] The vertical grid couplers (VGC) devices of exemplary embodiments of the invention described herein show variations in optical coupling efficiency with a thickness of the bottom mantle layer. Fig. Figure 31 contains a graph of the optical coupling efficiency as a function of the thickness of the bottom mantle layer, which is applicable to the exemplary embodiments of the invention described herein. The graph of Fig. For example, a wavelength of 1.58 µm, a grating spacing of 630 nm, and a grating etching depth of 70 nm were assumed. The results, represented by the graph of Fig. The 31 figures shown vary with deviations in these parameters.

[0128] The optical waveguides and couplers of the invention are applicable to many circuits, modules, and systems that utilize optical communication and the transmission of optical signals. For example, the devices and methods of the invention are applicable to interconnection systems and devices used in storage systems. That is, the optical devices and methods of the invention can be used to establish optical communication between a central processing unit (CPU) and one or more storage modules, between a plurality of storage modules, between a plurality of storage devices on one or more storage modules, and / or between a plurality of circuits configured on a single storage device.

[0129] Fig. Figure 32 contains a schematic block diagram of a processing system 2000 to which the optical waveguide and optocoupler devices and method according to an exemplary embodiment of the invention can be applied. With regard to Fig. 32, System 2000 comprises a CPU 2002, which communicates with at least one memory module 2008 via an intermediate connection system 2013. The memory module 2008 can be, for example, a dual inline memory module (DIMM). The DIMM 2008 can, in particular, be, for example, a DRAM DIMM 2008. The DIMM 2008 comprises a plurality of individual memory circuits 2020, e.g., DRAM memory circuits, which are mounted on it.

[0130] In this exemplary embodiment, the CPU 2002 and the DIMM 2008 generate and process electrical signals. The interconnection system 2013 comprises optical communication channels 2012, which carry optical signals between the CPU 2002 and the DIMM 2008 and which can be, for example, optical fibers. Since the CPU 2002 and the DIMM 2008 use electrical signals, an electrical-to-optical conversion is required to convert the electrical signals from the CPU 2002 and the DIMM 2008 into optical signals for transmission via the optical communication channels 2012. Likewise, an optical-to-electrical conversion is required to convert the optical signals on the optical communication channels 2012 into electrical signals for processing by the CPU 2002 and the DIMM 2008.For this purpose, the 2013 intermediate interconnect system also includes 2004 and 2006 optical / electrical (O / E) converter units on opposite sides of the 2012 optical communication channels. The 2002 CPU transmits electrical signals to and from the 2004 O / E converter unit via an 2010 electrical bus, and the 2008 DIMM transmits electrical signals to and from the 2006 O / E converter unit via an 2014 electrical bus.

[0131] In this exemplary embodiment, the O / E converter units 2004 and 2006 comprise the optical communication devices of the invention, which are described in the Fig. 32 are collectively referred to as 2016 and 2018. That is, the optical circuits 2016 and 2018 comprise one or more optocoupler devices of the invention described herein, which send and receive optical signals to and from the optical communication channels 2012, such as optical fibers. The optical circuits 2016 and 2018 also comprise one or more optical waveguide devices of the invention described herein. The optocouplers in the O / E converter units 2004 and 2006 couple the optical signals to and from one or more optical waveguide devices of the invention onto the optical communication channels 2012.The optocouplers and optical waveguides of the invention can be integrated into one or more integrated semiconductor circuits formed on one or more solid semiconductor substrates as described in detail above, together with other circuits used to implement the O / E conversion process of the O / E converter units 2004 and 2006.

[0132] Fig. Figure 33 contains a schematic block diagram of a processing system 2050 to which the optical waveguides and optocoupler devices and methods according to another exemplary embodiment of the invention can be applied. With regard to Fig.The system 2050 comprises a CPU 2052, which communicates with at least one memory module 2058 via an intermediate connection system 2063. The memory module 2058 can, for example, be a dual inline memory module (DIMM). In particular, the DIMM 2058 can, for example, be a DRAM DIMM 2058. The DIMM 2058 comprises a plurality of individual memory circuits 2070, for example, DRAM memory circuits, which are mounted on it.

[0133] In this exemplary embodiment, the CPU 2052 and the DIMM 2058 generate and process both electrical and optical signals. In contrast to the exemplary embodiment of Fig. 32 The O / E conversion process in the exemplary embodiment of Fig. 33 can be executed on the CPU 2052 and / or on the DIMM 2058. Accordingly, the CPU 2052 can include an O / E converter unit 2076, and the DIMM 2058 can include an O / E converter unit 2082. The electrical circuitry in the CPU 2052, commonly referred to as 2078, communicates electrical signals to and from the O / E converter unit 2076 via an electrical bus 2080. The electrical circuitry in the DIMM 2058, which includes the majority of the memory circuitry 2070, communicates electrical signals to and from the O / E converter unit 2082 via an electrical bus 2084.

[0134] The intermediate connection system 2063 comprises optical communication channels 2062, which carry optical signals between the CPU 2052 and the DIMM 2058, and which can be, for example, optical fibers. The CPU 2052 includes an optical port 2072, through which optical signals are transmitted to and from the optical channels 2062 to and from the O / E converter unit 2076. The DIMM 2058 includes an optical port 2074, through which optical signals are transmitted to and from the optical communication channels 2062 to and from the O / E converter unit 2082.

[0135] In this exemplary embodiment, the O / E converter units 2076 and 2082 comprise the optical communication devices of the invention, which are in Fig. 33 are collectively referred to as 2077 and 2083, respectively. That is, the optical circuits 2077 and 2083 comprise one or more optocoupler devices of the invention described herein, which send and receive optical signals to and from the optical communication channels 2062, which are, for example, optical fibers. The optical circuits 2077 and 2083 also comprise one or more optical waveguide devices of the invention described herein. The optocouplers in the O / E converter unit 2076 and 2082 couple the optical signals to and from one or more optical waveguide devices of the invention onto the optical communication channels 2062.The optocouplers and optical waveguides of the invention can be integrated in one or more integrated semiconductor circuits which, together with other circuits used to implement the O / E conversion process of the O / E converter units 2076 and 2082, are formed on one or more solid semiconductor substrates as described in detail above.

[0136] Fig. Figure 34 contains a schematic block diagram of a processing system 2100 to which the optical waveguide and the optocoupler devices and methods according to another exemplary embodiment of the invention can be applied. With regard to Fig. The system 2100 comprises a CPU 2102, which communicates with at least one memory module 2108 via an intermediate connection system 2113. The memory module 2108 can, for example, be a dual inline memory module (DIMM). In particular, the DIMM 2108 can, for example, be a DRAM DIMM 2108. The DIMM 2108 comprises a plurality of individual memory circuits 2120, for example, DRAM memory circuits, which are mounted on it.

[0137] In this exemplary embodiment, the CPU 2102 and the DIMM 2108 generate and process both electrical and optical signals. In contrast to the exemplary embodiment of Fig. 32 can be used in the exemplary embodiment of Fig. 34 The O / E conversion process is performed on the CPU 2102 and / or on the DIMM 2108, in particular on each DIMM memory circuit 2120. Accordingly, the CPU 2102 can include an O / E converter unit 2126, and each of the memory circuits 2120 can include an O / E converter unit 2121. The electrical circuit arrangement in the CPU 2102, generally referred to as 2128, communicates electrical signals to and from the O / E converter unit 2126 via an electrical bus 2130. The electrical circuit arrangement in each of the memory circuits 2120, generally referred to as 2127, communicates electrical signals to and from the respective O / E converter unit 2121 via an electrical bus 2125.

[0138] The intermediate connection system 2113 comprises optical communication channels 2112, which carry optical signals between the CPU 2102 and the DIMM 2108 and which can, for example, be optical fibers. The CPU 2102 includes an optical port 2122 through which optical signals are transmitted to and from the optical communication channels 2112 to and from the O / E converter unit 2126. The DIMM 2108 includes an optical port 2124 through which optical signals are transmitted to and from the optical communication channels 2112 to and from the O / E converter units 2121 via an optical bus 2134. The optical bus 2134 can, for example, comprise optical fibers and / or optical waveguides and optocouplers formed on or in the substrate of the DIMM 2108.

[0139] In this exemplary embodiment, the O / E converter units 2126 and 2121 comprise the optical communication devices of the invention, which are located in Fig. 34 are collectively referred to as 2116 and 2123, respectively. That is, the optical circuits 2116 and 2123 comprise one or more optical optocoupler devices of the invention described herein, which send and receive optical signals to and from the optical communication channels 2112, which are, for example, optical fibers. The optical circuits 2116 and 2123 also comprise one or more optical waveguide devices of the invention described herein. The optocouplers in the O / E converter units 2116 and 2123 couple the optical signals to and from one or more optical waveguide devices of the invention onto the optical communication channels 2112.The optocouplers and optical waveguides of the invention can be integrated into one or more integrated semiconductor circuits, which, together with other circuits used to implement the O / E conversion process of the O / E converter units 2126 and 2121, are formed on one or more solid semiconductor substrates, as described in detail above. In particular, the optocouplers and optical waveguides of the invention can be integrated on the same chip or raw chip as the individual memory circuits 2120, such as DRAM memory circuits.

[0140] Fig. Figure 35 is a schematic functional diagram of a memory circuit 5010, for example a DRAM memory circuit, which includes an optocoupler and an optical fiber device of the invention, which are integrated on the same chip or raw chip as the chip or raw chip on which the memory circuit is formed. The memory circuit 5010 comprises the electrical circuit arrangement 5012 of the DRAM memory, which includes a memory cell matrix 5026 and peripheral and other associated electrical circuit arrangements 5028. All electrical circuit arrangements on the device 5010 are connected to, and communicate with, one or more electrical buses via electrical contact surfaces 5024. The one or more electrical buses on the device are arranged in Fig. 35 generally designated as electric bus 5014.

[0141] Optical signals, including input data signals (DQ In), address and control signals (Addr / Ctrl), a clock signal (CLK), and a light source, are coupled to the device 5010, for example by optical fibers, by optical coupling devices 5020 according to one or more exemplary embodiments of the invention. Optical signals from the optocouplers 5020 are coupled to optical waveguides 5018 according to one or more exemplary embodiments of the invention. The optical waveguides 5018 transmit the optical signals through the device via an optical bus.

[0142] Optical signals input to the device are coupled via optical fibers 5018 to photodetectors 5016, which demodulate the optical signals and convert them into electrical signals. The demodulated and converted electrical signals are input to CMOS driver circuits 5022, which drive the electrical signals on the electrical bus 5014.

[0143] Optical signals transmitted by the device 5010, for example, output data signals (DQ Out), are generated from a continuous, unmodulated optical signal coupled from the light source to the device 501. Electrical signals from various electrical components of the device 5010 are used to modulate the continuous optical signal in the optical modulators 5030. The electrical signals are routed from the electrical bus 5014 to the modulators 5030, which use the electrical signals to create modulated optical signals. These signals are transmitted along the optical waveguides 5018 and coupled to form optical fibers by the coupling devices 5020.

[0144] Fig. Figure 36 is a schematic perspective view of a section of a computation or processing system 3000 to which the optical waveguides or optocouplers can be applied according to an exemplary embodiment of the invention. With regard to Fig. The system 3000 comprises a basic or main circuit board (PCB) 3002, which may be an optical PCB. A CPU 3004 is mounted on the PCB 3002 and coupled to an O / E converter unit 3006, which is also mounted on the PCB 3002. The O / E converter unit 3006 is coupled to an optical interconnect system 3008, which may include one or more optical waveguides formed on or in the PCB 3002. The optical interconnect system 3008 is connected by an optical socket or connector 3014 to a DIMM 3010, for example, a DRAM DIMM. The DIMM 3010 comprises several circuits 3016, such as DRAM memory circuits, mounted on a DIMM PCB 3012, which may be an optical PCB. A light source 3014, such as a laser diode, provides light for the system 3000.

[0145] Each storage circuit 3016 comprises an optical signal input / output (I / O) interface (I / F) unit, which provides I / O conversion for each circuit as described above. Each I / O / F also provides the necessary optical devices, such as optical waveguides and couplers according to the invention, to enable transmission of the optical signals through the device.

[0146] Source 3014 provides a supply of preferably collimated light to the I / O converter circuit arrangements in the storage device 3016, which modulate the source light in accordance with data signals transmitted to the CPU 3004. The modulated optical data signals are transmitted to the CPU 3004 along the optical waveguides of the optical interconnection system 3008 and coupled to the CPU 3004 via the O / E converter unit 3006. Source 3014 also provides light to the I / O converter unit 3006, enabling data signals to be transmitted from the CPU 3004 to the DIMM 3010 via the optical interconnection system 3008.

[0147] Fig. Figure 37 contains a schematic cross-sectional view of a section of a computation or processing system 3500 to which the optical waveguides and optocouplers can be applied according to an exemplary embodiment of the invention. With regard to Fig. 37 The system 3500 comprises a DIMM 3010 mounted on and coupled to a base or main PCB 3002. A retaining element 3056, which may be part of a socket 3014, includes a guide pin 3054 held in a guide hole of the main PCB 3002. The DIMM 3010 comprises a circuit device 3016, such as a DRAM memory device, mounted on the optical DIMM PCB 3012. The circuit device 3016 may be the device according to the invention in which the optical waveguide and / or optocoupler of the invention are integrated with other circuit arrangements, such as DRAM memory circuits, on a single chip or raw chip.

[0148] The device 3016 comprises a circuit chip or raw chip 3040, such as a DRAM chip or raw chip, which includes an optical I / O area 3042 integrated into the chip or raw chip 3040 according to silicon photonics. The I / O area 3042 can comprise one or more optical waveguides and / or coupling structures according to the invention. Optical signals are coupled to the chip 3040 via the I / O area 3042. The I / O area 3042 is arranged above a transparent window area 3044, which provides passage for optical signals to and from the I / O area 3042. Light also passes through an adhesive 3037 with a matching index that minimizes reflection of the light passing to and from the I / O area 3042, while providing a fixing for the device 3016 on the top of the optical PCB 3012.

[0149] Optical signals to and from the I / O area 3042 of the device travel through an optical fiber 3032 formed in the PCB 3012. The optical fiber 3032 can have a 90° bend below the device 3016 and can have a 45° reflector for deflecting the optical signals between the I / O area 3042 and the optical fiber 3032.

[0150] The DIMM 3010 is coupled to the main PCB 3002 via a microsphere lens matrix 3050, which guides optical signals between the optical waveguide 3032, formed in the optical PCB 3012 of the DIMM 3010, and another optical waveguide 3008, formed in the main PCB 3002. A partially reflective element 3052 directs the optical signals between the optical waveguide 3008 and the optical waveguide 3032.

[0151] The device 3016 can also be electrically and mechanically coupled to the PCB 3012 via solder balls 3036 and metal conductors 3062. The device is encased in a cast polymer material 3034.

[0152] The optical device of the invention described herein is applicable to all types of optical communication and interconnection devices and systems. Although line-type optical waveguide structures have been described for the purpose of illustrating the invention, the invention is equally applicable to other types and structures. Fig. Figures 38A to 38C are schematic perspective views of optical interconnects, for example optical waveguide structures, to which the invention is applicable. Fig. 38A represents a planar-type optical waveguide structure 3702; Fig. 38B represents a line-type optical waveguide structure 3704; and Fig. 38C represents an optical distribution structure 3706. All structures include a core region (designated WG) through which optical signals propagate, and a cladding region which has a lower refractive index than the core region to confine the optical signals within the core region.

[0153] Fig. Figure 39 is a schematic cross-sectional view of a device 1201 in a housing, which includes the optical device according to an exemplary embodiment of the invention. The packaged device 1201 comprises a printed circuit board 1204 on which an integrated circuit chip or device 1202 according to an exemplary embodiment of the invention is mounted. The integrated circuit device 1202 can comprise one or more optical waveguides and / or optocoupler devices of the invention, which are integrated with other electrical integrated circuits, such as silicon photonic circuits, on the circuit matrix. The printed circuit board 1204 is mounted within an integrated circuit housing 1208.

[0154] Optical signals to and from the integrated circuit device 1202 are coupled to the device 1202 via one or more optical fibers 1206. The ends of the fibers 1206 are coupled to the device 1202 via optical coupling devices according to the exemplary embodiments of the invention described herein. A frame 1205 and 1203 within the capsule holds the fibers 1206 in a fixed position and at a suitable angle with respect to the integrated device 1202.

[0155] The present invention is applicable to any type of processing system, display system, communication system or other such system in which signals are transmitted optically. Fig. Figure 40 is a schematic block diagram of a general processing, communication, or display system 4000 to which the invention is applicable. With regard to Fig.The system 4000 comprises a processor 4010, which communicates optically with other components of the system 4000 via an optical bus 4012. The processor 4010 can include an O / E converter circuit arrangement comprising one or more optical waveguides and coupler devices according to the invention. One or more semiconductor storage devices 4002 are also optically coupled to an optical bus 4012. The storage device can include an O / E converter circuit arrangement comprising one or more optical waveguides and coupler devices according to the invention. A power supply 4006 can also be coupled to the system bus 4012. A user interface 4008 provides an input / output to / from a user.

[0156] The present invention has been described herein for the fabrication of optical devices on or in a solid semiconductor substrate, in particular a solid silicon substrate. The present invention is not limited to the fabrication of optical devices in solid silicon. Other materials may be used. For example, other semiconductor materials, such as germanium, may be used for the substrate of the integrated optical device of the invention.

[0157] While the present invention has been shown and described in particular with reference to the exemplary embodiments thereof, it is clear to the person skilled in the art that various changes in form and details can be made in it without deviating from the core or scope of the present invention as defined by the following claims.

Claims

[1] Optical device with: a semiconductor substrate (1120; 1620; 1920) that contains solid single-crystal silicon; a trench (1185; 1285; 1685; 1886; 1985) arranged in the semiconductor substrate (1120; 1620; 1920) comprising sidewalls which are either substantially perpendicular to a surface of the semiconductor substrate (1120; 1620; 1920) or inclined obliquely outwards, such that the trench width at the surface is greater than at a bottom of the trench (1285); a first cladding layer (1140; 1240; 1640; 1940) which is arranged in the trench (1185; 1285; 1685; 1886; 1985) and which has an upper surface which is substantially coplanar with, below, or above the surface of the semiconductor substrate (1120; 1620; 1920); at least one core region (1160; 1360; 1660; 1960) comprising single-crystal silicon and arranged above the first cladding layer (1140; 1240; 1640; 1940) such that it provides at least one optical waveguide (1170; 1370; 1670; 1970) coupled to at least one grating (1175; 1375; 1675; 1975) having an upper surface that is substantially coplanar with an upper surface of the optical waveguide (1170; 1370; 1670; 1970); a distributed Bragg reflector (DBR) arranged within the first cladding layer (1140; 1240; 1640; 1940) comprising at least a first and a second material layer (A, B), each of which is in contact with a third material layer having a refractive index different from that of the first and second material layers (A, B); wherein at least the first and second material layers (A, B) each have three distinct sections arranged such that the first section is substantially parallel to the bottom of the trench (1185; 1285; 1685; 1886; 1985), the second section is substantially parallel to a first side wall of the trench (1185; 1285; 1685; 1886; 1985), and the third section is substantially parallel to a second side wall of the trench (1185; 1285; 1685; 1886; 1985). [2] Optical device according to claim 1, wherein a first side wall of the core area (1160; 1360; 1660; 1960) is a distance d1 away from the first side wall of the trench (1185; 1285; 1685; 1886; 1985) and a second side wall of the core area (1160; 1360; 1660; 1960) is a distance d2 away from the second side wall of the trench (1185; 1285; 1685; 1886; 1985). [3] Optical device according to claim 2, wherein the distances d1 and d2 are greater than about 0.27 µm, and a leakage loss in the optical waveguide (1170; 1370; 1670; 1970) is less than 1 dB / mm. [4] Optical device according to claim 2, wherein an upper surface of the first cladding layer (1140; 1640; 1940) is lower than an upper surface of the semiconductor substrate (1120; 1620; 1920), and the distances d1 and d2 are greater than about 0.35 µm, and a leakage loss in the optical waveguide (1170; 1370; 1670; 1970) is less than 1 dB / mm. [5] Optical device according to claim 1, further comprising a second cladding layer (1180) arranged such that at least a section is covered by an upper surface and side walls of the core area (1160; 1360). [6] Optical device according to claim 1, wherein the distributed Bragg reflector is formed under the at least one optical waveguide (1170; 1370; 1670; 1970) and the at least one grating (1175; 1375; 1675; 1975). [7] Method for manufacturing an optical device comprising the steps: Providing a semiconductor substrate (1120; 1620; 1920) that contains solid single-crystal silicon; Forming a trench (1185; 1285; 1685; 1886; 1985) in the semiconductor substrate (1120; 1620; 1920) such that side walls of the trench (1185; 1285; 1685; 1886; 1985) are either substantially perpendicular to a surface of the semiconductor substrate (1120; 1620; 1920) or are inclined obliquely outwards, so that the trench width at the surface is greater than at a bottom of the trench (1285); Forming a first cladding layer (1140; 1240; 1640; 1940) substantially within the trench (1185; 1285; 1685; 1886; 1985), such that the first cladding layer has an upper surface that is substantially coplanar with, below, or above the surface of the semiconductor substrate (1120; 1620; 1920); Forming a core region (1160; 1360; 1660; 1960) comprising single-crystal silicon on the first cladding layer (1140; 1240; 1640; 1940) such that it provides at least one optical waveguide (1170; 1370; 1670; 1970) coupled to at least one lattice (1175; 1375; 1675; 1975) having an upper surface that is substantially coplanar with an upper surface of the optical waveguide (1170; 1370; 1670; 1970); Forming a distributed Bragg reflector (DBR) within the first mantle layer (1140; 1240; 1640; 1940), comprising at least a first and a second material layer (A, B), each of which is in contact with a third material layer having a refractive index different from that of the first and second material layers (A, B), and wherein the at least first and second material layers (A, B) each have three distinct sections arranged such that the first section is substantially parallel to the bottom of the trench (1185; 1285; 1685; 1886; 1985), the second section is substantially parallel to a first side wall of the trench (1185; 1285; 1685; 1886; 1985), and the third section is substantially parallel to a second side wall of the trench. (1185; 1285; 1685; 1886; 1985) is. [8] Method according to claim 7, wherein: the first cladding layer (1140; 1240; 1640; 1940) made of a dielectric material with the general formula Si Z N Y O Z is formed. [9] Method according to claim 7, further comprising forming a second sheath layer (1180) which covers at least a section of an upper surface and a lateral surface of the core region (1160; 1360).

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