Semiconductor chip and process for manufacturing a semiconductor chip

Abstract

semiconductor chip (10) comprising - a semiconductor layer sequence (20) - a structured substrate (30) which is in contact with the semiconductor layer sequence (20) at a surface (31) and has a structure of depressions (32) on the surface (31) which have the shape of a truncated hyperboloid and are each bounded on the underside by a smooth end region (34), wherein the end regions (34) are arranged laterally spaced apart from each other.

Description

[0001] A semiconductor chip is described, preferably an optoelectronic chip, and more preferably a radiation-emitting semiconductor chip. A method for manufacturing such a semiconductor chip is also described.

[0002] Document US 2013 / 0 092 950 A1 describes a semiconductor growth substrate.

[0003] Document US 2007 / 0 206 130 A1 describes a light-emitting arrangement.

[0004] Publication US 2013 / 0 320 353 A1 describes a method for producing a crystalline film on a substrate.

[0005] For a radiation-emitting semiconductor chip, the radiative power is a key parameter. This is influenced by both the internal quantum efficiency, which is determined, among other things, by the crystal quality of the semiconductor chip, and the radiative efficiency. For example, in a radiation-emitting semiconductor chip consisting of a planar sapphire substrate and a sequence of nitride semiconductor layers arranged on it, radiation losses occur at the interface between the nitride semiconductor layers and the sapphire substrate due to total internal reflection, leading to a reduction in the radiative efficiency. To reduce such radiation losses, the sapphire substrate can be structured.However, this in turn can impair the internal quantum yield, since, for example, when growing on a structured semiconductor substrate compared to a smooth semiconductor substrate, the limited choice of growth parameters for optimal deposition can increase the dislocation density and thus degrade the crystal quality.

[0006] One problem to be solved in this case is to specify a semiconductor chip with improved crystal quality or radiation output. This problem is solved by a semiconductor chip according to the independent claim. Another problem to be solved is to specify a method for manufacturing a semiconductor chip with improved crystal quality or radiation output. This problem is solved by a method according to the independent method claim.

[0007] Advantageous embodiments and further developments of the semiconductor chip and the method for manufacturing a semiconductor chip are specified in the dependent claims and are further shown in the following description and drawings.

[0008] The semiconductor chip comprises a sequence of semiconductor layers and a structured substrate. Preferably, the substrate contains or consists of a semiconductor material. Furthermore, the semiconductor chip is preferably an optoelectronic, and more preferably a radiation-emitting, semiconductor chip. The structured substrate is in contact with the sequence of semiconductor layers at a surface, wherein the surface has a structure of depressions, each bounded on the underside by a smooth end region, or a structure of protrusions, each bounded on the upper side by a smooth end region. In other words, the depressions represent concave regions in the substrate, the lowest point of which is formed by a smooth end region. Furthermore, the protrusions represent convex regions in the substrate, the highest point of which is formed by a smooth end region.

[0009] The smooth end regions are arranged laterally spaced from one another. In an advantageous embodiment of the semiconductor chip, the smooth end regions are arranged in a common plane. Preferably, the smooth end regions are at the same height. Due to manufacturing processes, the height of the end regions may differ slightly from one another, with deviations of up to 10% from an ideal height being permissible. In particular, the end regions are arranged side by side in the common plane and have no connection in the common plane, with immediately adjacent end regions touching at most at one point. Preferably, however, the distance between immediately adjacent end regions is greater than zero. For example, a minimum distance between immediately adjacent end regions is 0.5 µm to 6 µm.

[0010] In contrast, a conventional structured sapphire substrate typically exhibits a single, continuous smooth region interrupted by depressions or protrusions. The structure described here, therefore, represents the inversion of a conventional structure. As will be explained in more detail below, the separation of the smooth regions, which preferably serve as growth surfaces, improves the crystal quality and thus the internal quantum yield. During epitaxial growth, the separate smooth end regions and the associated reduced growth area lead to a decrease in dislocation density and a reduction in strain buildup, thereby improving the crystal quality.

[0011] The depressions or elevations on the substrate surface can each be bounded by a smooth end region and at least one side surface. In particular, the depressions or elevations are bounded laterally by at least one side surface. Preferably, in a cross-sectional view, the side surface is arranged at right angles to the end region, at most in certain areas. Furthermore, in a cross-sectional view, the side surface preferably runs predominantly obliquely, i.e., not parallel, to the end region. The depressions or elevations each have a side surface that is at least partially inclined and / or curved relative to the end regions. The side surface may have a kink or a curvature in a cross-sectional view. Preferably, the side surface forms an angle of between 5° and 85°, particularly between 30° and 70°, with the surface normal of the smooth end region, at least in certain areas.

[0012] Advantageously, in the structure described here, the proportion of sloping or partially sloping side surfaces can be increased compared to a conventional structure, thus improving the radiation yield.

[0013] According to at least one embodiment, the smooth end regions have a two-dimensional shape. This means, in particular, that an end region extends only in one plane. The size of the end region is determined by a first lateral dimension along a first direction of extension and by a second lateral dimension along a second direction of extension, wherein the first and second directions of extension are, in particular, perpendicular to each other and span the plane in which the end region extends. The lateral dimensions are, in particular, in a range between 0.3 µm and 2 µm.

[0014] The end regions preferably have a two-dimensional shape that is symmetrical. The two-dimensional shape of an end region can be round or polygonal. "Round" in this context refers in particular to a symmetrical shape without corners, such as an oval or elliptical shape, especially a circle. Preferred polygonal shapes are, for example, triangular or hexagonal. Particularly preferably, the polygonal shape resembles an equilateral triangle or a regular hexagon.

[0015] Advantageously, the symmetrical shape of the smooth end regions in the described structure allows for an increased proportion of inclined facets compared to a conventional structure. Even when the proportion of inclined facets is increased, thus reducing the distance between the end regions, the described structure exhibits fewer or no asymmetric constrictions. In contrast, a conventional structure shows an increased incidence of asymmetric constrictions, where significantly reduced or increased nucleation of AlInGaN can occur between the depressions or elevations, leading to crystal defects and ultimately impairing crystal quality.

[0016] The structure described here therefore enables improved crystal quality as well as an improvement in internal quantum yield and radiation yield.

[0017] According to at least one embodiment, the recesses each have a three-dimensional shape. Preferably, the three-dimensional shape is symmetrical, for example, rotationally symmetrical or rotationally symmetrical. For example, the three-dimensional shape of the recesses can resemble an inverted truncated solid of revolution or a truncated polyhedron, such as an inverted truncated cone or truncated pyramid. Similarly, the raised areas can each have a three-dimensional shape that is symmetrical, for example, rotationally symmetrical or rotationally symmetrical. In particular, the three-dimensional shape resembles a truncated solid of revolution or a truncated polyhedron, such as a truncated cone or truncated pyramid. The recesses or raised areas have, for example, a height between 0.5 µm and 5 µm.The height specifies in particular a vertical dimension, which is determined along a third direction of extension, preferably perpendicular to the first and second directions of extension.

[0018] According to at least one embodiment, the end regions are arranged regularly. In other words, the end regions are not randomly arranged when viewed from above on the substrate surface, but rather follow a recognizable regular pattern. Manufacturing-related deviations from this regular pattern may occur, but the position of the end regions preferably does not deviate from their ideal position by more than 10%. For example, the end regions can be arranged at lattice points of a hexagonal or cubic lattice. According to at least one embodiment of the semiconductor chip, substrate regions arranged between the smooth end regions are uneven, i.e., not smooth. In other words, the substrate, apart from the smooth end regions, may not have any other smooth areas on the surface that is in contact with the semiconductor layer sequence.Alternatively, it is possible that other substrate areas are also flat. These are preferably arranged laterally spaced, like the smooth end areas.

[0019] In a preferred embodiment of the semiconductor chip, the structured surface of the substrate is located within the semiconductor chip. In other words, the surface does not form an outer surface of the semiconductor chip. It preferably forms an interface within the semiconductor chip. In particular, the outer surfaces of the semiconductor chip can be planar, which, for example, facilitates the arrangement of contact structures on the outer surfaces or the arrangement of the semiconductor chip on a substrate.

[0020] According to at least one embodiment, at least one layer of the semiconductor layer sequence is made of Al n Ga m In 1-n-mN is formed, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1, and n+m ≤ 1. The semiconductor layer sequence preferably comprises an n-type region, a p-type region, and an active zone arranged between them. Preferably, the n-type region is arranged between the active zone and the substrate, while the p-type region is arranged on a side of the active zone facing away from the substrate. The active zone is particularly intended for radiation generation.

[0021] According to at least one embodiment, the substrate is made of sapphire. Such a substrate is advantageously transparent to blue light, preferably emitted from an AlInGaN-based active zone.

[0022] The process for manufacturing a semiconductor chip includes the following steps: - Structuring a substrate, wherein depressions are introduced into the substrate or elevations are formed from the substrate such that the substrate has a structure of depressions on one surface, each of which is bounded on the underside by a smooth end region, or a structure of elevations, each of which is bounded on the top side by a smooth end region, wherein the end regions are arranged laterally spaced apart from each other, - Growing a sequence of semiconductor layers onto the surface in such a way that the sequence of semiconductor layers is in contact with the surface.

[0023] For example, depressions or raised areas in the substrate can be created by etching, such as reactive ion etching (RIE). Furthermore, the semiconductor layer sequence can be fabricated, in particular, by metal-organic vapor phase epitaxy (MOVPE).

[0024] In a preferred embodiment of the method, the surface is seeded with semiconductor material from the semiconductor layer sequence on the smooth end regions. These smooth end regions thus preferably serve as the seeding area. The lateral spacing or separation of the smooth end regions, and the associated reduction in seeding area, allows the dislocation density to be reduced compared to conventional structures. This results in fewer dislocations forming on the seeding area. Furthermore, the dislocation density can be further controlled by selecting suitable process conditions. In particular, the ratio of the starting materials used for the semiconductor layer sequence, such as trimethylgallium and ammonia, the temperature change, the process pressure, and the growth rate play a crucial role.

[0025] Preferably, during the fabrication of the semiconductor layer sequence, the depressions are filled with semiconductor material from the semiconductor layer sequence, starting from the smooth end regions. In the finished semiconductor chip, the depressions are thus filled with semiconductor material from the semiconductor layer sequence and surrounded by substrate material. If the layer is grown on the smooth end regions of the raised areas, then, after completion of the semiconductor layer sequence, the recessed substrate regions arranged between the smooth end regions are preferably also filled with semiconductor material from the semiconductor layer sequence. In the finished semiconductor chip, the raised areas formed from the substrate material are thus surrounded by semiconductor material from the semiconductor layer sequence.

[0026] In an alternative embodiment of the method, the surface is seeded by semiconductor material from the semiconductor layer sequence on the side faces. Here, the side faces are preferably arranged at a larger angle to the surface normal of the end region than is the case when seeding the smooth end regions.

[0027] Further advantages, beneficial embodiments and developments result from the following in conjunction with the Fig. 1 to 9 described embodiments.

[0028] They show: Fig. 1 A schematic cross-sectional view of a semiconductor chip according to an exemplary embodiment, Fig. 2A to 2D schematic cross-sectional views of various embodiments of structures with which the surface of a structured substrate described here can be provided, Fig. Figures 3A to 3D and 4A to 4C are schematic top views of the surface of a structured substrate described here according to various embodiments. Fig. 5A to 5C different manufacturing steps of a process for manufacturing a semiconductor chip according to a first embodiment, Fig. 6A to 6C different manufacturing steps of a process for manufacturing a semiconductor chip according to a second embodiment, Fig. 7A to 7C and Fig. Figures 8A to 8B show different views of the structure of a conventional substrate. Fig. 9 a diagram showing the proportion of inclined side surfaces for different surface structures of a structured substrate.

[0029] Fig. Figure 1 shows an embodiment of a semiconductor chip 10 as described here. The semiconductor chip 10 comprises a semiconductor layer sequence 20. At least one layer of the semiconductor layer sequence 20 is made of Al n Ga m In 1-n-m N is formed, where 0 ≤ n ≤ 1, 0 ≤ m ≤ 1 and n+m ≤ 1. Furthermore, the semiconductor layer sequence 20 has an active zone 21, which is intended in particular for radiation generation, as well as an n-type region 22 and a p-type region 23. The active zone 21 is arranged between the n-type region 22 and the p-type region 23.

[0030] The semiconductor chip 10 further comprises a structured substrate 30 on which the semiconductor layer sequence 20 is arranged. Preferably, the substrate 30 is made of sapphire and is therefore particularly well suited for coupling out blue light, which is preferably emitted by the active zone 21 when AlInGaN is used. The substrate 30 is in contact with the semiconductor layer sequence 20 at a surface 31. In this embodiment, the n-conducting region 22 of the semiconductor layer sequence 20 borders the surface 31. The surface 31 is, for example, arranged within the semiconductor chip 10 and is designed to increase the radiation yield.

[0031] The substrate 30 has a structure of depressions 32 on its surface 31. The depressions 32 are each bounded on their underside by a smooth end region 34. The smooth end regions 34 are arranged in a common plane. Preferably, the smooth end regions 34 are at the same level. Furthermore, the depressions 32 are each bounded laterally by a side surface 35. In the case of the Fig. In the embodiment shown in Figure 1, the side surfaces 35 are provided with a curvature in cross-section. The recesses 32 are rotationally symmetric and, in particular, have the shape of a truncated hyperboloid.

[0032] The depressions 32 formed in the substrate 30 are surrounded by substrate areas 36 which are uneven, i.e., not smooth. The substrate areas 36 have the cross-sectional shape of an inverted parabola.

[0033] The Fig. Figures 2A to 2D show further possible structures with which the surface of the substrate may be provided. For example, the three-dimensional shape of the depressions 32 may resemble an inverted truncated cone or truncated pyramid (compare Fig. 2A). The depressions 32 can be surrounded by substrate regions 36, which have a triangular cross-section. The side surfaces 35 of the depressions 32 preferably form an angle α between 5° and 85°, particularly between 30° and 70°, with the surface normals of the end regions 34. Furthermore, the side surfaces 35 of the depressions 32 can have a kink in cross-section (compare Fig. 2B). In particular, a part of the side surfaces 35 adjacent to the respective end region 34 runs at an angle α between 5° and 85°, especially between 30° and 70°, to the end region 34. The in Fig. The structure shown in 2C, like the one in Fig. The structure shown in Figure 1 has depressions 32 with curved side surfaces 35. In contrast to the one in Fig. In the structure shown in Figure 1, the surrounding substrate areas 36 do not have a rounded end area, but rather a tapered end area.

[0034] While the Fig. Structures of depressions 32, shown in 1 and 2A to 2C, are in Fig. A 2D structure of elevations 33 is depicted, each bounded on its upper side by a smooth end region 34. The elevations 33 each have a three-dimensional shape that is symmetrical. The three-dimensional shape resembles a truncated hyperboloid. The in Fig. The 2D-represented structure represents an inversion of the in Fig. The structure shown in 1 is represented.

[0035] The size of the end regions 34 is determined by a first lateral dimension B along a first extension direction R1 and by a second lateral dimension L along a second extension direction R2, wherein the first and second extension directions R1, R2 span the plane in which the end region 34 extends (compare Fig. 3A). The lateral dimensions B, L are in particular in a range between 0.3 µm and 2 µm. The height H of the depressions 32 or protrusions 33 is determined along a third direction of extension R3, which preferably runs parallel to the surface normal N of the end region 34 and perpendicular to the first and second directions of extension R1, R2. The depressions 32 or protrusions 33 have, for example, a height H between 0.5 µm and 5 µm (compare Fig. 2A and Fig. 2D).

[0036] Fig. Figure 3A shows a schematic top view of surface 31 of the in Fig. 1 substrate 30 shown, wherein Fig. Figure 1 shows a cross-section of substrate 30 along the dashed line R1. As shown from Fig. As can be seen from 3A, the smooth end regions 34 have a circular, two-dimensional shape. Furthermore, the smooth end regions 34 are arranged laterally spaced from one another. This means that the smooth end regions 34 are separate regions which, when viewed from the surface 31, have no connection with each other, in particular no connection arranged in the same plane as the end regions 34. For example, the smallest distance A between immediately adjacent end regions 34 is 0.5 µm to 15 µm.

[0037] In the Fig. 3B and Fig. 3C shows further possible two-dimensional shapes of the smooth end regions 34. For example, the shape can be oval or elliptical (compare Fig. 3B). Furthermore, the shape can resemble a regular polygon, in particular a regular hexagon (compare Fig. 3C).

[0038] Fig. 3D shows a limiting case of a structure where immediately adjacent end regions 34 touch only at one point. The two-dimensional shape of the smooth end regions 34 resembles a triangle, with curved sides.

[0039] The end areas 34 of the in the Fig. The structures shown in Figures 3A to 3D are arranged regularly and follow a recognizable regular pattern. For example, the end regions 34 can be located at lattice points of a hexagonal lattice (see Figure 3A). Fig. 4A) or a cubic lattice (compare this to...) Fig. 4B) be arranged or follow any other regular pattern, in particular the end regions 34 which are arranged along one of the two lateral extension directions R1, R2 can be transformed into each other by a single translation along the plane spanned by the two lateral extension directions R1, R2 (cf. Fig. 4C).

[0040] In connection with the Fig. Sections 5A to 5C describe a first embodiment of a method for manufacturing a semiconductor chip. Here, a substrate 30 is structured by incorporating depressions 32 into the substrate 30 such that the substrate 30 has a surface 31 with a structure of depressions 32, each of which is bounded on its underside by a smooth end region 34, the end regions 34 being arranged laterally spaced apart from one another (compare Fig. 5A). In a next step, the surface 31 is seeded by semiconductor material 24 of the semiconductor layer sequence, with the seeding taking place on the smooth end regions 34. Thus, the smooth end regions 34 serve as the growth surface (cf. Fig. 5B). As growth continues, the depressions 32 are filled with semiconductor material 24 of the semiconductor layer sequence, starting from the smooth end regions 34 (compare Fig. 5C). As growth continues, the gaps in the semiconductor layer sequence close, so that at the end of the growth process it is in contact with the entire surface 31 (not shown).

[0041] In an alternative embodiment of the method, the surface 31 is seeded by semiconductor material of the semiconductor layer sequence on the side surfaces 35 (compare Fig. 6A to 6C). Here, the side surfaces 35 are preferably arranged at a larger angle to the surface normal of the end region 34 than is the case when the smooth end regions are germinated.

[0042] In the Fig. Figures 7A to 7C show the structure of a conventional substrate 30. As the Fig. 7A and Fig. 7C shows that the structure has cone-shaped elevations 33. Fig. Figure 7A shows a cross-section along the dashed line, which is in Fig. 7B is shown. Fig. Figure 7B shows a top view of the surface 31 of the substrate 30. Fig. Figure 7C shows a scanning electron microscope (SEM) image of such a structure. The cone-shaped protrusions 33 are surrounded by smooth substrate regions 36, which are contiguous (compare Figure 7C). Fig. 7C). The present example in connection with the Fig. The structure described in 1, 2A to 2D and 3A to 3D therefore represents in particular the inversion of the conventional structure, since in the structure described here the smooth end regions are interrupted and have no connection with each other in a top view of the surface.

[0043] Conventionally, the growth of the semiconductor layer sequence occurs on the smooth, contiguous substrate regions 36. However, the substrate regions 36 exhibit asymmetric constrictions between immediately adjacent elevations 33, where significantly reduced or increased nucleation of AlInGaN can occur, leading to crystal defects, especially if the constrictions are relatively narrow due to inclined side faces. This problem is addressed in the Fig. 8A and Fig. 8B illustrates this. The circled area in Fig. 8A exhibits an area of ​​reduced AlInGaN nucleation at the constriction, while the circled area in Fig. 8B exhibits an area of ​​increased AlInGaN nucleation at the constriction, where the black areas represent areas of increased AlInGaN nucleation and the gray areas represent areas of decreased AlInGaN nucleation. Advantageously, such uneven nucleation can be largely prevented by means of the structure described here. This can be achieved in particular by the symmetrical shape of the smooth end regions and their lateral spacing.

[0044] Furthermore, the separation of the smooth end regions or their symmetrical shape allows for an increase in the proportion of inclined side surfaces without the risk of constrictions with significantly reduced or increased nucleation of AlInGaN.

[0045] Fig.Figure 9 shows a diagram where the horizontal axis represents the distance A between immediately adjacent smooth end regions in µm and the vertical axis P represents the proportion of inclined side surfaces. Curve I represents the situation for a conventional structure with conical protrusions in a hexagonal arrangement. Curve II represents the situation for a structure described here with a cubic arrangement, and curve III represents the situation for a structure described here with a hexagonal arrangement. As can be seen from the diagram, the proportion of inclined side surfaces can advantageously be increased in the structures described here compared to a conventional structure. The inventors based their calculations on the assumption that the smallest lateral dimensions of the end regions are at 0.The thickness of the deposited material is approximately 3 µm, and when overgrowing the depressions or elevations, the required thickness is roughly the same as the lateral dimensions. Depending on the chosen assumptions, the values ​​vary slightly, but the results described above remain valid.

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