PFC circuit with voltage-dependent signal input, as well as associated light and method for its operation

Abstract

Operating device for light source (3), in particular comprising at least one LED: - an active power factor correction circuit (11) supplied from a mains voltage (VIN) with a clocked switch (S1) controlled by a control unit (SE), wherein - the operating device (2) comprises the control unit (SE) which is configured to perform the clocking of the switch (S1) depending on an supplied measurement signal, - and a signal processing unit (SVE, SVE') which operates in time ranges around the peak of the mains voltage (VIN), e.g.in time periods in which the amplitude of the mains voltage (VIN) is above a predetermined threshold value (THR), the amplitude of the measurement signal is changed in such a way that during these time periods the power consumption of the power factor correction circuit (11) is reduced by the resulting clocking of the switch (S1), characterized in that the signal processing unit (SVE, SVE') is configured to connect an input of the control unit (SE) to a specific potential when the threshold value (THR) is reached.

Description

The invention relates to an operating device for the operation of lighting means, in particular LEDs. The operating device has a PFC circuit, i.e. a power factor correction circuit. A clocked switch of the PFC circuit is controlled by a control unit and in particular operated in a clocked manner. In this case, at least one signal is supplied to the control unit, on the basis of which the control unit actuates the switch. In particular, the PFC circuit has a measurement winding at a throttle, from which a current signal is fed to the control unit. The control unit can, on the basis of the current signal supplied in this way, detect, for example, a zero crossing of an electrical supply supplying the operating device, in particular a rectified mains voltage, or detect it by monitoring the current through the measurement winding. Usually, the control unit will control the switch in such a way that the switch is always switched on when the current through the measuring winding has dropped to zero. The invention therefore also relates to a circuit for power factor correction and to a method for controlling such a circuit.A power factor correction (PFC) is used to eliminate or at least reduce harmonic currents in an input current. Harmonic currents can occur in particular in the case of non-linear loads, as are, for example, rectifiers with subsequent smoothing in power supplies, since in the case of loads of this type the input current is shifted in phase and distorted non-sinusoidally in spite of the sinusoidal input voltage. The higher-frequency harmonics occurring in this case can be counteracted by an active or clocked power factor correction circuit connected upstream of the respective device.Power factor correction circuits are also used in operating devices for lighting means, for example in electronic ballasts or LED converters. The use of such circuits in devices for operating lighting means is desirable or necessary, since standards restrict the admissible return of harmonics into the supply network.For power factor correction circuits, a circuit topology based on the topology of a boost converter is often used. In this case, an inductance or coil supplied with a rectified alternating voltage is charged or discharged with energy by switching on and off a controllable switch. The discharge current of the inductance flows via a diode to an output capacitance, so that a DC voltage increased compared to the input voltage can be tapped at the output. However, other converter types are also customary in power factor correction circuits, such as, for example, flyback converters or buck converters.Such a power factor correction circuit can be operated in different operating modes. In particular, an operation with a continuous current through the aforementioned inductance (so-called "continuous conduction mode", CCM), an operation with a discontinuous conduction mode (also DCM operating mode) or an operation in the boundary region between continuous and discontinuous current through the inductance is known. The last-mentioned operating mode, which is situated just at the boundary between continuous and discontinuous operation, is also referred to as "critical conduction mode", "boundary conduction mode" or "border line conduction mode" (BCM operating mode).In order to operate a power factor correction circuit in the BCM operating mode, a control unit may be used that receives an input signal at an input that depends on the current in the inductor. The input signal can be detected, for example, inductively by means of a detection winding or measurement winding and fed to the input. The control unit may be configured to detect zero crossings of the current through the inductance based on the input signal and to control a control signal in response thereto to start a new charging process of the inductance. The controller may compare the signal depending on the current through the inductor with a threshold to initiate a re-switching of the switch to the on state depending on a result of the threshold comparison. Control units of corresponding design can be embodied in the form of integrated semiconductor circuits (or as integrated circuit IC, application-specific integrated circuit ASIC, as microcontrollers,... ). In order to be able to adapt the output power, the time duration in which the switch is switched into the on state, i.e. conducting, in each case and which is also referred to as "T on- time", can be adapted.Operating devices for lighting means should be usable for larger power ranges. In conventional power factor correction circuits, in which the control unit switches the switch again at a zero crossing of the current through the inductance, the provision of output powers which are small compared to the maximum output power can be associated with difficulties. For example, the T on- time cannot be arbitrarily shortened. An undesired transition into a so-called "burst" mode can occur, in which the power factor correction circuit remains temporarily switched off in order to avoid unacceptably high output voltages. The resulting brightness fluctuations in the light emitted from the lighting means are perceived as unpleasant. The brightness fluctuations are therefore perceptible to the human eye, for example as flickering. This is in contrast to the aim of ensuring the most uniform possible light emission.US 2011 / 0 292 704 A1 describes a circuit arrangement for a switched-mode power supply in which a power correction circuit is used, in particular for use with LED lighting devices. A circuit there can change measurement signals in such a way that measurement errors are avoided or at least reduced.US 2013 / 0 127 353 A1 describes a lighting device with a control circuit for operating LEDs.It is known from the prior art, for example, that when an operating device is intended to operate a low load, but at the same time a high mains voltage amplitude is present, the operating mode is changed. For example, the control can be switched from continuous, non-intermittent operation (CCM) to intermittent, intermittent operation (DCM). In particular, the clocked switch is switched off when a maximum bus voltage is reached and the switch is switched on again after a drop below a predefined hysteresis value, in particular into a low-frequency range of in particular less than 10 Hz.Thus, there is also a problem in that in a boundary operation between the non-intermittent operation and the intermittent operation (BCM), a predetermined minimum on-time period (T on- time) is set, and then, since power transmission by the PFC circuit cannot be further reduced, the output voltage output from the PFC circuit increases. This results in the aforementioned change in the brightness emitted by the connected lighting means or a brightness fluctuation.Since these periodic variations are perceptible, it is an object of the invention to avoid this increase in the PFC output voltage and, in particular, to allow operation without periodic disturbance. It is therefore an object of the invention to provide a method and circuit for power factor correction which reduces the risk of a transition to the "burst" mode when delivering lower powers.The invention therefore provides an operating apparatus and a method according to the independent claims. Further embodiments of the invention are the subject matter of the dependent claims.In a first aspect, an operating device for lighting means, in particular at least one LED, is provided, having an active power factor correction circuit which is supplied on the basis of a mains voltage and has a clocked switch which is controlled by a control unit, wherein the operating device has a control unit which is configured to carry out the clocking of the switch on the basis of a supplied measurement signal, and a signal processing unit which, in time ranges around the peak of the mains voltage, for example in time ranges in which the amplitude of the mains voltage is above a predetermined threshold value, changes the amplitude of the measurement signal in such a way that during the time ranges, a power consumption of the power factor correction circuit which is reduced by the clocking of the switch thus resulting is produced.When the threshold value is reached, the signal processing unit connects an input of the control unit to a specific potential. The determined potential may be ground.The signal processing unit may selectively disable and / or enable the power factor correction circuit.The measurement signal can represent a profile of a mains voltage. In particular, the measurement signal can be a voltage signal. The measurement signal can be a signal derived from the mains voltage.The measurement signal may represent a current through a coil of the power factor correction circuit.The measurement signal can be supplied to the control unit from a voltage divider and / or a current measurement resistor.The signal processing unit can change the measurement signal and in particular raise a level of a measurement signal, in particular until the mains voltage falls below a second threshold value.The measurement signal may be a current feedback signal supplied from a measurement winding at an inductance of the power factor correction circuit of the control unit.The mains voltage may be a rectified alternating voltage.The threshold may be equal to the second threshold.The signal processing unit can have a further switch which switches on when the mains voltage reaches the threshold value and switches off when the second threshold value is reached.The signal processing unit can bridge a resistor of a voltage divider, in particular when the further switch is conductive.The signal processing unit can activate a still further switch, which connects an input of the control unit to a defined voltage, in particular a control unit supply voltage.In another aspect, a luminaire or lamp with an operating device is provided, as described above.In yet another aspect, a method for operating an operating device for lighting means, in particular at least one LED, is provided, having an active power factor correction circuit, which is supplied on the basis of a mains voltage and has a clocked switch controlled by a control unit, wherein the operating device has a control unit which performs the clocking of the switch as a function of a supplied measurement signal, and a signal processing unit which changes the amplitude of the measurement signal in time ranges around the peak of the mains voltage, for example in time ranges in which the amplitude of the mains voltage is above a predefined threshold value, in such a way that during these time ranges there is a power consumption of the power factor correction circuit which is reduced by the clocking of the switch thus resulting.The invention will now also be described with reference to the figures. The following shows: FIG. 1 is a block diagram of an operating device according to the invention; FIG. 2 shows an exemplary circuit arrangement; FIG. 3 shows exemplary signal curves; FIG. 4 shows an exemplary circuit arrangement according to the invention; FIG. 5 shows further exemplary signal curves; FIG. 6 shows a further exemplary circuit arrangement according to the invention; and FIG. 7 shows still further exemplary signal curves.FIG. 1 shows a block diagram of a lighting system 1, which comprises an operating device 2 for a lighting means or a lighting means section 3. The lighting means 3 can have, for example, at least one LED. The operating device 2 can be connected to a bus or a wireless communication system in order to receive dimming commands and / or to issue status messages.The operating device 2 can be designed, for example, as an electronic ballast (EVG) for gas discharge lamps, fluorescent lamps or other fluorescent lighting means, or else as an LED converter. The operating device 2 has a rectifier 10 for rectifying a supply voltage, in particular a mains voltage. The operating device 2 further comprises a power factor correction circuit 11 (PFC circuit) which provides an output voltage for downstream components of the operating device 2. This output voltage is also referred to as the output voltage V OUT of the PFC circuit. A further voltage conversion and / or function can be achieved via a DC-DC converter 12, which can be designed as an LLC resonant converter, and / or an output driver 13. A control unit 14 can fulfil various control or regulating functions, for example for the conversion of dimming commands which are operated via the bus 4.The operation of the operating device with the PFC circuit 11 will now be described further with reference to the further figures.FIG. 2 now shows an exemplary example of a PFC circuit 11. an AC supply voltage, for example the mains voltage, is converted by the rectifier 10 into a rectified AC voltage which is present as an input voltage V IN between an input terminal of the PFC circuit 11 and ground.The input alternating voltage V IN is filtered by an input capacitor C1 and fed to an inductance L1a, which can be designed as a coil. The inductor L 1 ais connected in series with a diode D 1 between the input terminal and an output terminal of the PFC circuit 11. At the output terminal coupled to an output capacitance, or output capacitor, C2, an output capacitance V OUT is provided. The output terminal V OUT is for supplying a load supplied by the PFC circuit 11.The load can be, for example, a DC-DC converter (DC / DC converter) 12 with a lighting means 3 connected thereto or a further operating device for a lighting means.Connected to the connection between the inductance L1a and the diode D1 is a controllable switch S1 which serves as a controllable switching means. The controllable switch S 1 can be connected to ground via a shunt resistor R 4. The switch S 1 is a controllable electronic switch, in particular a power switch (for example field effect transistor FET or MOSFET).The switch is switched on and off by a control unit SE of the PFC circuit 11, that is to say is put into a conductive or non-conductive state. For this purpose, the control unit SE has a corresponding output 27 for driving or for outputting a control signal, by means of which, for example, the gate voltage of the switch S 1 can be controlled.In the switched-on state of the switch S 1, the inductance L 1 ais connected to ground via the switch S 1, so that the inductance L 1 ais charged and energy is stored in the inductance L 1 a. If, on the other hand, the switch S1 is switched off, i.e. open or non-conductive, the inductance L1a discharges via the diode D1 into the output capacitor C2. The energy stored in the inductance L1a is thus transferred to the output capacitor C2.The switch S 1 is controlled by the control unit SE. The power factor correction is achieved by repeatedly turning the switch S1 on and off, the switching frequency for the switch S1 being in particular greater than the frequency of the rectified input voltage source V IN. The PFC circuit 11 may operate as a bus converter. The mode of operation of the control device is described in more detail below.The control unit SE further has an input 25. Depending on an input signal received at the input 25, the control unit SE can switch the switch S 1 into the conductive or non-conductive state. The input signal received at the input 25 thus determines the switch-off time duration (T OFF- time), that is to say the time duration during which the switch S 1 remains in the off state or in the non-conductive state after switching, before it is switched back to the conductive state.The control unit SE can compare the input signal received at the input 25 with a threshold value. For this purpose, the control unit SE can comprise a corresponding comparator, for example. Depending on a result of the threshold comparison, the control unit SE may switch the switch S 1 to an on state. For example, the control unit SE can switch the switch S 1 back into the conductive state if the input signal received at the input 25 falls below a threshold value. The control unit SE can be configured such that a zero crossing is detected for the input signal received at the input 5. A detected zero crossing can trigger the switch S 1 to be switched on.The control unit SE can have further inputs. For example, a further input 21 may be coupled to a first voltage divider comprising resistors R 5, R 6 to sense the output voltage V OUT of the PFC circuit 11. A further input 23 may be connected to a second voltage divider comprising resistors R1, R2 for detecting the smoothed input voltage. The control unit SE can thus also define or control the switch-on time duration (T on- time) of the switch S 1 as a function of the input voltage and / or the output voltage. The on-time period can be determined independently of the input signal received at the input 25. The input signal provided at the input 25 can be used by the control unit SE for determining the point in time at which the switch S 1 is switched back into the on state and thus determines the off time duration (T off- time).By means of the input signal received at the input 25, or depending thereon, the control unit SE can trigger a renewed switching of the switch S 1 into an on state on the basis of the threshold value comparison and also permit operation in intermittent operation (DCM).Furthermore, the circuit has a further measurement inductance L 1 b, in particular a measurement winding or measurement coil, which is connected to the input 25 of the control unit via a measurement resistor R 3. The inductance L 1 bis provided to detect the end of a free-wheeling phase of the coil current through the inductance L 1 a. The coil current detected at the measuring inductance L 1 bis supplied via the measuring resistor R 3 to the input 25 of the control unit SE. If the current through the inductance L 1 areaches the value zero, i.e. there is a zero crossing, the switch S 1 is switched on, i.e. switched on, in order to store energy in the inductance L 1 a. The switch-on time duration of the switch S 1 can, as stated, be determined by the output voltage V OUT via the capacitor C 2, which is detected at the first voltage divider consisting of the resistors R 5, R 6. This voltage value is supplied to the control unit at input 21.Furthermore, the switch-on time duration of the switch S 1 can depend on the current supply voltage V IN which is formed at the second voltage divider consisting of the resistors R 1 and R 2.If the switch S 1 is closed, the current I L1 through the inductance L 1 aincreases linearly due to the inductance behavior. However, if the switch S 1 is opened, i.e. switched to non-conductive, the current is driven through the inductance L 1 avia the diode D 1 to the capacitance C 2, which is thereby charged. During this time, the current through the inductance L 1 afalls linearly to zero, which can be detected at the input 25 of the control unit SE. The switch S1 would therefore be controlled accordingly by being controlled via the output 27 of the control unit SE and would be switched on again.Exemplary signal curves are shown in FIG. 3 for on and off phases 36, 37 of the switch S 1. Here, in particular the current profile I L1 at the inductance L 1 ais shown by way of example (middle) and likewise the voltage U IN. induced in the measurement inductance L 1 b. The input signal at the input 25 is thus dependent on the coil current I L through the inductance L 1 aand allows the detection of zero crossings of the coil current. The control unit SE can output via the output 27 a control signal for controlling the switch S 1, which is illustrated at 31. The detected signal is proportional to a time derivative of the coil current through the inductance L 1 a, for example.When the switch S 1 is switched to the on state, the coil current 33 increases. Accordingly, the input signal 32 has a first value at the input 25 of the control unit SE. After the on-time period 36, when the switch S 1 is switched back to the off-state, energy is transferred from the inductance L 1 ato the output capacitor C 2. The coil current 33 falls accordingly. The drop in the coil current 33 leads to the input signal 32 at the input 25 of the control unit SE having a second value. A decrease in the coil current to zero or another, smaller threshold value can be detected by comparing the input signal 32 with a threshold value 34. Reaching threshold value 34 is recognized as time T zx for a zero crossing. In response, the control unit SE switches the switch S1 back to the on state. The switch-off time duration 37, i.e. the time duration in which the switch S 1 is switched to non-conductive, is selected such that operation takes place at the boundary between continuous and discontinuous current flow (non-intermittent operation and intermittent operation) through the inductance L 1 a.The control unit SE can now adapt the operation of the power factor correction circuit 11 to different loads and / or dimming levels by adaptation of the switch-on time duration 36, for example. In this case, with loads becoming smaller and / or lower dimming levels, the switch-on time duration 36 can be reduced to a permissible minimum value. Upon reaching the minimum value, a transition to the DCM (intermittent operation) operating mode can be initiated.Since the control unit SE is configured to operate in the limit mode (BCM), the available power range is limited. The smaller the load connected to the PFC circuit 11, the shorter the on-time period T ON of the switch S 1 is selected. This takes place until the minimum switch-on time duration for the switch S 1 is reached. However, even this minimum on-time is sufficiently large to charge the output capacitance C2 at the output of the PFC circuit 11 and thus increase the voltage V OUT.If a specific voltage value is now reached, the control unit SE switches the switch S1 off until the output voltage V OUT falls below a predetermined threshold value. This takes place in the course of overvoltage protection. This results in the so-called "burst mode", in which the output capacitance C2 is charged in each case as far as the region of the overvoltage protection and charging of the output capacitance C2 is then prevented. Thus, at the output of the PFC circuit 11, a high voltage ripple results with a repetition rate of possibly a few seconds.Now, in order to avoid a burst mode, the energy transmitted by the PFC circuit 11 must be limited. The invention now makes it possible in particular to limit the switch-on time duration of the switch S 1 at a specific value of the input voltage V IN or of the smoothed mains voltage V IN_S such that less energy is transmitted. This allows a higher energy transfer during the working time and therefore longer switch-on periods of the switch S 1.An embodiment of the invention is now shown in Fig. 4 which comprises a signal processing unit SVE according to the invention (components in the dashed area). Components already described with reference to FIG. 2 are designated accordingly. As can be seen in FIG. 4, a third voltage divider consisting of the resistors R 7 and R 8 is provided as part of the signal processing unit SVE between the input capacitor C 1 and the second voltage divider.At a midpoint of the third voltage divider, a zener diode Z1 is provided, which is connected to its cathode at the midpoint. The anode of the zener diode is connected to the base of a transistor Q1. The collector of the transistor Q1 is connected via a connection resistor R9 to the base of a second transistor Q2, while the emitter of the transistor Q1 is connected to a further potential, in particular ground. In the path between emitter of transistor Q1 and ground, an offset resistor R OFF can be provided, which is shown in dotted lines in FIG. 4. This allows defining a potential which is set when the transistor Q 1 is activated. The connection resistor R 9 is connected to the base of the second transistor Q 2, the emitter of which is connected to a voltage source or a potential of a voltage source. This is in particular the control unit supply voltage VCC. The collector of the second transistor Q2, on the other hand, is connected in the forward direction to the input 25 of the control unit SE via a second diode D2.If a defined voltage is now present at the resistor R8 of the third voltage divider (these being set by dimensioning the resistors R8, R9 of the third voltage divider) and if this defined voltage exceeds the breakdown voltage of the zener diode and the base-emitter voltage of the first transistor Q1, the path between the collector and the emitter of the first transistor Q1 becomes conductive. If the first transistor Q1 conducts, the second transistor Q2 also conducts and the zero crossing detection input 25 of the control unit SE is connected to the potential VCC. As a result, the control unit SE cannot determine a zero crossing of the current I L1 through the inductance L 1 aor a free-wheeling phase of the inductance L 1 a, and the control unit SE will not switch on the switch S 1.Consequently, since the PFC circuit 11 is turned off at peak voltage values or at voltage values of the electric supply voltage above a threshold value, the on-time duration of the switch S 1 during the active phase of the PFC circuit 11 must be increased to ensure sufficient power transfer. However, this prevents the "burst mode" of the PFC circuit 11. The transistors Q1, Q2 are thus voltage-controlled switches.FIG. 5 shows a corresponding exemplary illustration of the voltage profile through the input capacitor C 1 (top) and of the current profile through the inductance L 1 a(bottom). Likewise, the switch-off threshold THR of the PFC circuit 11 is indicated by a dashed line. This threshold value THR consequently corresponds to the voltage value at which the first transistor Q1 is switched on. In time ranges in which the amplitude of the mains voltage is above the predetermined threshold value, the amplitude of the measurement signal which is supplied to the control unit SE is therefore changed in such a way that a reduced power consumption of the power factor correction circuit results during the time ranges. At the top, the voltage V C1 at the input capacitor C 1 is plotted, as it is detected at the third voltage divider. When the threshold value THR is exceeded, i.e. from the point in time from which the transistor Q 1 switches, the PFC circuit is deactivated. A resulting course of the current I L1 through the coil L 1 ais plotted below.In general, therefore, in the range of the peak values of the electrical supply voltage, in particular of the rectified mains voltage, the current detection at the input signal of the control unit SE is selectively changed. In particular, in this range, i.e. in the range above the threshold value or in the range of the peak of the supply voltage, the current detection signal supplied to the input 25 of the control unit SE can be shifted upwards in such a way that in the lateral range of the peak values of the rectified line voltage, the control unit cannot detect a zero crossing of the coil current through the inductance L 1 a. This achieves a kind of discontinuous conduction mode (DCM) by manipulation of the signal supplied by the measurement inductance Lb 1 in the region of the peaks of the mains voltage. The operation at least similar to intermittent operation can have a 100 Hz rhythm.However, selectively disabling the PFC circuit 11 may result in an increased 100 Hz ripple, which may be acoustically perceptible under some circumstances. In a further embodiment, which is illustrated in FIG. 6, a current signal supplied to the control unit SE is now no longer changed, but the signal which represents the smoothed mains voltage V IN_S and is detected at the second voltage divider is changed.As is known, the control unit SE detects the mains voltage in such a way that the energy consumption by the PFC circuit 11 can simulate the sinusoidal profile of the electrical supply voltage. The switch-on time duration of the switch S 1 is selected to be longer, in particular, the higher the current amplitude of the mains voltage V IN or of the electrical supply voltage.Figure 6 now shows an embodiment of the invention which corresponds in great part to the circuit of Figure 4. The same circuit parts are designated accordingly in the same manner. Essentially, only the signal processing unit SVE' is configured differently.As can be seen from FIG. 6, a third voltage divider with the resistors R 7', R 8' is again provided, which is provided between the input capacitor C 1 and the second voltage divider made up of the resistors R 1, R 2. At a midpoint of the third voltage divider, as in Fig. 4, a zener diode Z1' is provided which is connected to the base of a transistor Q1'. The collector of the transistor Q1' is connected to a midpoint of the second voltage divider and thus to the input 23 of the control unit SE. The emitter of the transistor Q1' is connected to a defined potential, in particular to ground. However, it can be provided that a further offset resistor R OFF' is arranged in the connecting branch between emitter and ground, which offset resistor can be selected to set a corresponding potential. The optional offset resistance R OFF' is shown dotted in FIG. 6.If the voltage defined at the midpoint of the third voltage divider now rises (this voltage can be set by appropriate dimensioning of the resistors R7' and R8') and consequently the voltage at the resistor R8' corresponds to the breakdown voltage of the zener diode Z1 plus the base-emitter voltage of the transistor Q1, or exceeds this, the path between the collector and the emitter of the transistor Q1 becomes conductive. As a result, the input 23 of the control unit SE is connected to ground or to the defined potential. In particular, the lower-potential resistor R 2 of the second voltage divider is bypassed. As a result, the voltage detected at the input 23 of the control unit SE falls to zero. The control unit SE can determine the signal received at the input for determining the switch-on duration of the switch S 1. The on-time of the switch S1 is therefore reduced to a minimum.The signal processing unit SVE' now therefore manipulates the detection of the electrical supply voltage to the effect that, at high amplitudes of the electrical supply voltage, a lower mains voltage amplitude is detected at the control unit SE. This is done by selectively short-circuiting the second voltage divider and in particular the resistor R2 of the second voltage divider, by short-circuiting the midpoint and thus the signal at the input 23 of the control unit SE via the transistor Q1. Since a relatively low amplitude is now detected at the control unit SE instead of a high amplitude of the electrical supply voltage, the switch-on time duration (T on- time) is set to a minimum value.The advantage compared to the arrangement from FIG. 4 is then that the switching of the PFC switch S 1 is not completely deactivated in the region of the high voltage amplitudes. Rather, switching takes place with a minimum switch-on time duration (T on- time).Since, overall, the energy transmission would be reduced by the actually too low energy transmission in the region of the high amplitudes, the control unit SE or a control algorithm which is implemented in the control unit SE and to which the output voltage of the PFC circuit 11 is supplied compensates for this lower energy transmission in that, in order to avoid a drop in the bus voltage, the switch-on time duration outside the high voltage amplitudes is increased.FIG. 7 illustrates a corresponding signal profile. In the upper part, on the one hand, the voltage V C1 is plotted at the input capacitor C 1, as is detected at the third voltage divider. V R2 represents the voltage at the resistor R2 of the second voltage divider. When the threshold value THR is exceeded, i.e. from the point in time from which the transistor Q1' switches, the voltage VR2 falls to zero. A corresponding course of the current I L1 through the coil L 1 ais plotted below.Quite generally, the concept according to this aspect of the invention is that in the region of the mains voltage peaks, i.e. whenever the mains voltage exceeds a predetermined threshold value THR, the feedback measurement signal for the mains voltage is reduced in a targeted manner.In the exemplary embodiment shown, a zero crossing of the mains voltage is actually simulated by short-circuiting the resistor R2 of the resistor divider. Alternatively, the emitter can be conducted not to ground potential but to ground via a further resistor R OFF, R OFF'. Thus, the control unit SE would be presented at the input 23 not with a zero crossing, but only with a reduced mains voltage amplitude greater than zero. This leads to the control unit SE then not setting the minimum tone time for the zero crossing, but rather a reduced but just not the minimum tone time, which leads to the jumps between the activation / deactivation of the PFC circuit being less drastic with respect to the tone time, which furthermore has advantages with respect to the 100 Hz ripple and acoustic interference.The further resistor R OFF, R OFF' can also be connected to the collector of the switch Q1, Q1'. Overall, the parallel connection of the resistor R2 with the at least one further connected parallel resistor R OFF, R OFF' in the branch of the transistor Q1, Q1' will change the resistor divider in such a way that the signal at the input 23 of the control unit SE of the PFC presents a lower mains voltage than actually currently present.Since the distortion of the control of the PFC is thereby impaired in terms of optimum power factor, the activation of the above-mentioned function can be limited to low load ranges, i.e. in particular in the case of dimming down of the connected lighting means section.

Claims

Operating device for lighting means (3), in particular at least one LED, having: - an active power factor correction circuit (11), which is supplied on the basis of a mains voltage (V IN) and has a clocked switch (S1) controlled by a control unit (SE), wherein - the operating device (2) has the control unit (SE), which is configured to carry out the clocking of the switch (S1) on the basis of a supplied measurement signal, - and a signal processing unit (SVE, SVE'), which changes the amplitude of the measurement signal in such a way in time ranges around the apex of the mains voltage (V IN) for example in time ranges in which the amplitude of the mains voltage (V IN) is above a predetermined threshold value (THR), A power consumption of the power factor correction circuit (11) which is reduced during these time ranges by the timing of the switch (S1) which thus results, characterized in that the signal processing unit (SVE, SVE') is configured to connect an input of the control unit (SE) to a specific potential when the threshold value (THR) is reached.The operating device according to claim 1, wherein the signal processing unit (SVE, SVE') selectively deactivates and / or activates the power factor correction circuit (11).Operating device according to Claim 1 or 2, wherein the measurement signal represents a profile of a mains voltage (V IN) and / or is a signal derived from the mains voltage (V IN).The operating device according to any of the preceding claims, wherein the measurement signal reflects a current through a coil (L1a) of the power factor correction circuit (11).Operating device according to one of the preceding claims, wherein the measurement signal is fed to the control unit (SE) from a voltage divider (R1, R2) and / or a current measuring resistor (R3).Operating device according to one of the preceding claims, wherein the signal processing unit (SVE, SVE') changes the measurement signal and in particular raises a level of a measurement signal, in particular until the mains voltage (V IN) falls below a second threshold value.Operating device according to one of the preceding claims, wherein the measurement signal is a current feedback signal which is fed from a measurement winding at an inductance (L1b) of the power factor correction circuit (11) of the control unit (SE).Operating device according to one of the preceding claims, wherein the mains voltage (V IN) is a rectified alternating voltage.The operating device according to claim 6, wherein the threshold value (THR) is equal to the second threshold value.Operating device according to one of the preceding claims, wherein the signal processing unit (SVE, SVE') has a further switch (Q1), which switches on when the mains voltage (V IN) reaches the threshold value (THR), and switches off when the second threshold value is reached.Operating device according to one of the preceding claims, wherein the signal processing unit (SVE, SVE') bridges a resistor of the voltage divider (R1, R2), in particular when the further switch (Q1) is conductive.Operating device according to one of the preceding claims, wherein the signal processing unit (SVE, SVE') activates a still further switch (Q2) which connects an input of the control unit (SE) to a defined voltage, in particular a control unit supply voltage (VCC).A luminaire or lamp having an operating device according to any one of the preceding claims and having at least one lighting means.Method for operating an operating device for lighting means (3), in particular at least one LED, having an active power factor correction circuit (11), which is supplied on the basis of a mains voltage (V IN) and has a clocked switch (S1) controlled by a control unit (SE), wherein the operating device (2) has the control unit (11), which performs the clocking of the switch (S1) on the basis of a supplied measurement signal, and a signal processing unit (SVE, SVE'), which changes the amplitude of the measurement signal in such a way in time ranges around the apex of the mains voltage (V IN) for example in time ranges in which the amplitude of the mains voltage (V IN) is above a predetermined threshold value, A power consumption of the power factor correction circuit (11) which is reduced during these time ranges by the timing of the switch (S1) which thus results, characterized in that the signal processing unit (SVE, SVE') connects an input of the control unit (SE) to a specific potential when the threshold value (THR) is reached.

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