Method for producing a porous structure in the layer structure of a semiconductor device and MEMS device with such a porous structural element

A colloidal template-based method for creating porous structures in semiconductor components enables low-temperature processing, preserving mechanical rigidity and thermal insulation, addressing the challenge of maintaining component integrity during high-temperature steps.

DE102015204886B4Active Publication Date: 2024-12-24ROBERT BOSCH GMBH
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
DE102015204886
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2015-03-18
Publication Date
2024-12-24
Estimated Expiration
2035-03-18

AI Technical Summary

Technical Problem

Existing methods for producing semiconductor components with porous structures face challenges in maintaining the integrity of electrical and mechanical properties during high-temperature process steps, which can impair functionality.

Method used

A method involving the use of a colloidal template to create a porous structure using a colloid dispersion medium, followed by deposition of a coating material and removal of the colloid particles, allowing for low-temperature processing and preservation of mechanical rigidity and thermal insulation.

Benefits of technology

The resulting structure is lightweight, mechanically rigid, and thermally insulating, effectively decoupling electrical components and providing thermal insulation without affecting their functionality.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

Method for producing a porous structure in the layered structure of a semiconductor device, wherein the layered structure comprises a polysilicon layer (3) and a sacrificial layer (4) arranged thereon, wherein a microphone diaphragm (10) is realized in the polysilicon layer (3) and a counter electrode (12) is realized in the surface of the sacrificial layer (4), comprising the process steps: • Creating a template (20) in a surface area of ​​the sacrificial layer (4) of the layer structure (100) by applying at least one colloid in a dispersion medium and subsequently removing the dispersion medium, wherein the individual colloid particles (21) arrange themselves in the template (20), • Providing the template (20) with through-holes (22) that correspond to the structure of the counter electrode (12), • Deposition of at least one coating material (23) in the area of ​​the template (20), wherein the individual colloidal particles (21) are at least partially coated with the coating material (23), • Removal of the colloidal particles (21) so that only the connected coating material envelopes (23) remain in the area of ​​the template (20), forming a counter element (11), and • Removal of the sacrificial layer (4) in the membrane area of ​​the microphone membrane (10) via the through-holes (22) until the microphone membrane (10) is exposed in the polysilicon layer (3), with the counter element (11) serving as a support for the counter electrode (12).
Need to check novelty before this filing date? Find Prior Art

Description

State of the art

[0001] The invention relates to a method for producing a porous structure in the layer structure of a semiconductor component and to a MEMS component with at least one such porous structural element.

[0002] The overall functionality of a semiconductor component typically results from the interaction of several electrical and, if necessary, mechanical functions implemented in different layer and chip regions of the component. For this purpose, layer and chip regions with different, defined electrical and mechanical properties are specifically created during the manufacturing process.

[0003] A particular challenge in manufacturing is to design the process sequence in such a way that the electrical and mechanical properties of functional elements already created in the layered structure are not adversely affected by subsequent process steps. For example, high-temperature process steps affect the electrical properties of integrated circuit elements, which can impair their functionality.

[0004] Furthermore, the published patent applications US 020140011014 A1, DE 102006025121 A1 and CN 000102590308 A each show methods for producing a porous structure in the layer structure of a semiconductor component. Disclosure of the invention

[0005] The present invention proposes a possibility for the realization of extremely light but mechanically stiff and thermally insulating structural elements in the layer structure of a semiconductor component, which does not require high-temperature process steps.

[0006] According to the invention, a template made of micro- or nanoparticles is first created in a surface region of the layer structure. For this purpose, at least one colloid is applied in a dispersion medium. The dispersion medium is then removed. The individual colloid particles self-assemble into a three-dimensional colloidal crystal to form the template. Then, at least one coating material is deposited in the region of the template. The individual particles of the template, i.e., the colloid particles, are completely or partially coated with the coating material. The colloid material is then removed by a suitable etching or decomposition process, so that only the molded, coherent coatings of coating material remain in the template region.

[0007] Depending on the thickness of the initial template, the resulting coating material structure is comparatively stiff and highly porous, similar to an aerogel. This high porosity makes the structure very lightweight and has very low thermal conductivity. Accordingly, such a structure can be advantageously used for thermal insulation of individual regions or functional elements of a semiconductor device.

[0008] According to the invention, it has been recognized, on the one hand, that a whole series of materials that are usually used in chip production can be easily brought into the dosage form or consistency of a colloid in a dispersion medium. Secondly, it has been recognized that materials in a colloidal phase can also be used in the processing of semiconductor components. Colloidal emulsions and suspensions as well as droplets or particles in a gas are preferred as a dispersion medium. These material systems enable material application using standard low-temperature processes, such as spin coating. In this case, individual surface areas can be structured for material application, for example simply using a shadow mask. After application, the dispersion medium can be removed from the template using a suitable drying process, such as moderate heat treatment or vacuum application.Due to the attractive forces between the individual colloidal particles, they arrange themselves in a uniform single- or multi-layer grid as a colloidal crystal, which is used according to the invention as a template or carrier structure for a coating material. The coating material remains in the layered structure of the semiconductor component as a coherent structural element. In contrast, the colloidal material according to the invention acts as a sacrificial material, whose geometry determines the pore size and arrangement of the resulting structural element made of coating material and which is removed from the layered structure after the coating process.

[0009] To create the template, a colloidal polymer suspension can be used, for example, as is also used in other technical fields, e.g., in the production of polymer fibers. The polymer material can then be thermally decomposed after the coating process or removed from the structural element using oxygen plasma.

[0010] The use of a colloidal SiO2 suspension to create the template is particularly advantageous, as SiO2 is already used as a sacrificial layer material in many chip manufacturing processes. The same etching process can be used to dissolve the SiO2 colloidal material as for SiO2 sacrificial layer etching. An HF gas-phase etching process is particularly suitable for this.

[0011] Metal oxides such as Al2O3 are particularly suitable as coating materials. These are suitably deposited on the surface and into the interstices of the layer structure using an ALD (atomic layer deposition) process or CVD (chemical vapor deposition). Even in multilayer templates, the oxide penetrates into the interstices between the individual colloidal particles of the lower layers. The notable advantage of Al2O3 is that it is not attacked by oxygen plasma or HF gas. Since Al2O3 is an electrically insulating material, the resulting highly porous structures can be advantageously used for the electrical decoupling of sub-areas of the chip structure and, in particular, as supports for electrode arrangements.

[0012] In the context of ASIC components, the electrical properties of the structural elements produced using the method according to the invention play a primary role. These depend largely on the material used for coating the template. For example, instead of an electrically insulating material such as Al2O3, an electrically conductive material can of course also be used, provided it is inert to the process used to remove the colloidal material.

[0013] The special mechanical properties of the structural elements produced using the method according to the invention can also be utilized in MEMS components. The possible applications here are diverse. For example, a highly porous structural element could be used as a thermally insulating support for the sensor resistors of a gas, flow, or current sensor. The stationary counter element of a capacitive pressure sensor or microphone can also be realized in the form of a highly porous structural element manufactured according to the invention, since it exhibits a relatively high degree of rigidity depending on its thickness. Furthermore, the porosity of such a counter element ensures slow pressure equalization between the two sides of the counter element, which counteracts distortion of the microphone signal due to fluctuations in ambient pressure. Short description of the drawings

[0014] As already discussed above, there are various possibilities for advantageously embodying and developing the teachings of the present invention. Reference is made, on the one hand, to the subordinate patent claims and, on the other hand, to the following description of an exemplary embodiment of the invention. The Fig. Figures 1a to 1d illustrate the method according to the invention using the example of the production of a capacitive MEMS microphone component. The figures each show a sectional view through the structure 100 in successive stages of production. Embodiment of the invention

[0015] In the embodiment described here, the microphone structure of the MEMS microphone component is realized in a layered structure on a base substrate 1. This can be, for example, a silicon substrate 1.

[0016] In a first process step, the substrate surface is coated with a silicon oxide layer 2. This silicon oxide layer 2 serves, on the one hand, as an etch stop layer for a back-side etching process, in which the base substrate 1 is completely removed in a defined area, namely the diaphragm area, in order to expose the microphone diaphragm 10 on the back. On the other hand, the silicon oxide layer 2 acts as electrical insulation between the base substrate 1 and a polysilicon layer 3 applied to the silicon oxide layer 2. In a subsequent process step, the microphone diaphragm 10, which also functions as the diaphragm electrode of a microphone capacitor, is realized in this polysilicon layer 3.

[0017] Before this, however, a thick silicon oxide layer 4 is applied to the polysilicon layer 3. This layer serves as a sacrificial layer 4 and its thickness defines the distance between the microphone diaphragm 10 and a stationary counter element 11. This counter element 11 serves as a carrier for at least one stationary counter electrode 12 of the microphone capacitor.

[0018] The counter electrode 12 is implemented here in the form of a structured polysilicon electrode in the surface of the sacrificial layer 4. It is formed in the area above the microphone diaphragm 3.

[0019] In a next process step, another polysilicon layer 5 is applied to the layer structure 100 and opened in the membrane area.

[0020] Fig. Figure 1a shows this layer structure 100 after a template 20 has been created in the opening region of the polysilicon layer 5. This template 20 is arranged above the structured polysilicon electrode 12 on the sacrificial layer 4 and extends over the entire membrane area. It consists of a grid-like arrangement of colloidal particles 21 made of silicon oxide.

[0021] To create this template 20, a colloidal suspension of micro- or nanoscale SiO2 spheres 21 was applied to the surface of the layered structure 100 using a spin-coating process and a shadow mask. During the subsequent drying process, in which the liquid dispersion medium evaporated, the attractive forces acting between the SiO2 spheres 21 led to a regular grid-like arrangement of the SiO2 spheres 21.

[0022] Since the template 20 thus produced is intended to define the fixed acoustically permeable counter element 11 in its thickness and areal extent, it was provided with through openings 22 in a subsequent structuring step in the embodiment described here. Fig. Figure 1b illustrates that these through-holes 22 correspond to the structure of the counter electrode 12.

[0023] Only in the following process step is the material 23, from which the counter element 11 is to be formed, applied to the layered structure. The template 20 serves as the internal mold for the pores of the counter element 11. Al2O3 is used here as the material 23 for the counter element 11. It is deposited in an ALD process in the area of ​​the template 20. In this process, not only the SiO2 spheres 21 of the uppermost layer of the template 20 are coated with a thin Al2O3 film 23, but also the SiO2 spheres 21 in the lower layers, which Fig. 1c is shown.

[0024] The coherent Al2O3 structure 23 thus created is then exposed by first dissolving the SiO2 colloidal material 21 from the pores and then also removing the SiO2 sacrificial layer 4 in the membrane area. The dissolution and removal of the SiO2 material is advantageously carried out in an RF gas-phase etching process. This process does not attack the Al2O3 23 of the counter element 11, nor the silicon of the counter electrode 12 and the microphone membrane 10. Furthermore, the Al2O3 structure 23 deposited on the template 20 is permeable to gaseous RF, so that after the removal of the colloidal material 21, the sacrificial layer material 4 is also attacked over its entire surface, namely via the pores in the Al2O3 structure 23. Fig. Figure 1d illustrates that the RF etching attack is continued until the membrane 10 in the polysilicon layer 3 is also exposed.

[0025] Accordingly, the microphone structure of the microphone component 100 shown here comprises a microphone diaphragm 10 made of polysilicon, which spans an opening 13 in the rear of the component, and a stationary, acoustically permeable counterelement 11 with through-openings 22, which serves as a support for a counterelectrode 12. The counterelement 11 is formed in a layered structure above and at a distance from the microphone diaphragm 11. The counterelectrode 12 is arranged on the underside of the counterelement 11 facing the microphone diaphragm 10. According to the invention, the counterelement 11 is realized in the form of a highly porous but mechanically rigid structure made of Al2O3 that is impermeable to sound waves. The porosity of the counterelement 11 enables slow pressure equalization between the two sides of the counterelement 11. In this way, the influence of the ambient pressure on the microphone signal can be significantly reduced.

[0026] In an alternative embodiment, the coherent Al2O3 structure 23 can also be applied to a self-supporting membrane structure formed by the counter electrode 12.

Claims

[1] Method for producing a porous structure in the layer structure of a semiconductor component, wherein the layer structure comprises a polysilicon layer (3) and a sacrificial layer (4) arranged thereon, wherein a microphone membrane (10) is realized in the polysilicon layer (3) and a counter electrode (12) in the surface of the sacrificial layer (4), comprising the method steps: • Creating a template (20) in a surface area of ​​the sacrificial layer (4) of the layer structure (100) by applying at least one colloid in a dispersion medium and subsequently removing the dispersion medium, wherein the individual colloid particles (21) arrange themselves in the template (20), • Providing the template (20) with through-openings (22) that correspond to the structure of the counter electrode (12), • depositing at least one coating material (23) in the region of the template (20), wherein the individual colloid particles (21) are at least partially coated with the coating material (23), • removing the colloidal particles (21) so that only the coherent coatings of coating material (23) remain in the area of ​​the template (20), which form a counter element (11), and • Removing the sacrificial layer (4) in the membrane area of ​​the microphone membrane (10) via the through-openings (22) until the microphone membrane (10) is exposed in the polysilicon layer (3), the counter element (11) serving as a carrier for the counter electrode (12). [2] Method according to claim 1, wherein a colloid in a liquid or gaseous dispersion medium is used to produce the template (20), that is to say a colloidal emulsion or suspension or droplets or particles in gas. [3] A method according to any one of claims 1 or 2, wherein a colloidal polymer suspension is used to produce the template. [4] Method according to one of claims 1 or 2, wherein a colloidal SiO2 suspension is used to produce the template (20). [5] Method according to one of claims 1 to 4, wherein Al2O3 is used as coating material (23). [6] Method according to one of claims 1 to 5, wherein the colloidal material (21) is removed in an HF gas phase etching step or with the aid of oxygen plasma. [7] MEMS microphone component with a porous structure in the layer structure of a semiconductor component, wherein the layer structure comprises a polysilicon layer (3) and a sacrificial layer (4) arranged thereon, wherein a microphone membrane (10) is realized in the polysilicon layer (3) and a counter electrode (12) is realized in the surface of the sacrificial layer (4), wherein the MEMS microphone component is manufactured in a method according to one of claims 1 to 6.

Citation Information

Patent Citations

  • CN000102590308A

  • visualization of micro- and nanopore bulk assemblies by self-assembly of nanoparticles and sublimation technique

    DE102006025121A1

  • Three-dimensional (3D) porous device and method of making a 3D porous device

    US20140011014A1