Arrangement substrate and display board

Abstract

Arrangement substrate, comprising: several common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) that are insulated from each other; and several signal lines (220; 320, 340; 420, 440; 520) comprising a first signal line (320) and a second signal line (340), wherein the several signal lines (220; 320, 340; 420, 440; 520) are located in a different layer than the several common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) and wherein an insulating layer is provided between the several common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) and the several signal lines (220; 320, 340; 420, 440; 520), wherein one end of the first signal line (320) and one end of the second signal line (340) are each connected to one of the several common electrodes; the other end of the first signal line (320) and the other end of the second signal line (340) are electrically connected to a control chip; the first signal line (320) and the second signal line (340) are insulated from common electrodes that are not electrically connected at their ends; a common electrode that is insulated from the first signal line (320) has a first gap (3110) in a section facing the first signal line (320); a common electrode that is insulated from the second signal line (340) has a second gap (3310) in a section facing the second signal line (340); a resistance of the first signal line (320) is greater than a resistance of the second signal line (340);a first deviation distance exists between a projection of the first signal line (320) into a plane of the multiple common electrodes and a center position of the first slit (3110); a second deviation distance exists between a projection of the second signal line (340) into the plane of the multiple common electrodes and a center position of the second slit (3310); and the first deviation distance is smaller than the second deviation distance.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to display technologies, and more particularly to an array substrate and a display panel. BACKGROUND

[0002] A liquid crystal display (LCD) and an organic light-emitting diode (OLED) display have advantages such as low radiation, small size, low power consumption, etc. Therefore, LCD and OLED displays are widely used in notebook computers, personal digital assistants (PDAs), flat-panel televisions, mobile phones, and other information products.

[0003] Products that combine touch technology with display technology have gradually become widespread in daily life. Currently, touch screens can be classified according to their structural forms into out-of-cell touch screens, surface-covering touch screens, and in-cell touch screens. In an in-cell touch screen, the touch electrodes of the touch screen are embedded in a display panel, thus reducing the overall thickness of the module and lowering the manufacturing cost of the touch screen. In conventional in-cell capacitive touch screens, a finger touch position is detected based on the principle of mutual capacitance or the principle of self-capacitance. In the self-capacitance principle, multiple self-capacitance electrodes are arranged in the same layer, insulated from each other.When the touch screen is not touched, each self-capacitive electrode is subjected to a constant capacitance. When the touch screen is touched, the corresponding self-capacitive electrode is subjected to the constant capacitance, superimposed on a body capacitance. A touch sensing chip is used to detect the capacitance change of each self-capacitive electrode to detect a touch position.

[0004] As the size of the display panel increases, the lengths of the signal lines used in the touch panel increase. Therefore, the resistances and capacitances of the signal lines, as well as the differences in resistance and capacitance between different signal lines, also increase, leading to an increase in the RC delay of the display panel. The increase in the RC delay also results in a deterioration in the display and touch performance.

[0005] US 8,754,662 B1 discloses a capacitive touch sensor array and an embodiment of a capacitive sensor array. The capacitive sensor array may include a number of large sensor electrodes that can be used as column sensor electrodes. The capacitive sensor array may include a number of small sensor electrodes. The small sensor electrodes may be used as row sensor electrodes. The large sensor electrodes and the small sensor electrodes may be formed in a single layer of conductive material. US 2014 / 0168154 A1 discloses a capacitive in-cell touch panel and display device, wherein a touch sensor electrode Rx and a touch drive electrode Tx are arranged on the same layer. SUMMARY

[0006] In order to improve the display and touch performance of a conventional display panel, an array substrate and a display panel are provided.

[0007] According to one aspect of the present disclosure, an array substrate is provided. The array substrate includes a plurality of common electrodes insulated from each other; and a plurality of signal lines including a first signal line and a second signal line, wherein the plurality of signal lines are located in a different layer than the plurality of common electrodes, and wherein an insulator layer is provided between the plurality of common electrodes and the plurality of signal lines. One end of the first signal line and one end of the second signal line are each connected to one of the plurality of common electrodes; the other end of the first signal line and the other end of the second signal line are electrically connected to a drive chip; the first signal line and the second signal line are insulated from common electrodes that are not electrically connected to their ends.a common electrode insulated from the first signal line and having a first gap in a portion facing the first signal line; a common electrode insulated from the second signal line and having a second gap in a portion facing the second signal line; a resistance of the first signal line is greater than a resistance of the second signal line; a first deviation distance exists between a projection of the first signal line into a plane of the plurality of common electrodes and a center position of the first gap; a second deviation distance exists between a projection of the second signal line into the plane of the plurality of common electrodes and a center position of the second gap; and the first deviation distance is smaller than the second deviation distance.

[0008] According to another aspect of the present disclosure, a display panel is provided. The display panel includes the array substrate described above.

[0009] Compared with conventional technology, embodiments of the present disclosure have the following advantages. The array substrate of the present disclosure includes a plurality of common electrodes, a first signal line, and a second signal line. A common electrode insulated from the first signal line has a first gap in a portion facing the first signal line, and a common electrode insulated from the second signal line has a second gap in a portion facing the second signal line. A resistance of the first signal line is greater than a resistance of the second signal line.There is a first deviation distance between a projection of the first signal line onto a plane of the plurality of common electrodes and a center position of the first gap. There is a second deviation distance between a projection of the second signal line onto the plane of the plurality of common electrodes and a center position of the second gap. The first deviation distance is smaller than the second deviation distance. Because the first deviation distance is smaller than the second deviation distance, noise picked up by the array substrate during a touch sensing phase can be reduced, and the touch performance of the array substrate can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] To clearly illustrate the technical solution of the present disclosure, the figures used in the description of embodiments of the present disclosure are briefly described below. Of course, these figures relate only to preferred embodiments of the present disclosure, and various modifications may be made by those skilled in the art without departing from the spirit or scope of this disclosure. Fig. 1 schematically illustrates an image of an array substrate; Fig. 2 schematically illustrates an illustration of an array substrate according to an embodiment of the present disclosure; Fig. Figure 3 schematically shows an enlarged partial view of the array substrate in Fig. 2; Fig. 4 schematically illustrates an illustration of an array substrate according to another embodiment of the present disclosure; Fig. Figure 5 schematically shows an enlarged partial view of the array substrate in Fig. 4; Fig. Fig. 6 schematically shows a relation curve between a distance from a signal line to two sides of a gap and a capacitance of the signal line of the array substrate in Fig. 4; Fig. 7 schematically illustrates an illustration of an array substrate according to another embodiment of the present disclosure; Fig. 8 schematically illustrates an illustration of an array substrate according to another embodiment of the present disclosure; Fig. Figure 9 schematically shows an enlarged partial view of the array substrate in Fig. 8; and Fig. 10 schematically illustrates an illustration of a display panel according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0011] An array substrate is shown schematically in Fig. 1. The array substrate includes a common electrode layer (not shown), the common electrode layer being divided into a plurality of common electrodes 101. Each common electrode 101 is insulated from the others. Each common electrode 101 is connected to a drive chip (IC) 104 via a signal line 103. The various signal lines 103 are insulated from one another, and each signal line 103 is electrically connected to a corresponding common electrode 101 through a via opening 102 in an insulator layer (not shown). When the display panel is in a display phase, all of the common electrodes 101 are applied with the same common voltage, and when the display panel is in a touch phase, a voltage signal for touch detection is applied to the common electrodes 101, which serve as self-capacitive touch electrodes.

[0012] In the array substrate, the width of the display area is always larger than the width of the drive chip 104 for connecting the signal lines 103. Therefore, the metal lines between the common electrodes 101 and the drive chip 104 always have a fan-out area 105 (the fan-out area is in Fig. 1 shown in a dashed box).

[0013] There are two reasons that lead to different lengths of different signal lines 103. First, the distances between the drive chip 104 and different common electrodes 101 are different, so different signal lines 103 in the display area have different lengths. Second, the different signal lines 103 have inconsistent bending arrangements in the fan-out area 105. Furthermore, the different lengths of the signal lines 103 can lead to different resistances of the signal lines 103. Therefore, even if all capacitances between the signal lines 103 and the common electrodes 101 are the same, the products RC of the capacitance and resistance of the signal lines 103 are different.If different signal lines 103 have different RC values, noise may increase during a touch sensing phase, which may increase the difficulty in identifying sensing signals. In the worst case, a touch may not be detected. Additionally, if the RC values ​​between different signal lines 103 are too large, the voltages applied to different common electrodes 101 may not be synchronized during the display phase of the common electrodes 101, which may lead to problems such as uneven flickering, residual images, brightening of black images, etc.

[0014] In order to clearly explain the objects, features and advantages of the disclosure, the embodiments of the present disclosure will be described in detail in conjunction with the accompanying drawings.

[0015] In embodiments of the present disclosure, an array substrate is provided. The array substrate has a plurality of common electrodes that are insulated from each other. The array substrate further has a plurality of signal lines. Each of the plurality of common electrodes is electrically connected to one end of one of the plurality of signal lines, and the other end of the signal line is electrically connected to a drive chip (see Fig. 1).

[0016] In this embodiment, the signal line is insulated from other common electrodes that are not electrically connected to it. Each common electrode has a gap in a portion facing the signal line that is insulated from it. Specifically, each common electrode is electrically connected to one end of a touch signal line and is insulated from the other touch signal lines. Here, when a signal line is not electrically connected to a common electrode and the common electrode includes a portion facing the signal line, the portion of the common electrode facing the signal line has a gap.

[0017] In this embodiment, the common electrodes serve as display electrodes in a display phase, and as self-capacitive touch electrodes in a touch sensing phase. Specifically, when a display panel with the array substrate operates in a display phase, a common voltage is applied to all common electrodes; and when the display panel with the array substrate operates in a touch phase, the common electrodes function as self-capacitive electrodes and are applied with touch sensing voltages.

[0018] With reference to Fig. 2 is an illustration of a portion of an array substrate according to an embodiment of the present disclosure. In Fig. 2, a common electrode 211, a common electrode 212, a common electrode 213, a common electrode 214, and a signal line 220 are shown. A common electrode electrically connected to the signal line 220 is shown in Fig. 2 is not shown. The common electrode 211, the common electrode 212, the common electrode 213, and the common electrode 214 are insulated from the signal line 220. Therefore, a portion of the common electrode 211, the common electrode 212, the common electrode 213, and the common electrode 214 facing the signal line 220 each has a gap, as shown in Fig. 2. The common electrode 211 has a gap 2110, the common electrode 214 has a gap 2140, and the gap areas of the common electrode 211 and the common electrode 213 are shown in Fig. 2 not designated.

[0019] It should be noted that the Fig. 2 is a projection into a plane of the common electrodes. The common electrode 211, the common electrode 212, the common electrode 213, and the common electrode 214 are located in a different layer than the signal line 220. In particular, an insulator layer (not shown) is arranged between the common electrodes 211, 212, 213, and 214 and the signal line 220. The insulator layer can provide a good insulation effect between them.

[0020] It should be noted that each of the common electrodes in Fig. 2 has a left section and a right section on both sides of the gap, and an element for electrically connecting the left and right sections in Fig. 2 is not shown. However, the common electrode 211, which is shown as left and right sections in Fig. 2, is actually electrically connected as a whole. The gap does not separate the entire common electrode. For example, the common electrode 211 has an element (not shown) for connecting the two sections in Fig. 2 on.

[0021] With reference to Fig. 3 is an enlarged partial view of a Fig. 2 shown, dashed box 211A. A projection of the signal line 220 into the plane of the common electrodes is located in the gap 2110. In Fig. 3, a dashed line 220c is used to represent a width bisector of the projection, and a dashed line 2110c is used to represent a width bisector of the gap 2110. There is a deviation D1 between the two bisectors.

[0022] It should be noted that a width of a component in this embodiment refers to the size of the component in the horizontal direction.

[0023] In this embodiment, when a signal line has a higher resistance, a projection of the signal line into the plane of the common electrodes can more closely approximate a center position of the gap. This is because when the signal line has a higher resistance, the deviation D1 is smaller.

[0024] By controlling the deviation D1, differences in RC values ​​(R represents resistance, C represents capacitance, and RC represents the product of resistance and capacitance) between different signal lines can be reduced. If a signal line with a high resistance is not adjusted, the RC value of the signal line may be large, resulting in a larger RC difference between that signal line and other signal lines.In this embodiment, the projection position of the high-resistance signal line onto the common electrode plane is adjusted to approach the center position of the common electrode gap, thereby reducing the capacitance between the signal line and the common electrode, reducing the RC value of the high-resistance signal line, and reducing or even eliminating differences between the high-resistance signal line and other signal lines. Therefore, each signal line can have the same RC value, reducing the noise picked up by the array substrate during the touch sensing phase, and protecting the array substrate from problems such as uneven flickering, residual image, black image fading, etc.can be preserved, and the display performance of the display panel with the array substrate can be improved.

[0025] Namely, in the array substrate of this embodiment, there is a first signal line with a large resistance and a second signal line with a small resistance. A common electrode insulated from the first signal line has a first gap on a side facing the first signal line, and a common electrode insulated from the second signal line has a second gap on a side facing the second signal line. There is a first deviation between a projection of the first signal line on a plane of the common electrodes and a center position of the first gap, and there is a second deviation between a projection of the second signal line on the plane of the common electrodes and a center position of the second gap. In this embodiment, the first deviation is made smaller than the second deviation.

[0026] When the first deviation is smaller than the second deviation, a first capacitance between the first signal line and the common electrode is smaller than a second capacitance between the second signal line and the common electrode. Therefore, even if the resistance of the first signal line is greater than that of the second signal line, the difference between the RC values ​​of the first signal line and the second signal line can be small. This difference can be reduced. Accordingly, the noise picked up by the array substrate during the touch sensing phase can be reduced, and the touch and display performance of a display panel including the array substrate can be improved.

[0027] In other embodiments of the present disclosure, another array substrate is provided. The array substrate includes: a plurality of common electrodes insulated from each other; and a plurality of signal lines, wherein each of the plurality of electrodes is electrically connected to one end of one of the plurality of signal lines, and the other end of the signal line is electrically connected to a drive chip. The signal line is insulated from the other common electrodes that are not electrically connected to it. A common electrode has a gap in a portion facing the signal line insulated from it. There is a deviation between a projection of each of the plurality of signal lines onto a plane of the common electrodes and a center position of the corresponding gap. The larger the signal line resistance, the smaller the corresponding deviation.

[0028] In another embodiment of the present disclosure, another array substrate is provided. The array substrate has a plurality of common electrodes that are insulated from each other. The array substrate further has a plurality of signal lines. Each of the plurality of common electrodes is electrically connected to one end of one of the plurality of signal lines, and the other end of the signal line is electrically connected to a drive chip (see Fig. 1).

[0029] In this embodiment, the signal line is insulated from other common electrodes that are not electrically connected to it. A common electrode has a gap in a portion facing the signal line that is electrically insulated from it. Specifically, each common electrode is electrically connected to only one of the plurality of signal lines and is insulated from the other signal lines. Here, when a signal line is not electrically connected to a common electrode and the common electrode includes a portion facing the signal line, the portion of the common electrode facing the signal line has a gap.

[0030] In this embodiment, the common electrodes serve as display electrodes in a display phase and as self-capacitive touch electrodes in a touch sensing phase. Specifically, when a display panel including the array substrate operates in a display phase, all common electrodes are applied with a common voltage; and when the display panel including the array substrate operates in a touch phase, the common electrodes function as self-capacitive electrodes and are applied with touch sensing voltages.

[0031] In this embodiment, a plurality of common electrodes are arranged in an array having M rows and N columns, where M and N are integers greater than 1. With respect to the M common electrodes in the same column, a k-th common electrode is electrically connected to a k-th signal line, where k is an integer between 1 and M.

[0032] With reference to Fig. 4 shows a part of an array substrate of this embodiment. Fig. Figure 4 illustrates a plurality of common electrodes arranged in an array. The plurality of common electrodes includes a common electrode 311, a common electrode 312, a common electrode 313, and a common electrode 314. Fig. 4, a signal line 320 is also shown. Not shown is a common electrode that is electrically connected to the signal line 320. The common electrode 311, the common electrode 312, the common electrode 313, and the common electrode 314 are insulated from the signal line 320. Therefore, as shown in Fig. 4, a portion of the common electrode 311, the common electrode 312, the common electrode 313, and the common electrode 314 facing the signal line 320 each has a gap. For example, the common electrode 311 has a gap 3110, the common electrode 314 has a gap 3140, and the gap regions of the common electrode 312 and the common electrode 313 are Fig. 4 not shown.

[0033] Fig. 4 also illustrates a plurality of second common electrodes arranged in an array and comprising a common electrode 331 and a common electrode 332. Fig. 4 also shows a signal line 340. Not shown is a common electrode that is electrically connected to the signal line 340. The common electrode 331 and the common electrode 332 are insulated from the signal line 340. Therefore, as shown in Fig. As shown in Figure 4, a portion of the common electrode 331 and the common electrode 332 facing the signal line 220 each has a gap. For example, the common electrode 331 has a gap 3310, and the common electrode 332 has a gap 3320.

[0034] It should be noted that the Fig. The signal lines 320 and 340 shown in Figure 2 are projections into the plane of the common electrodes. Although the common electrode and the signal line are electrically connected, they are located in different layers. In particular, an insulator layer (not shown) is arranged between the common electrodes and the signal line. The insulator layer can provide good insulation between them. The signal lines are electrically connected to the common electrodes via vias in the insulator layer.

[0035] In this embodiment, the common electrode electrically connected to the signal line 320 is located far away from the control chip (see Fig. 1, the drive chip is provided under the display surface), while the common electrode, which is electrically connected to the signal line 340, is located close to the drive chip. Therefore, the length of the signal line 320 is greater than the length of the signal line 340, that is, the resistance of the signal line 320 is greater than the resistance of the signal line 340.

[0036] It should be noted that each of the common electrodes in Fig. 4 has a left section and a right section on either side of the gap, with an element for electrically connecting the left and right sections in Fig. 4 is not shown. However, each common electrode used in Fig. 4 as the left and right sections, are actually electrically connected overall. The common electrode is not completely separated by the gap. For example, each common electrode in Fig. 4 an element (not shown) to connect the two sections.

[0037] In this embodiment, the farther a common electrode is from the drive chip, the closer the signal line electrically connected to the common electrode comes to a center position of the gap. Therefore, in this embodiment, the signal line 320 comes closer to the center position of the gap, while the signal line 340 is far away from the center position of the gap. For further details on the reason for this, refer to the descriptions of the above embodiments or the descriptions of the following. Fig. 5 and Fig. 6.

[0038] In this embodiment, the difference between two average distances from the kth signal line to two sides of the gap is larger as the kth common electrode approaches the drive chip. The reason for this is also related to the descriptions of the following Fig. 5 and Fig. 6 together.

[0039] With reference to Fig. 5 shows two enlarged partial views of a dashed box 311A ​​and a dashed box 331A, which are shown in Fig. 4, with the two enlarged views separated by a dot-dash line. Two average distances from a projection of the signal line 320 into the common electrode plane on either side of the gap 3110 are denoted as D2 and D3. Two average distances from a projection of the signal line 340 into the common electrode plane on either side of the gap 3310 are denoted as D4 and D5.

[0040] It should be noted that in this embodiment the Fig. 5, the two sides of the gap refer to the two opposite sides in the horizontal direction.

[0041] In this embodiment, by controlling the average distances D2, D3, D4 and D5, the difference between RCs values ​​of the signal line 320 and the signal line 340 is controlled. The reason for this will be explained below with reference to Fig. 6 described.

[0042] In Fig. Figure 6 shows the relationship between the capacitance C and the average distances D2, D4. The sum of the average distance D2 and the average distance D3 is set to 6.25 µm, and the sum of the average distance D4 and the average distance D5 is also set to 6.25 µm. The capacitance C represents a capacitance between the signal line 320 or the signal line 340 and their corresponding common electrode.

[0043] In Fig. 6 shows that there is a relationship between the signal line (signal line 320 or signal line 340) and its corresponding gap (gap 3110 or gap 3310): the closer the projection approaches the two sides of the gap, the larger the capacitance between the signal line and its corresponding common electrode. Specifically, the closer the signal line approaches the center position of the gap, the smaller the capacitance between the signal line and its corresponding common electrode.

[0044] As in Fig. In other words, as shown in Figure 5, the greater the difference between the average distance D2 and the average distance D3, the larger the capacitance between the signal line and its corresponding common electrode; the smaller the difference between the average distance D2 and the average distance D3, the smaller the capacitance between the signal line and its corresponding common electrode. Similarly, the greater the difference between the average distance D4 and the average distance D5, the larger the capacitance between the signal line and its corresponding common electrode; the smaller the difference between the average distance D4 and the average distance D5, the smaller the capacitance between the signal line and its corresponding common electrode.

[0045] It can be seen that when the resistance of the signal line 320 is greater than the resistance of the signal line 340, the difference between the mean distance D4 and the mean distance D5 is designed to be greater than the difference between the mean distance D2 and the mean distance D3 (as in Fig. 5), so that a difference between the RC value of the signal line 320 and the RC value of the signal line 340 can be reduced.

[0046] In this embodiment, each signal line has an inherent resistance and a capacitance with the common electrodes, which are insulated from it. The RC value represents a product of the resistance and the capacitance. The ratio of the maximum RC value to the minimum RC value of the multiple signal lines is in the range of 1 to 1.2.

[0047] As in Fig. 4 and Fig. For example, as shown in Figure 5, the ratio of the RC value of signal line 320 to the RC value of signal line 340 is in a range of 1 to 1.2. By setting the ratio of the maximum RC value to the minimum RC value of the plurality of signal lines to be in a range of 1 to 1.2, the RC difference can be controlled to a desired extent in this embodiment, thereby improving the electrical performance of the array substrate.

[0048] It should be noted that in other embodiments of the present disclosure, the plurality of common electrodes are arranged in an array of M rows and N columns, where M and N are integers greater than 1. A common electrode in the m-th row and the n-th column is referred to as an (m×n)-th common electrode and is electrically connected to an (m×n)-th signal line, where m is an integer from 1 to M-1 and n is an integer from 1 to N. There are gap regions in portions of the common electrodes from the ((m+1)×n)-th to the M-th common electrode that face the (m×n)-th signal line. The (m×n)-th signal line has an (m×n)-th intrinsic resistance, and there is an (m×n)-th capacitance between the (m×n)-th signal line and the common electrodes from the ((m+1)×n)-th to the M-th electrode. RC (m×n)represents a product of the (m×n)-th resistance and the (m×n)-th capacitance. A ratio of the maximum to the minimum value of the RC values ​​of RC (1×1) to RC ((M-1)×N) is in the range of 1 to 1.2.

[0049] In other embodiments of the present disclosure, another array substrate is provided. The array substrate has a plurality of common electrodes that are insulated from each other. The array substrate further includes a plurality of signal lines. Each of the plurality of common electrodes is electrically connected to one end of one of the plurality of signal lines, and the other end of the signal line is electrically connected to a drive chip (see Fig. 1).

[0050] In this embodiment, the signal line is insulated from other common electrodes that are not electrically connected to it. The common electrode has a gap in a portion facing the signal line that is insulated from it. Specifically, each common electrode is electrically connected to one end of one of the plurality of signal lines and is insulated from the other touch signal lines. Here, when a signal line is not electrically connected to a common electrode and the common electrode has a portion facing the signal line, the portion of the common electrode facing the signal line includes a gap.

[0051] In this embodiment, the common electrodes serve as display electrodes in a display phase, or as self-capacitive touch electrodes in a touch sensing phase. Specifically, when a display panel with the array substrate operates in a display phase, all common electrodes are applied with a common voltage; and when the display panel with the array substrate operates in a touch phase, the common electrodes function as self-capacitive electrodes and are applied with voltages for touch sensing.

[0052] In this embodiment, the plurality of common electrodes are arranged in an array having M rows and N columns, where M and N are integers greater than 1. With respect to the M common electrodes in the same column, a k-th common electrode is electrically connected to a k-th signal line, where k is an integer between 1 and M.

[0053] With reference to Fig. 7 shows a part of an array substrate of this embodiment. Fig. Figure 7 illustrates a plurality of common electrodes arranged in an array. Specifically, the plurality of common electrodes includes a common electrode 411 in the second row. Fig. Figure 7 also shows signal lines 420 connecting the common electrodes in the first row, but the common electrodes in the first row are not shown. The common electrode 411 is insulated from the signal line 420. Therefore, as shown in Fig. 7, a portion of the common electrode 411 facing the signal line 420 has a gap 4110.

[0054] In Fig. 7 also shows a plurality of second common electrodes arranged in an array including a common electrode 431 in the M-th row. A signal line 440 is shown, and the signal line 440 is electrically connected to common electrodes (not shown) in the (M-1)th row. The common electrode 431 is insulated from the signal line 440. Therefore, as shown in Fig. 7, a portion of the common electrode 430 facing the signal line 440 has a gap 4310.

[0055] It should be noted that the Fig. The signal lines 420 and 440 shown in Figure 7 are projections into the plane of the common electrodes. Although the common electrode and the signal line are electrically connected, they are located in different layers. In particular, an insulator layer (not shown) is provided between the common electrodes and the signal line. The insulator layer can provide a good insulation effect between them. The signal lines are electrically connected to the common electrodes via via holes in the insulator layer.

[0056] In this embodiment, average distances from the signal line electrically connected to the common electrodes in the first row to both sides of the gap are substantially equal. As shown in Fig. 7, the average distances from the signal line to both sides of the gap 4110 are substantially equal. In this case, according to the descriptions of the above embodiments and Fig. 6, the capacitance between the signal line 420 and the common electrode has a minimum value. Because the signal line 420 is electrically connected to the common electrodes in the first row, the signal line 420 has the longest length, that is, the signal line 420 has the greatest resistance. By controlling the center distance D6, the signal line 420 with the highest resistance can achieve a minimum capacitance, so that the RC difference between the signal line 420 and other signal lines can be reduced.

[0057] In this embodiment, compared to other common electrodes in the same row, a difference in average distances from the signal line connected to the common electrodes in the (M-1)th row to both sides of the gap has the largest value. As shown in Fig. 7, the difference between an average distance D7 and an average distance D8 from the signal line 440 to both sides of the gap 4310 has the largest value. In this case, according to the descriptions of the above embodiments and according to Fig. 6, the capacitance between the signal line 440 and the common electrode is the largest. Because the signal line 440 is electrically connected to the common electrodes in the Mth row (the last row), the signal line 440 has the shortest length, that is, the signal line 440 has the smallest resistance. By controlling the center distances D7 and D8, the signal line 440 with the smallest resistance can obtain the largest capacitance, thus reducing the RC difference between the signal line 440 and the other signal lines, and improving the touch and display performance of the display panel.

[0058] In other embodiments of the present disclosure, another array substrate is provided. The array substrate has a plurality of common electrodes that are insulated from each other. The array substrate further includes a plurality of signal lines. Each of the plurality of common electrodes is electrically connected to one end of one of the plurality of signal lines, and the other end of the signal line is electrically connected to a drive chip (see Fig. 1).

[0059] In this embodiment, the signal line is insulated from other common electrodes that are not electrically connected to it. The common electrode has a gap in a portion facing the signal line that is insulated from it. Specifically, each common electrode is electrically connected to one end of one of the plurality of signal lines and is insulated from the other touch signal lines. Here, when a signal line is not electrically connected to a common electrode and the common electrode includes a portion facing the signal line, the portion of the common electrode facing the signal line has a gap.

[0060] In this embodiment, the common electrodes serve as display electrodes in a display phase, and as self-capacitive touch electrodes in a touch sensing phase. Specifically, when a display panel including the array substrate operates in a display phase, all common electrodes are applied with a common voltage; and when the display panel including the array substrate operates in a touch phase, the common electrodes function as self-capacitive electrodes and are applied with touch sensing voltages.

[0061] With reference to Fig. 8 illustrates a part of an array substrate of this embodiment. In Fig. 8, a common electrode 511, a common electrode 512, a common electrode 513, a common electrode 514, and a signal line 520 are shown. A common electrode electrically connected to the signal line 520 is shown in Fig. 8 is not illustrated. The common electrode 511, the common electrode 512, the common electrode 513 and the common electrode 514 are insulated from the signal line 520. Therefore, as shown in Fig. 8, a portion of the common electrode 511, the common electrode 512, the common electrode 513, and the common electrode 514 facing the signal line 520 each has a gap. The common electrode 511 has a gap 5110, and the gap regions of the common electrodes 511, 512, and 513 are shown in Fig. 8 not marked.

[0062] It should be noted that the Fig. The signal line 520 shown in Figure 8 is a projection onto a plane of the common electrodes. The common electrode 511, the common electrode 512, the common electrode 513, and the common electrode 514 are located in a different layer than the signal line 520. In particular, an insulator layer (not shown) is disposed between the common electrodes 511, 512, 513, and 514 and the signal line. The insulator layer can provide a good insulation effect between them.

[0063] It should be noted that each of the common electrodes in Fig. 8 has a left section and a right section on either side of the gap, wherein an element for electrically connecting the left and right sections is not shown. The common electrode 511, which in Fig. 8 as a left section and a right section, is actually electrically connected as a whole. Namely, the gap 5110 does not separate the entire common electrode 511. For example, the common electrode 511 in Fig. 8 has an element (not shown) to connect the two sections.

[0064] With reference to Fig. 9 is an enlarged partial view of a Fig. 8. A projection of the signal line 520 lies in a plane of the common electrode. The projection of the signal line 520 overlaps with a portion of the common electrode 511 on both sides of the gap 5110. An overlap area on one side is denoted by S1, and an overlap area on the other side is denoted by S2.

[0065] In this embodiment, by arranging the signal line 520 at a position far from the center position or near the center position of the gap 5110, the areas S1 and S2 can be adjusted. The reason for this will be described below. Because a sum of the area S1 and the area S2 is a constant value, a plate capacitance formed by the signal line 520 and the common electrode remains basically unchanged during the adjustment of the area S1 and the area S2. However, if the areas S1 and S2 are set to be equal, the average distances from the two sides of the signal line 520 to the two sides of the gap 5110 are equal. In this case, according to the Fig. 6, a marginal capacitance between the signal line 520 and the common electrode has the largest value. Therefore, by adjusting the area S1 and the area S2, the RC value of the signal line 520 can be controlled, so that an RC difference between the signal line 520 and other signal lines can be reduced and the touch and display performance of the display panel can be improved.

[0066] It should be noted that in other embodiments, the projection of the signal line into the plane of the common electrodes does not overlap with the common electrode on both sides of the gap.

[0067] In embodiments of the present disclosure, a display panel is also provided. With reference to Fig. 10, the display panel includes a first substrate 601 and a second substrate arranged opposite each other. The second substrate may be the array substrate provided in the above embodiments, so the structure and characteristics of the second substrate 602 in the above embodiments and in Fig. 2-9. Furthermore, a liquid crystal display layer or an OLED display layer may be arranged between the first substrate 601 and the second substrate 602.

[0068] Because the display panel of this embodiment incorporates the array substrate described above, the display panel has both a touch function and a display function. Furthermore, because the RC differences between different signal lines are small, detection signal noise in the touch detection phase, as well as problems such as uneven flickering, residual images, or black image fading, do not occur. Therefore, the display performance of the display panel is improved.

[0069] Although the present disclosure has been disclosed above with reference to preferred embodiments thereof, it should be apparent to those skilled in the art that various changes may be made without departing from the spirit or scope of the disclosure. Accordingly, the present disclosure is not limited to the disclosed embodiments.

Claims

[1] Array substrate comprising: a plurality of common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) which are insulated from one another; and a plurality of signal lines (220; 320, 340; 420, 440; 520) comprising a first signal line (320) and a second signal line (340), wherein the plurality of signal lines (220; 320, 340; 420, 440; 520) are located in a different layer than the plurality of common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) and wherein an insulator layer is provided between the plurality of common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) and the plurality of signal lines (220; 320, 340; 420, 440; 520), wherein one end of the first signal line (320) and one end of the second signal line (340) are each connected to one of the plurality of common electrodes; the other end of the first signal line (320) and the other end of the second signal line (340) are electrically connected to a drive chip; the first signal line (320) and the second signal line (340) are insulated from common electrodes that are not electrically connected to their ends; a common electrode insulated from the first signal line (320) has a first gap (3110) in a portion facing the first signal line (320); a common electrode insulated from the second signal line (340) has a second gap (3310) in a portion facing the second signal line (340); a resistance of the first signal line (320) is greater than a resistance of the second signal line (340);a first deviation distance exists between a projection of the first signal line (320) into a plane of the plurality of common electrodes and a center position of the first gap (3110); a second deviation distance exists between a projection of the second signal line (340) into the plane of the plurality of common electrodes and a center position of the second gap (3310); and the first deviation distance is smaller than the second deviation distance.; [2] The array substrate according to claim 1, wherein the plurality of common electrodes (211, 212, 213, 214; 311, 312, 313, 314; 331, 332; 411, 431; 511, 512, 513, 514) are each electrically connected to one end of one of the plurality of signal lines (220; 320, 340; 420, 440; 520); the other end of the signal line is electrically connected to the drive chip; the signal line is insulated from common electrodes that are not electrically connected to its ends; and each of the common electrodes that is insulated from the signal line has a gap in a portion facing the first signal line; and wherein, for more than one signal line, there are deviation distances between their projections onto the plane of the plurality of common electrodes and center positions of their corresponding gap regions; and the corresponding deviation distance of the signal line is smaller the greater the resistance of the signal line is. [3] The array substrate according to claim 2, wherein the deviation distance corresponding to the signal line electrically connected to the common electrode is smaller the farther the common electrode is from the drive chip. [4] The array substrate according to claim 1, wherein each of the plurality of signal lines (220; 320, 340; 420, 440; 520) has an intrinsic resistance, a capacitance exists between the signal line and common electrodes insulated from the signal line, and a product of the resistance and the capacitance is RC; and wherein a ratio of a maximum value to a minimum value of RCs corresponding to more than one signal line ranges from 1 to 1.

2. [5] The array substrate according to claim 2, wherein the plurality of common electrodes (411, 431) are arranged in an array of M rows and N columns, where M and N are integers greater than 1; and wherein, for M common electrodes in the same column, a k-th common electrode is electrically connected to a k-th signal line, the difference between two average distances from the k-th signal line to two sides of the gap is larger as the k-th common electrode approaches the drive chip, and k is an integer between 1 and M. [6] The array substrate according to claim 5, wherein two average distances from the first signal line to two sides of the gap are equal. [7] The array substrate according to claim 5, wherein a difference between two average distances from the (M-1)th signal line to two sides of the gap has a maximum value. [8] The array substrate according to claim 2, wherein the projection of the signal line (520) into the plane of the common electrodes (511, 512, 513, 514) covers a portion of the common electrode on two sides of the gap. [9] The array substrate according to claim 2, wherein the projection of the signal line into the plane of the common electrodes does not cover the common electrode on two sides of the gap. [10] An array substrate according to claim 4, wherein the plurality of common electrodes (411, 431) are arranged in an array of M rows and N columns, and M and N are integers greater than 1; wherein a common electrode in the m-th row and n-th column is referred to as an (mxn)-th common electrode and is electrically connected to an (mxn)-th signal line, where m is an integer from 1 to M-1 and n is an integer from 1 to N; wherein a gap exists in a portion of each of the common electrodes from the ((m+1)×n)-th to the M-th common electrode facing the (m×n)-th signal line, wherein the (m×n)-th signal line has an (m×n)-th intrinsic resistance, an (m×n)-th capacitance exists between the (m×n)-th signal line and the common electrodes from the ((m+1)×n)-th to the M-th common electrode, RC (m×n) represents a product of the (m×n)-th resistance and the (m×n)-th capacitance, and a ratio of a maximum value to a minimum value of RCs of RC (1×1) to RC ((M-1)×N) in the range of 1 to 1.

2. [11] The array substrate according to any one of claims 1-10, wherein the plurality of common electrodes serve as display electrodes in a display phase, or serve as self-capacitive touch electrodes in a touch sensing phase. [12] A display panel comprising: the array substrate according to any one of claims 1-11.

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