Coordinated storage of operating data between multiple voltage regulators in response to a fault condition

Abstract

Procedure (70), comprising that: a plurality of voltage regulators distribute energy to a plurality of components within a computer node (72), each of the voltage regulators comprising a controller, volatile memory and non-volatile memory; the controller of each voltage regulator temporarily stores operating data for the voltage regulator in the volatile memory of the voltage regulator (74), wherein the controller temporarily stores the operating data acquired by the voltage regulator during a rolling period; a first voltage regulator from the multitude of voltage regulators detects a fault event (76); the controller of each voltage regulator receives a message of the fault event (78); and In response to receiving the fault event message, the controller of each voltage regulator automatically copies the cached operating data for the voltage regulator from the voltage regulator's volatile memory to the voltage regulator's non-volatile memory (80).

Description

BACKGROUND Area of ​​the invention

[0001] The present invention relates to the energy distribution comprising several voltage regulators and an analysis of available operating data for the voltage regulator after a fault condition. General state of the art

[0002] Any given node in a computer system, such as a server or a network switch, can contain multiple voltage regulators to supply various components with the correct voltage. These voltage regulators can operate in series or parallel, as needed, to distribute power from a power supply to the various components on one or more levels.

[0003] Voltage regulators are the components most prone to failure in a server. A voltage regulator can fail for many different reasons, including component defects, wear and tear, acute or prolonged exposure to environmental stressors, and thermal or electrical stress. Unfortunately, it is often very difficult and time-consuming to determine or reconstruct the causes of a voltage regulator failure after the fact.

[0004] Publication US 2005 / 0180065A1 describes a system and procedure for fault handling in a power supply system. Load point controllers are assigned to virtual groups according to the characteristics of the loads they supply. If a fault condition occurs in one of the load point controllers, corrective actions to resolve the fault condition can be selectively applied to other load point controllers in the same group in a similar manner. If the fault is severe, the fault condition can be propagated to other groups to implement uniform corrective actions.

[0005] Publication US 2008 / 0072080A1 describes a power control system with a plurality of point-of-load (POL) controllers, at least one serial data bus that operationally connects the plurality of POL controllers, and a system controller that is connected to the serial data bus and can send and receive digital data to and from the plurality of POL controllers. The serial data bus also includes a first data bus that transmits programming and control information between the system controller and the plurality of POL controllers. The serial data bus may also include a second data bus that transmits fault management information between the system controller and the plurality of POL controllers. SUMMARY

[0006] The object of the present invention is to enable an improved analysis of available operating data for a voltage regulator after a fault condition.

[0007] This problem is solved by the subject matter of main claim 1 and dependent claim 17, which define the present invention.

[0008] Preferred embodiments of the present invention are the subject of the dependent claims.

[0009] One embodiment of the present invention provides a system comprising a plurality of voltage regulators in a power distribution system within a computer node, wherein each of the voltage regulators comprises a controller, a volatile memory for temporarily buffering operating data for the voltage regulator during a sliding period, an open-drain output which is reduced to a low voltage in response to a fault event at the voltage regulator, and a non-volatile memory for storing a copy of the buffered operating data.The system further comprises a common signal line coupled to the open-drain output of each of the plurality of voltage regulators, such that a fault in one of the plurality of voltage regulators results in a low voltage on the common signal line, which is to be detected by each of the other voltage regulators, wherein the non-volatile memory of each voltage regulator stores a copy of the cached operating data stored in the volatile memory of the voltage regulator in response to one of the plurality of voltage regulators detecting a fault event.

[0010] Another embodiment of the present invention provides a method comprising a plurality of voltage regulators that distribute power to a plurality of components within a computer node, each voltage regulator comprising a controller, volatile memory, and non-volatile memory. The controller of each voltage regulator temporarily stores operating data for the voltage regulator in the voltage regulator's volatile memory, the controller temporarily buffering the operating data acquired by the voltage regulator during a rolling period.When the first voltage regulator among the multiple voltage regulators detects a fault event, the controller of each voltage regulator receives a message about the fault event and automatically copies the cached operating data for the voltage regulator from the voltage regulator's volatile memory to the voltage regulator's non-volatile memory in response to receiving a fault event message. BRIEF DESCRIPTION OF THE MULTIPLE VIEWS OF THE DRAWINGS

[0011] They show: Fig. 1 a diagram of a node comprising several voltage regulators for distributing energy to various components within the node. Fig. 2 a diagram of a voltage regulator. Fig. 3 a diagram of the voltage regulator from Fig. 2, comprising an embodiment of an interface with a common signal line. Fig. 4 a diagram of a hypothetical node comprising several voltage regulators, including a multi-stage voltage regulator, and a multi-phase voltage regulator master controller. Fig. 5 a flowchart of a method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0012] One embodiment of the present invention provides a system comprising a plurality of voltage regulators in a power distribution system within a computer node, wherein each of the voltage regulators comprises a controller, a volatile memory for temporarily buffering operating data for the voltage regulator during a sliding period, an open-drain output which is reduced to a low voltage in response to a fault event at the voltage regulator, and a non-volatile memory for storing a copy of the buffered operating data.The system further comprises a common signal line coupled to the open-drain output of each of the plurality of voltage regulators, such that a fault in one of the plurality of voltage regulators results in a low voltage on the common signal line, which is to be detected by each of the other voltage regulators, wherein the non-volatile memory of each voltage regulator stores a copy of the cached operating data stored in the volatile memory of the voltage regulator in response to one of the plurality of voltage regulators detecting a fault event.

[0013] In one option, one of the voltage regulators can have multiple power stages, with each power stage coupled to the common signal line. In another option, the multiple voltage regulators can include a first voltage regulator that distributes electrical power upstream of a second voltage regulator, a third voltage regulator downstream of the second voltage regulator, and a fourth voltage regulator in parallel with the second voltage regulator. In yet another option, the system can further include a management unit that communicates with the controller of each voltage regulator.

[0014] Another embodiment of the present invention provides a method comprising a plurality of voltage regulators that distribute power to a plurality of components within a computer node, each voltage regulator comprising a controller, volatile memory, and non-volatile memory. The controller of each voltage regulator temporarily stores operating data for the voltage regulator in the voltage regulator's volatile memory, the controller temporarily storing the operating data acquired by the voltage regulator during a rolling period.When the first voltage regulator among the multiple voltage regulators detects a fault event, the controller of each voltage regulator receives a message of the fault event and automatically copies the cached operating data for the voltage regulator from the volatile memory of the voltage regulator to the non-volatile memory of the voltage regulator in response to receiving the fault event message.

[0015] The cached operating data for each voltage regulator preferably includes operating data collected immediately before the fault event. Operating data collected during this period is particularly helpful in determining the cause of the fault condition. The operating data can include, without limitation, parameters selected from the group consisting of input voltage, output voltage, input current, output current, and temperature. Furthermore, the operating data can include parameters selected from fault status, power consumption per hour, power cycles or ON / OFF counts, device state, and the last known command.The fault event itself can be selected without restriction from input overvoltage fault, input undervoltage fault, power-good switching, output overvoltage fault, output undervoltage fault, overcurrent fault, catastrophic fault, overtemperature fault, software fault, firmware fault, configuration fault, initialization fault and internal voltage fault condition.

[0016] Each voltage regulator's controller can monitor the common signal line and receive a fault message in response to a change in the voltage on the common signal line. Conversely, any individual controller can control a circuit to reduce the voltage on the common signal line in response to a fault event occurring within the voltage regulator that comprises that individual controller.

[0017] In another embodiment of the method, the controller of each voltage regulator can send the operating data stored in non-volatile memory to a management unit within the computer node. For example, the management unit can be a base-plate management controller or an integrated management module. The management unit can analyze the operating data received from the controller of each voltage regulator to determine the cause of the fault event. Alternatively, the local management unit can forward the operating data received from the controller of each voltage regulator to a remote management unit, which receives and analyzes voltage regulator operating data from controllers of a multitude of nodes.The operating data from each voltage regulator in the system during the period immediately preceding the fault enables the local or remote management unit to more accurately determine the cause of the fault. In this respect, the procedure can be described as acquiring fault-synchronized black-box information from a voltage regulator network when one of the voltage regulators experiences a fault. Accordingly, the common signal line can be referred to as the black-box synchronization (BB_SYNC) line.

[0018] The common signal line can be connected to any controller at either an input or an open-drain output. It should be noted that a dual-function pin is preferred to save pins on the silicon package, but the input / output could be split into two pins. Furthermore, a controller could share this BB_SYNC signal equally among all phases (or power stages) within the controller, so that all failure-prone power stages within a controller are also connected to the common signal.

[0019] In the event of a qualifying fault, such as an electrical overload, the failing voltage regulator would reduce the open-drain BB_SYNC signal and simultaneously receive and store its own black-box information. At the same time, the HL transition of the BB_SYNC signal would be detected by all other voltage regulators in the network. Each voltage regulator would interpret the signal transition as an immediate command to also receive and store its own black-box information, regardless of whether a fault has occurred in any of the other voltage regulators. Thus, synchronized remote sensing information from all voltage regulators in the system containing the failing voltage regulator can be received and stored in non-volatile memory for later analysis.Having black-box information from the functioning controllers is advantageous for providing a particularly complete description of the events at the time of failure, and the information can also be used to confirm or refute information from the black box of the failing device.

[0020] Fig. Figure 1 is a diagram of a node 10, which includes several voltage regulators 20A-D for distributing power to various components or loads 12 within the node. Each voltage regulator 20A-D is included in a power distribution system by means of an input connected to a power source and an output connected to a load. The power source can be an external power supply or the output of another voltage regulator within the node. The load can be a power-consuming component of the node, such as a microprocessor or a memory module, or an input to another voltage regulator within the node. Each voltage regulator is also coupled to the common signal line 40 (i.e., BB_SYNC) for synchronizing data acquisition among the voltage regulators within the node.Furthermore, each voltage regulator is connected to a management unit 14 to send operating data in response to a fault condition within the node. Optionally, the local management unit 14 can also communicate with a remote management unit 16, which can also communicate with local management units of other nodes, each of which has its own shared signal line.

[0021] The voltage regulators are not restricted to a specific configuration within the power distribution system, as long as they are connected to the common signal line 40 and communicate with the management unit 14. Optionally, the voltage regulators could be arranged to have the same input network (i.e., 12 V) or a different network. Furthermore, the voltage regulators could all be used to regulate voltages for the same loads or system functions, or for different loads and system functions. Finally, the voltage regulators could all be located on the same level or in the same enclosure, or on different levels or in different enclosures.

[0022] In the non-restrictive example from Fig. Node 1 comprises 10 voltage regulators that are cascaded and voltage regulators that are connected in parallel. As an example of cascaded voltage regulators, a first voltage regulator 20A has an input coupled to an external 12V power source and a 3.3V output, a second voltage regulator 20B has an input coupled to the 3.3V output of the first voltage regulator 20A and a 1.0V output, and a third voltage regulator 20C has an input coupled to the 1.0V output of the second voltage regulator 20B and a 0.5V output. As an example of parallel-connected voltage regulators, the second voltage regulator 20B has an input coupled to the 3.3V output of the first voltage regulator 20A, but a fourth voltage regulator 20D also has an input coupled to the 3.3V output of the first voltage regulator 20A.Alternatively, the second and fourth voltage regulators could have different output voltages and still be considered as connected in parallel.

[0023] Fig. Figure 2 is a diagram of a voltage regulator 20, which is for one of the voltage regulators 20A-D from Fig. Figure 1 is representative. The voltage regulator 20 comprises a voltage control circuit 22, which has an input 21 at a first voltage and an output 23 at a second voltage. A controller 24 monitors the operation of the voltage control circuit 22 and stores current operating data in the volatile memory 26. Preferably, the controller 24 manages the volatile memory 26 such that it stores operating data only within a rolling period or window. For example, the current operating data may be stored for only a few seconds before being deleted according to the FIFO principle, since the most recent operating data at the time of a fault event is particularly relevant for determining what caused the fault event.The floating period can be a fixed time after the acquisition of the operating data or it can vary, for example, by storing the operating data in a fixed memory location. In response to the controller detecting a fault event in the voltage regulation circuit 22, the controller 24 can store the operating data currently located in the volatile memory 26 in the non-volatile memory 28. The operating data in the non-volatile memory 28 can be sent to a management unit via an interface 32.

[0024] The controller 24 also communicates with the common signal line 40 via an interface 30. Interface 30 monitors the voltage on the common signal line 40 to detect a signal indicating a fault in one of the voltage regulators. For example, one of the voltage regulators might reduce the voltage to cause a high-low voltage transition on the common signal line 40, thus providing a message that a fault event has just occurred. In response to the detection of such a high-low transition, the controller 24 automatically saves the operating data currently stored in the volatile memory 26 to the non-volatile memory 28. The operating data in the non-volatile memory 28 can then be sent to a management unit via an interface 32.To reduce the voltage on the common signal line 40, interface 30 can include a pull-down circuit. It is understood that each of the other voltage regulators 20 within node 10 (see . Fig. 1) may include “corresponding” or “linked” components, such as a corresponding voltage control circuit 22, a corresponding controller 24, a corresponding volatile memory 26, a corresponding non-volatile memory 28, a corresponding interface 32 with the management unit and a corresponding interface 30 with the common signal line.

[0025] Fig. Figure 3 is a diagram of the voltage regulator 20. Fig. 2, which includes an embodiment of the interface 30 with the common signal line 40 (BB_SYNC). The interface 30 includes the capability to both acknowledge and detect a fault on the common signal line 40. In response to the controller 24 determining that the voltage regulator circuit (VRC) 22 has experienced a fault, the controller 24 activates a signal 31 to a field-effect transistor (FET) 33, which selectively couples the common signal line 40 to ground. Accordingly, the individual controller 24 can reduce the voltage on the common signal line 40 in response to a fault.

[0026] Each of the voltage regulators 20 (see voltage regulator 20A-D in Fig. 1) which are coupled to the common signal line 40, can similarly reduce the voltage on the common signal line 40 in response to a fault. Therefore, the interface 30 of each voltage regulator 20 must be able to detect when the voltage on the common signal line 40 has been reduced by one of the voltage regulators 20. In the non-restrictive example from Fig. Interface 30 comprises an operational amplifier (“op-amp” or “comparator”) 35, which has an inverting input coupled to the common signal line 40 and a non-inverting input coupled to a voltage reference (Vref). Accordingly, the op-amp 35 generates an output signal on the signal detection line 36 to the controller 24 in response to the common signal line 40 having a voltage lower than the voltage reference. Thus, the controller 24 immediately and simultaneously stores the operating data of each voltage regulator 20 coupled to the common signal line 40 from the volatile memory 26 to the non-volatile memory 28.

[0027] Fig. Figure 4 is a diagram of several voltage regulators in a hypothetical node 50, which includes several single-stage voltage regulators 20. The node also includes a first multi-stage voltage regulator 52 with multiple power stages 54 and a multi-phase voltage regulator master controller 56, which monitors the power stages 54 and is coupled to the common signal line 40 (BB_SYNC). The first multi-stage voltage regulator 52 can be configured like the voltage regulator 20 in Fig. 2 work, except that the controller has multiple power stages instead of a single power stage (i.e., the voltage regulation circuit 22 is off). Fig. 2) monitored. The node also includes a second multi-stage voltage regulator 58, which has several power stages 60 that are independently coupled to the common signal line 40 (BB_SYNC), and a multi-phase voltage regulator master controller 62 that monitors the power stages 60. Although the multi-phase voltage regulator master controller 62 monitors and controls certain aspects of the operation of the power stages 60, each power stage 60 can also have its own decentralized controller and interface with the common signal line 40 (BB_SYNC) as shown in Fig. 2 and Fig. 3.

[0028] Fig.Figure 5 is a flowchart of a method 70 according to an embodiment of the present invention. In step 72, the method comprises a plurality of voltage regulators that distribute power to a plurality of components within a computer node, each voltage regulator comprising a controller, volatile memory, and non-volatile memory. In step 74, the method comprises the controller of each voltage regulator temporarily storing operating data for the voltage regulator in the voltage regulator's volatile memory, the controller temporarily storing the operating data acquired by the voltage regulators during a rolling period. The method then comprises a first voltage regulator from among the plurality of voltage regulators detecting a fault event in step 76, and the controller of each voltage regulator detecting the fault event in step 78.In step 80, the procedure includes the controller of each voltage regulator automatically copying the cached operating data for the voltage regulator from the voltage regulator's volatile memory to the voltage regulator's non-volatile memory in response to the detection of the fault event.

[0029] As a person skilled in the art will understand, the aspects of the present invention can be designed as a system, a method, or a program product. Accordingly, the aspects of the present invention can take the form of an embodiment entirely as hardware, an embodiment entirely as software (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, all of which may be generally referred to here as a "circuit," "module," or "system." Furthermore, the aspects of the present invention can take the form of a program product implemented in one or more computer-readable media containing computer-readable program code.

[0030] Any combination of one or more computer-readable media can be used. The computer-readable medium can be a computer-readable signaling medium or a computer-readable storage medium. A computer-readable storage medium can, for example, without limitation, be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or apparatus, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable media would include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), programmable memory (ROM), erasable programmable memory (EPROM or flash memory), an optical fiber, a portable CD (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.In the context of this publication, a computer-readable storage medium can be any physical medium capable of containing or storing a program for use by a system, device or apparatus to execute instructions.

[0031] A computer-readable signal medium can comprise a propagated data signal containing computer-readable program code, for example, in the baseband or as part of a carrier wave. Such a propagated signal can take many different forms, including, without limitation, electromagnetic, optical, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium that is not a computer-readable storage medium and that can communicate, propagate, or transport a program for use by or in conjunction with a system, device, or apparatus for executing instructions.

[0032] Program code written on a computer-readable medium can be transmitted using any suitable medium, including, without limitation, wireless, wired, fiber optic, RF, etc., or any suitable combination thereof. Computer program code for performing operations for the aspects of the present invention can be written in any combination of one or more programming languages, including an object-oriented programming language such as Java, Smalltalk, C++, or the like, and conventional procedural programming languages ​​such as the programming language "C" or similar programming languages. The program code can run entirely on the user's computer, partially on the user's computer as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server.In the latter case, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made using an external computer (for example, via the internet using an internet service provider).

[0033] The aspects of the present invention can be described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to the embodiments of the invention. It is understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a specific computer, and / or another programmable data processing device to form a machine such that the instructions executed by the processor of the computer or other programmable data processing device create means to implement the functions / actions specified in the block or blocks of the flowcharts and / or schematic block diagrams.

[0034] The computer program instructions may also be stored on a computer-readable medium capable of instructing a computer, other programmable data processing device, or other equipment to function in a particular manner, such that the instructions stored on the computer-readable medium result in a product comprising instructions that implement the function / action specified in the block or blocks of the flowcharts and / or block diagrams.

[0035] The computer program instructions can also be loaded onto a computer, other programmable data processing device, or other equipment to cause a series of operational steps to be performed on the computer, other programmable device, or other equipment to produce a computer-implemented process, so that the instructions running on the computer or other programmable device provide processes to implement the functions / actions specified in the block or blocks of the flowcharts and / or block diagrams.

[0036] The flowcharts and block diagrams in the figures depict the architecture, functionality, and operation of possible implementations of systems, processes, and computer program products according to various embodiments of the present invention. In this respect, each block in the flowcharts or block diagrams can represent a module, segment, or section of code comprising one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block need not occur in the order shown in the figures. For example, two blocks shown consecutively may actually be executed essentially simultaneously, or the blocks may sometimes be executed in reverse order, depending on the functionality in question.It should also be noted that each block of the block diagrams and / or flowcharts and combinations of blocks in the block diagrams and / or flowcharts can be implemented by special hardware-based systems that perform the specified functions or actions, or by combinations of special hardware and computer instructions.

Claims

[1] Procedure (70), comprising that: a plurality of voltage regulators distribute energy to a plurality of components within a computer node (72), each of the voltage regulators comprising a controller, volatile memory and non-volatile memory; the controller of each voltage regulator temporarily stores operating data for the voltage regulator in the volatile memory of the voltage regulator (74), wherein the controller temporarily stores the operating data acquired by the voltage regulator during a rolling period; a first voltage regulator from the multitude of voltage regulators detects a fault event (76); the controller of each voltage regulator receives a message of the fault event (78); and In response to receiving the fault event message, the controller of each voltage regulator automatically copies the cached operating data for the voltage regulator from the voltage regulator's volatile memory to the voltage regulator's non-volatile memory (80). [2] Method (70) according to claim 1, wherein the cached operating data for each voltage regulator includes operating data that were acquired immediately before the fault event. [3] Method (70) according to claim 1, wherein the plurality of voltage regulators each has an open-drain output, and wherein the open-drain output of each voltage regulator is coupled together by a common signal line. [4] Method (70) according to claim 3, wherein one of the voltage regulators has a plurality of power stages and each power stage is coupled to the common signal line. [5] Method (70) according to claim 3, further comprising that the controller of each voltage regulator monitors the common signal line, wherein the controller of each voltage regulator receives a message of the fault event in response to a change in the voltage on the common signal line. [6] Method (70) according to claim 5, wherein the first voltage regulator reduces the voltage on the common signal line. [7] Method (70) according to claim 1, wherein the plurality of voltage regulators comprises a voltage regulator that distributes electrical energy upstream of the first voltage regulator, a voltage regulator downstream of the first voltage regulator and a voltage regulator in parallel to the first voltage regulator. [8] Method (70) according to claim 1, wherein the operating data comprise parameters selected from the group consisting of input voltage, output voltage, input current, output current and temperature. [9] Method (70) according to claim 1, wherein the operating data includes parameters selected from fault status, power per hour, power cycle or ON / OFF count, device state and the last known command. [10] Method (70) according to claim 1, wherein the fault event is selected from input overvoltage fault, input undervoltage fault, power-good switching, output overvoltage fault, output undervoltage fault, overcurrent fault, catastrophic fault, overtemperature fault, software fault, firmware fault, configuration fault, initialization fault and internal voltage fault state. [11] Method (70) according to claim 1, further comprising that the controller of each voltage regulator sends the operating data stored in the non-volatile memory to a management unit within the computer node. [12] Method (70) according to claim 11, further comprising that the management unit analyzes the operating data received from the controller of each voltage regulator in order to determine a cause of the fault event. [13] Method (70) according to claim 11, wherein the management unit is selected from a base plate management controller and an integrated management module. [14] Method (70) according to claim 13, further comprising that the management unit forwards the operating data received from the controller of each voltage regulator to a remote management unit. [15] Method (70) according to claim 14, further comprising that the remote management unit receives the voltage regulator operating data from the controllers of a plurality of computer nodes. [16] Method (70) according to claim 1, wherein the computer node is selected from a server and a network switch. [17] System, encompassing: a plurality of voltage regulators (20, 52, 58) in a power distribution system within a computer node (50), each of the voltage regulators (20, 52, 58) comprising a controller (24), a volatile memory (26) for temporarily buffering operating data for the voltage regulator (20, 52, 58) during a sliding period, an open-drain output that reduces to a low voltage in response to a fault event at the voltage regulator (20, 52, 58), and a non-volatile memory (28) for storing a copy of the buffered operating data; and a common signal line (40) coupled to the open-drain output of each of the plurality of voltage regulators (20, 52, 58) such that a fault in one of the plurality of voltage regulators (20, 52, 58) results in a low voltage on the common signal line (40) which is to be detected by each of the other voltage regulators (20, 52, 58), wherein the non-volatile memory (28) of each voltage regulator (20, 52, 58) stores a copy of the cached operating data stored in the volatile memory (26) of the voltage regulator (20, 52, 58) in response to one of the plurality of voltage regulators (20, 52, 58) experiencing a fault event. [18] System according to claim 17, wherein one of the voltage regulators (20, 52, 58) has a plurality of power stages (60) and each power stage (60) is coupled to the common signal line (40). [19] System according to claim 17, wherein the plurality of voltage regulators (20, 52, 58) comprises a first voltage regulator distributing electrical energy upstream of a second voltage regulator, a third voltage regulator downstream of the second voltage regulator and a fourth voltage regulator in parallel with the second voltage regulator. [20] System according to claim 17, further comprising: an administrative unit (16) in communication with the controller of each voltage regulator (20, 52, 58).

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