Storage-efficient persistent key-value storage for non-volatile memory

Abstract

Solid-state device (SSD), which includes: a non-volatile memory (NVM) configured to store a key-value data structure (702, 802, 902, 1002) that stores one or more combinations (K1, V1; K2, V2; ... K9, V9) of a key and a value; and a key-value memory (KVS) processor (118, 506) configured to: to receive a key-value memory (KVS) instruction from a host (104) or main computer; to perform a key-value storage (CVS) operation on the key-value data structure (702, 802, 902, 1002) based on the received CVS instruction; and to deliver or provide a response to the host (104) based on the KVS operation; a processor (508) that is coupled with the NVM (510) and configured to do so: to process a non-KVS command; and a bridge (504) configured to do this: to receive a command from the host (104); to send the command to the KVS processor (118, 506) if the command is the KVS command; and to send the instruction to the processor (508) if the instruction is a non-KVS instruction.

Description

AREA

[0001] The present invention relates to non-volatile memories and, more particularly, to memory-efficient persistent key-value stores for non-volatile memories. INTRODUCTION

[0002] Key-value stores (KVS) are widely used in various large-scale, data-intensive database applications. These database applications perform random access operations over large data sets and have chosen key-value stores over traditional relational databases due to their high scalability and simplicity. Several research studies have been conducted on flash-based KVS to exploit flash properties to improve performance and reduce host memory usage. KVS stores key-value (KV) pairs in flash and an index structure (or metadata per KV pair) in main memory (e.g., dynamic random access memory or DRAM) to support fast insertion, deletion, and lookup operations. However, the performance of KVS is still limited by its high input / output (I / O) overhead.Input / output overhead (flash is about 100x slower than DRAM) and main memory size are limited because the amount of digital data doubles every two years and is expected to reach 44 zettabytes (44 trillion gigabytes) by 2020.

[0003] Main memory size poses a challenging scalability and performance issue due to the relatively slow growth of DRAM capacity compared to the rapidly growing key-value (KV) datasets. More than 10- to 250-fold slowdowns due to increasing I / O overhead (in-storage linked list traversal due to hash table collisions) have been observed for various KV workloads.

[0004] Emerging technologies with fast byte-addressable non-volatile memory (eNVM), such as ReRAM and 3D Xpoint, are designed to offer two orders of magnitude higher performance than flash. However, existing solid-state device (SSD) architectures optimize flash performance and are insufficient to realize the full potential of eNVM due to architectural and I / O interface limitations (such as PCIe and SATA).

[0005] To improve storage performance and reduce host memory requirements for KVS, an improved SSD architecture is proposed, which provides better performance in processing large key-value data sets.

[0006] XIAOPING, Wu; ZHIDONG, Shen; HUANGUO, Zhang: Secure Key Management of Mobile Agent System Using TPM-Based Technology on Trusted Computing Platform; 2008 International Conference on Computer Science and Software Engineering 1021 - 1023, IEEE 12-14 December 2008; Wuhan, China - ISBN: 978-0-7695-3336-0 concerns the use of a Trusted Platform Module (TPM) for secure key management. SUMMARY

[0007] According to the invention, a solid-state device (SSD) and a method for operating an SSD having the features of the independent claims are provided; dependent claims relate to preferred embodiments.

[0008] According to one aspect, a solid-state device (SSD) comprising non-volatile memory (NVM) and a key-value store (KVS) processor is disclosed. The non-volatile memory (NVM) is configured to store a key-value data structure. The KVS processor is configured to receive a key-value store (KVS) command from a host computer. The KVS processor is also configured to perform a key-value store (KVS) operation on the key-value data structure based on the received KVS command. Performing the key-value store (KVS) operation may include using an index structure to process the key-value data structure based on the received KVS command. The KVS processor is further configured to provide a response to the host based on the KVS operation.

[0009] According to another aspect, a method for operating a solid-state device (SSD) is disclosed. The method stores a key-value data structure on a non-volatile memory (NVM) of the SSD. The method receives a key-value storage (KVS) command from the host. The method identifies an entry of an index structure based on the received KVS command in or on the SSD. The method identifies a group of key-value data from or from the key-value data structure based on the identified entry. The method processes one or more key-value data from the identified group of key-value data based on the received KVS command in or on the SSD. The method provides a response to the host based on the processing of the one or more key-value data.

[0010] According to another aspect, an apparatus for operating a solid-state device (SSD) is disclosed. The apparatus comprises means for non-volatile storage of a key-value data structure and means for key-value storage (KVS) processing. The key-value storage (KVS) processing means comprise means for receiving a key-value storage (KVS) command from a host, means for performing a key-value storage (KVS) operation on the key-value data structure based on the received KVS command, and means for providing or delivering a response to the host based on the KVS operation. The means for performing the key-value storage (KVS) operation comprise generating a hash value based on the received KVS command. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows a block diagram of a solid-state device (SSD) including a key-value store (KVS) processor in accordance with embodiments of the present disclosure. FIG: 2 shows a block diagram of a key-value store (KVS) processor in accordance with embodiments of the present disclosure. FIG: 3 shows a diagram of a device architecture between a host and a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 4 shows a diagram of a multi-chain device architecture between a host and a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 5 shows a flow diagram of a method for processing a key-value store (KVS) command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 6 shows a flow diagram of a method for processing a non-key-value store (KVS) command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 7 (which the Fig. 7A-7C) shows a flow diagram of a GET command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 8 (which the Fig. 8A-8C) shows a flow diagram of a PUT command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 9 (which the Fig. 9A-9B) shows a flow diagram of another PUT command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 10 (which the Fig. 10A-10C) shows a flow diagram of a DELETE command from a host through a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 11 shows an exemplary flowchart of a method for processing various commands from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. Fig. 12 shows an exemplary flowchart for processing a key-value store (KVS) command from a host by a solid-state device (SSD) in accordance with embodiments of the present disclosure. DETAILED DESCRIPTION

[0011] The present disclosure provides a solid-state device (SSD) comprising non-volatile memory (NVM) and a key-value store (KVS) processor. The non-volatile memory (NVM) is configured to store a key data structure. The KVS processor is configured to receive a key-value store (KVS) command from a host. Examples of key-value store (KVS) commands include a get command, a put command, and a delete command. The KVS processor is also configured to perform a key-value store (KVS) operation on the key-value data structure based on the received KVS command. Performing the key-value store (KVS) operation may include using an index structure to process the key-value data structure based on the received KVS command.The KVS processor is further configured to provide a response to the host based on the KVS operation.

[0012] Other approaches to KVS processing primarily use caching and efficient indexing schemes to improve performance and reduce I / O overhead, while the disclosed solid-state device (SSD) can retain both the key-value data and the index structure within the SSD, thereby reducing the amount of key-value data transferred to a host. Additionally, the disclosed methods can offload key-value storage operations to the SSD to exploit the low latency, high internal bandwidth of NVM, and parallelism across multiple controllers. The disclosed SSD can implement indexing capability within the SSD and has an in-storage processing engine (such as a KVS processor) that performs key-value operations such as get, put, andOutput and delete implemented to work efficiently with key-value (KV) records.

[0013] Fig. 1 shows a block diagram of a system 100 including a solid-state device (SSD) with key-value store (KVS) processing functionality. The system 100 includes a solid-state device (SSD) 102 and a host 104. The SSD 102 is a storage device (such as an SSD storage device). The SSD 102 is coupled to the host 104 via one or more interconnects 106. The one or more interconnects 106 provide physical input / output (I / O) data connections between the SSD 102 and the host 104. Data traveling between the SSD 102 and the host 104 may be referred to as I / O overhead. Data may include instructions, commands, and / or responses.

[0014] The host 104 may be any system and / or device that has a need for data storage or retrieval and a compatible interface for communicating with the SSD. For example, the host 104 may be a computing device, a personal computer, a portable computer, a workstation, a server, a router, a network device, a personal digital assistant (PDA), a digital camera, a digital telephone, or combinations thereof. The host 104 may include multiple hosts. The host 104 may be a separate device (such as physically separate) from the SSD 102. In some embodiments, the host 104 may include the SSD 102. In other embodiments, the SSD 102 is remote from the host 104 or is included in a remote computing system communicatively coupled to the host 104.For example, the host 104 may communicate with the SSD 102 via a wireless communication link.

[0015] The host 104 provides commands to the SSD 102 for data transfer between the host 104 and the SSD 102. For example, the host 104 may provide a write command to the SSD 102 to write data to or into the SSD 102, or a read command to the SSD 102 to read data from the SSD 102. The SSD 102 may provide a response to the write command or the read command to the host 104 via one or more connections 106. As described further below, the SSD 102 may process various types of commands, including key-value store (KVS) commands and non-key-value store (KVS) commands from the host 104. KVS commands and non-KVS commands are described further below.

[0016] The SSD storage device 102 includes a host interface 110, a bridge 112, a buffer 114, a crossbar 116, a key-value store (KVS) processor 118, a processor 120 (or alternatively, an NVM processor 120), a random access memory (RAM) 122, a non-volatile memory (NVM) interface 124 (which may also be referred to as a flash memory interface), and a non-volatile memory (NVM) 126, such as NAND flash memory.

[0017] The host interface 110 is coupled to the processor 120 via the bridge 112 and the crossbar 116. It should be noted that the host interface 110 can be coupled to the processor 120 in various ways. For example, the host interface 110 can be directly coupled to the processor 120. In another example, the host interface 110 can be coupled to the processor 120 via the bridge 112 without needing to be coupled to the crossbar 116. The host interface 110 facilitates communication between the host 104 and other components of the SSD 102, such as the processor 120 and / or the KVS processor 118.The host interface 110 may be any type of communications interface, such as an Integrated Drive Electronics (IDE) interface, a Universal Serial Bus (USB) interface, a Serial Peripheral (SP) interface, an Advanced Technology Attachment (ATA) or Serial Advanced Technology Attachment (SATA) interface, a Small Computer System Interface (SCSI), an IEEE 1394 (Firewire) interface, or the like.

[0018] Bridge 112 is coupled to key-value store (KVS) processor 118 via buffer 114. In some embodiments, bridge 112 may be part of host interface 110. Buffer 114 helps manage the flow of data between KVS processor 118 and bridge 112. KVS processor 118 is coupled to processor 120 via crossbar 116. KVS processor 118 may represent one or more KVS processors. In some embodiments, KVS processor 118 is coupled to processor 120 without passing through crossbar 116. The crossbar 116 helps manage the flow of data traveling between the KVS processor 118 and the processor 120, and the flow of data between the bridge 112 and the processor 120. The various components of the SSD 102 can communicate with each other using a communication protocol (such as an Advance eXtensible Interface (AXI) protocol).In some embodiments, the crossbar 116 may be part of the bridge 112.

[0019] The bridge 112 is configured to determine whether commands from the host 104 (via the host interface 110) are KVS commands or non-KVS commands. If the commands are non-KVS commands, the bridge 112 may route or send the commands to the processor 120 via the crossbar 116. If the commands are KVS commands, the bridge 112 may route or send the commands to the KVS processor 118. The KVS commands are processed by the KVS processor 118, and the processed KVS commands are then routed or sent to the processor 120. Examples of KVS commands include a get command, a put command, and a delete command. Examples of KVS command processing are described below at least in the Fig. 2, 5, 7A-7C, 8A-8B, 9A-9C, and 10A-10C. Thus, one functionality provided by SSD 102 is the ability to process various types of commands. This allows SSD 102 to operate and work with a wider range of devices, systems, hosts, and / or applications than other SSDs. Additionally, the ability to process key-value data on or within the SSD reduces the I / O overhead between the host and the SSD, thereby accelerating the overall performance of the SSD.

[0020] The processor 120 is coupled to the RAM 112 as well as to the NVM 126 via the NVM interface 124. The processor 120 controls the operation of the SSD 102. In various aspects, the processor 120 receives commands from the host 104 via the host interface 110 and executes the commands (such as KVS commands, non-KVS commands) to transfer data between the host 104 and the NVM 126. As mentioned above, if the command is a KVS command, the processor 120 may receive commands through the KVS processor 118. In addition, the processor 120 may manage reading from and writing to the memory 122 to perform the various functions effected by the processor 120 and to maintain and manage the cached information stored in the memory 122.

[0021] The processor 120 and / or the KVS processor 118 may include any type of processing device, such as a microprocessor, a microcontroller, an enclosed controller, logic circuitry, software, firmware, or the like, for controlling the operation of the SSD 102. In some aspects, some or all of the functions described herein as being performed by the processor 120 may instead be performed by another component of the SSD 102. For example, the SSD 102 may include a microprocessor, a microcontroller, an enclosed controller, logic circuitry, software, firmware, or any type of processing device for performing one or more of the functions described herein as being performed by the processor 120. In some embodiments, the KVS processor 118 may be a part of the processor 120.In other aspects, one or more functions described herein as being performed by processor 120 are instead performed by host 104. In still further aspects, some or all of the functions described herein as being performed by processor 120 may instead be performed by other components, such as a processor in a hybrid drive that includes both non-volatile memory elements and magnetic memory elements.

[0022] Memory 122 may be any memory, computing device, or system capable of storing data. For example, memory 122 may be random access memory (RAM), dynamic random access memory (DRAM), double data rate (DDR) DRAM, static random access memory (SRAM), synchronous dynamic random access memory (SDRAM), flash memory, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or the like. In various embodiments, processor 120 uses memory 122, or a portion thereof, to store data during data transfer between host 104 and NVM 126. For example, the memory 122 or a portion of the memory 122 may be a cache.

[0023] The NVM 126 receives data from the processor 120 via the NVM interface 124 and stores the data. The NVM 126 may be any type of non-volatile memory, such as a flash memory system, a NAND-type flash memory, a solid-state device (SSD), a flash memory card, a Secure Digital (SD) card, a Universal Serial Bus (USB) storage device, a CompactFlash card, a SmartMedia device, a flash memory array, or the like. Key-value storage (KVS) processor

[0024] As mentioned above, the SSD 102 includes a key-value store (KVS) processor 118, which enables the SSD 102 to process KVS commands on or in key-value (KV) databases. KV databases organize data as a single opaque collection. This allows more flexibility in the type of data that can be stored. Additionally, a KV database uses less memory for the same number of records than other database structures, such as relational databases (RBDs). KVS commands are used to access KV databases. KVS commands are commands specific to KV databases. These KVS commands perform very specific functions related to a KV database. These KVS commands do not function outside the KV database. Examples of KVS commands are get commands, put commands, and delete commands.

[0025] Fig. Figure 2 shows a block diagram of the KVS processor 118. The KVS processor 118 may represent one or more KVS processors. The KVS processor 118 is configured to perform a key-value store (KVS) operation on a key-value data structure based on a KVS instruction. A key-value store (KVS) operation may include a hash operation, which is described below at least in the Fig. 7A-7C and 12.

[0026] The KVS processor 118 includes one or more key-value store (KVS) cores 200, a hash controller 202, a scheduler 204, an indexer 206, a dispatcher or allocator 208, and a direct memory access (DMA) controller 210. The KVS cores 200 are coupled to the hash controller 202, the scheduler 204, the indexer 206, the dispatcher 208, and the DMA controller 210. The DMA controller 210 is coupled to the crossbar 116. The hash controller 202 is coupled to the scheduler 204.

[0027] Scheduler 204 manages commands from host 104 (via host interface 110, bridge 112, buffer 1140) and responds to host 104. Scheduler 204 may receive commands 220 from buffer 114 and schedules them in a first-in-first-out (FIFO) fashion. Similarly, scheduler 204 may send responses 222 to buffer 114 in a first-in-first-out (FIFO) fashion. In some embodiments, scheduler 204 may apply round-robin scheduling to the various commands. Scheduler 204 may route commands to different cores of KVS cores 200. This allows KVS processor 118 to process multiple commands in parallel. The scheduler 204 can also schedule instructions to be processed sequentially by the same core when hash collisions occur in KV records. As the number of KV records increases, so do hash collisions. A hash collision is described below at least in the Fig. 7A-7C.

[0028] The hash controller 202 performs hash calculations on KVS commands. A hash calculation may include a hash value based on a key associated with a command received from the host. In some embodiments, a hash calculation may include using a hash function to map data (e.g., key) of any size to data (e.g., hash value) of a fixed size. The hash function may be used to map a key to a key-value data structure, where the key may be used with an index structure to point to a group (e.g., bucket) in the key-value data structure that stores one or more combinations of a key and a value. The number of possible keys is typically greater than the number of entries (e.g., hash values) in the index structure. Each entry (e.g.,A specific location (e.g., group, container, a particular key-value combination of the group) in the key-value data structure points to a specific location (e.g., group, container, a particular key-value combination of the group) in the key-value data structure. The specific location can be a specific location of a key-value combination of the group. A hash function can produce the same hash value for different keys, which is known as a hash collision. Thus, different keys can be part of the same group (e.g., container) in the key-value data structure. A specific location (e.g., group, container) in the key-value data structure can store more than one combination of a key and a value (e.g., one or more combinations of a stored key and a stored value). A specific location of the key-value data structure can encompass one or more physical addresses.In some embodiments, a particular location of the key-value data structure may refer to one or more locations of the key-value data structure. Hashing or decomposition is described below at least in the . Fig. 7A-7C.

[0029] Indexer 206 is configured to perform index structure lookups and provides a physical address location of a specific group (e.g., container) for the key-value data structure. Indexer 206 also performs an update of new physical addresses for an index structure. Indexer 206 may also use a bitmap structure to provide valid pointer validation.

[0030] The allocator 208 is configured to manage available and used blocks (e.g., storage blocks, memory blocks) within the SSD 102. The allocator 208 may allocate and / or deallocate memory blocks within the SSD 102. The allocator 208 may use a bitmap structure to manage the memory blocks. The DMA controller 210 is configured to load and / or store data from the NVM to the local memory via the crossbar 116. The KVS cores 200 are configured to execute various KVS commands, such as a get command, a put command, and a delete command. The KVS cores 200 may receive the index structure from the hash controller 202. The KVS cores 200 can communicate with the indexer 206 to get or receive physical address pointers.The KVS cores 200 can communicate with the DMA controller 210 to load data to or from local memory. The KVS cores 200 can communicate with the dispatcher 208 to perform allocation and / or undistribution of blocks. DEVICE ARCHITECTURE

[0031] Fig. 3 and Fig. 4 illustrate how data can be packaged and processed on the device side (e.g., host device) when the device (e.g., host) is coupled with an SSD that has KVS functionality. In a conventional system host, each access to the stored data via the system software I / O stack causes significant overhead for the operating system and the data system. Fig. 3 and Fig. The device architecture(s) described in 4 improve the existing software stack by providing direct access to the key-value storage data to improve overall performance. Fig. 3 shows a diagram of an example device architecture between a host and a solid-state device (SSD) having KVS functionality. Device architecture 300 includes an application layer 302, a key-value (KVS) library layer 304, an input / output (I / O) stack layer 306 (e.g., data system and operating system I / O stack), and a device driver layer 308. Device architecture 300 enables a device (e.g., host) to communicate with a solid-state device (SSD) 320 having KVS functionality.

[0032] The application layer 302 specifies or determines specific commands and data (e.g., web browser commands, data from web pages). The KVS library layer 304 includes a command to get, update, output, and / or delete data stored in a key-value data structure. Commands for the KVS library layer 304 include a get command, a put command, and a delete command. The KVS library layer 304 translates the data of the application layer 302 so that it can be processed in a key-value data structure. The I / O stack layer 306 can translate KVS addresses into device addresses. For example, the I / O stack layer 306 can translate key-value data structure addresses into device addresses (e.g., host addresses). The device driver layer 308 is an interface that provides the device (e.g.Host) to communicate with storage 320. Storage 320 may be SSD 102 in some embodiments.

[0033] As in Fig. 3, an application on or in a device (e.g., host) having the device architecture 300 may communicate with an SSD in several ways. In one embodiment, the application (e.g., browser application) may communicate with the storage 320 through the application layer 302, the KVS library layer 304, the I / O stack layer 306, and the device driver layer 308. In some embodiments, the application (e.g., browser application) may communicate with the storage 320 through the application layer 302 and the KVS library layer 304, bypassing one or more functionality and / or translations from other architectural layers of the device architecture 300. For example, some or all of the KVS instructions from the KVS library layer 304 may not need to be translated.This is possible because the memory 320 has KVS functionality, whereby the memory 320 is capable of processing the KVS library layer 304, such as KVS instructions.

[0034] Fig. Figure 4 shows a diagram of an example device architecture between a host and a solid-state device (SSD) having KVS functionality, with multiple chains running between the host and the SSD. Fig. Figure 4 shows a host that can communicate with an SSD through multiple communication channels (e.g., channel 1, channel 2, ... channel N), where each channel comprises a chain or thread. The first thread 400 uses the first channel 1, the second thread 410 uses the second channel 2, and the third thread 420 uses a third channel N. The threads can operate in parallel. Each thread includes the application layer 302, the key-value store (KVS) library layer 304, the input / output (I / O) stack layer 306, and the device driver layer 308. Each thread can include a ring register, a command queue (e.g., KVS commands), and a response queue. Example execution sequences of a solid-state device (SSD) that processes key-value storage (KVS) commands and non-KVS commands

[0035] Fig. 5 and Fig. 6 illustrate execution sequences of a solid-state device (SSD) processing a key-value store (KVS) instruction and a non-KVS instruction. The execution sequences shown in FIGS. 5 and 6 may be performed by any SSD described in the present disclosure, such as SSD 102. For clarity, the execution sequences shown in Fig. 5 and Fig. 6 do not necessarily include all components or parts of the SSD that are required for the Fig. 5 and Fig. 6. For example, one or more of the described data (e.g., command, response) may pass through one or more buffers and / or one or more crossbars when moving between the various components of the SSD. In some embodiments, the operations described in Fig. 5 and Fig. 6 may include other operations performed by the SSD.

[0036] FIG: 5 illustrates an execution sequence 500 performed by an SSD 501 coupled to a host (e.g., host 104). The execution sequence 500 includes the processing of KVS commands by the SSD 501. The SSD 501 includes a host interface 502, a bridge 504, a key-value store (KVS) processor 506, a processor 508, and a non-volatile memory (NVM) 510. In one aspect, the NVM is implemented as a NAND memory.

[0037] As in Fig. As shown in Figure 5, host interface 502 sends a key-value store (KVS) command to bridge 504 (at 512). The KVS command may be received by host interface 502 from a host (e.g., 104). Examples of KVS commands include a get command, a put command, and a delete command. In some embodiments, KVS commands are commands that do not include the physical address(es) of the data to be processed (e.g., a command devoid of physical address information) when the command is transmitted by the host and / or received by the SSD. The bridge 504 determines (at 514) that the instruction is a KVS instruction and sends (at 516) the KVS instruction to the KVS processor 506. The KVS processor 506 processes (at 518) the KVS instruction, which includes performing a hash calculation to generate a hash value and using an index structure to identify a location (e.g.,Group, key-value combination) in the key-value data structure. In some embodiments, identifying the location comprises identifying a physical address of a key-value combination in the NVM 510. In some embodiments, identifying the location comprises identifying a physical address associated with a group of key-value combinations in the NVM 510.

[0038] The KVS processor 506 sends (at 520) a command including an address of the data to the processor 508. The processor 508 processes (at 522) the command from the KVS processor 506. The processor 508 sends (at 524) the command to the NVM 510. The NVM 510 accesses (at 526) the data based on the command. Accessing the data may include reading the data at a particular physical address of the NVM 510 and / or writing data to a particular physical address of the NVM 510.

[0039] The NVM 510 sends (at 528) the response to the command to the processor 508, where the response is processed (at 530). The response may include data (e.g., key, value, pointer, acknowledgment, error). The processor 508 sends (at 532) the response to the KVS processor 506. The KVS processor 506 processes (at 534) the response and sends (at 536) the response to the bridge 504. The bridge 504 processes (at 538) the response and sends (at 540) the response to the host interface 502. The host interface 502 sends the response to the host (e.g., 104). The above execution sequence 500 may be executed many times sequentially or in parallel with other instructions (e.g., KVS instructions, non-KVS instructions).

[0040] FIG: 6 shows an execution sequence 600 performed by SSD 501 coupled to a host (e.g., host 104). The execution sequence 600 includes the processing of non-KVS commands by SSD 501. SSD 501 includes host interface 502, bridge 504, key-value store (KVS) processor 506, processor 508, and non-volatile memory (NVM) 510.

[0041] As in Fig. 6, host interface 502 sends (at 612) a non-key-value store (KVS) command to bridge 504. The non-KVS command may be received by host interface 502 from a host (e.g., 104). Non-KVS commands include commands that are not specifically restricted or limited to a key-value store database. That is, non-KVS commands are commands that can be used in non-key-value store databases. Examples of non-KVS commands include read commands and / or write commands. In some embodiments, non-KVS commands are commands that include a physical address (or addresses) of the data to be processed when the command is transmitted by the host and / or received by the SSD. The bridge 504 determines (at 614) that the instruction is a non-KVS instruction and sends (at 616) the non-KVS instruction to the processor 508.In some embodiments, the non-KVS command may include address information (e.g., a physical address of data in or on the NVM 510). The non-KVS command bypasses or bridges the KVS processor 506. The processor 508 processes (at 622) the non-KVS command from the bridge 504. The processor 508 sends (at 524) the command to the NVM 510. The NVM 510 accesses (at 626) the data based on the command. Accessing the data may include reading the data at a particular physical address of the NVM 510 and / or writing data at a particular physical address of the NVM 510.

[0042] The NVM 510 sends (at 628) the response to the command to the processor 508, where the response is processed (at 630). The response may include various data (e.g., key, value, pointer, acknowledgment, error). The processor 508 sends (at 632) the response to the bridge 504. The response bypasses or bypasses the KVS processor 506. The bridge 504 processes (at 638) the response and sends (at 640) the response to the host interface 502. The host interface 502 sends the response to the host (e.g., 104). The above sequence of operations 600 may be performed multiple times sequentially or in parallel with other commands (e.g., KVS commands, non-KVS commands).

[0043] Fig. 7 (which the Fig. 7A-7C) shows a sequence of operations of a solid-state device (SSD) executing a key-value store (KVS) instruction. In particular, Fig. 7 a sequence of a get command from a host performed by an SSD.

[0044] As in Fig. As shown in Figure 7A, the SSD receives a get command 710 from a host. The get command 710 specifies the SSD to obtain a value associated with a key (K3). The SSD's KVS processor 700 performs a hash operation on the key (K3), which generates a hash value 720. The hash value 720 is then used on the index structure 704 to identify a group from the key-value data structure 702. In this particular case, the hash value 720 points to an entry in the index structure 704 that identifies group 0. Group 0 points to the key (K1) and value (V1) combination 730 in the key-value data structure 702.In some embodiments, the group 0 index structure entry includes a pointer that is a physical address of the combination 730 of a key (K1) and a value (V1) in the key-value data structure 702 (stored in the NVM of the SSD). The group of a key-value data structure may be empty or may include one or more key-value data (e.g., a combination of a key and a value). Although the pointer points to the combination 730 of a key (K1) and a value (V1) in the index structure 704, the pointer may be considered a pointer to group 0 of the key-value data structure 702. Different embodiments may store the index structure 704 differently. The SSD retrieves the combination 730 of a key (K1) and a value (V1) from the SSD.from the key-value data structure 702 and reads it, and then compares the key (K1) of combination 730 with the key (K3) of instruction 710. In this case, the keys do not match, and the SSD retrieves the next key-value combination. The next key-value combination is determined by a pointer located at the key (K1) and value (V1) combination. The pointer can be a physical address of the next key-value combination. In this example, the next key-value combination is the key (K2) and value (V2) combination.

[0045] Fig. Figure 7B shows the SSD retrieving the key (K2) and value (V2) combination 732, which is also part of group 0. The SSD retrieves and reads the key (K2) and value (V2) combination 732 from the key-value data structure 702, and then compares the key (K2) of the combination 732 with the key (K3) of instruction 710. The keys do not match this time either, and the SSD retrieves the next key and value combination. The location of the next key and value combination is stored as a pointer (e.g., physical address pointer) in the key (K2) and value (V2) combination 732. The pointer points to the key (K3) and value (V3) combination.

[0046] Fig. Figure 7C shows the SSD retrieving the key (K2) and value (V2) combination 732, which is also part of group 0 (which may mean they are part of the same container). The SSD retrieves and reads the key (K3) and value (V3) combination 734 from the key-value data structure 702, and then compares the key (K3) of the key-value combination 734 with the key (K3) of the command 710. The keys now match, and the SSD returns a response 740 to the host, with the response including the value (V3) of the key-value combination 734.

[0047] In this configuration, due to hash collisions, multiple key-value combinations are in the same group (e.g., container). Among other processing operations, all key-value combinations are transmitted over connection 106 to host 104, creating unnecessary I / O overhead between the SSD and the host. This slows down the overall performance of the SSD. However, by only transmitting the matching key-value combination, the I / O overhead between the SSD and the host is significantly reduced. While the processors (e.g., KVS processor) of the SSD are likely slower than the host processors, the advantage of not having to transmit all key-value combinations outweighs any disadvantages caused by using a processor that is located on or behind the host.in which the SSD is located, especially in cases where the database is very large and there is a high incidence of hash collisions among the records. The above scenario also applies to other types of KVS commands.

[0048] Fig. 8 (which the Fig. 8A-8B) shows a sequence of operations of a solid-state device (SSD) executing a key-value store (KVS) instruction. In particular, Fig. 8 shows a sequence of a put command from a host performed by an SSD, the put command comprising writing a new combination of a key and a value.

[0049] As in Fig. As shown in Figure 8A, the SSD receives a put command 810 from a host. The put command 810 specifies the SSD to store a new combination of a key and a value. Specifically, the put command 810 specifies the storage of a combination 834 of a key (K5) and a value (V5). The SSD's KVS processor 800 performs a hash operation on the key (K5), generating a hash value 820. The hash value 820 is then applied to the index structure 804 to identify a group of the key-value data structure 802. In this particular case, the hash value 820 points to an entry in the index structure 804 that identifies group 1. Group 1 points to the combination 830 of the key (K4) and the value (V4) in the key-value data structure 802.In some embodiments, the index structure entry for group 1 includes a pointer that is a physical address of the combination 830 of the key (K4) and the value (V4) in the key-value data structure 802. The key-value data structure 802 is stored in the NVM of the SSD. The group of a key-value data structure may be empty or include one or more key-value data (e.g., a combination of a key and a value). Even though the pointer points to the combination 830 of the key (K4) and the value (V4) in the index structure 804, the pointer may be considered a pointer to group 1 of the key-value data structure 802. The SSD retrieves and reads the combination 830 of the key (K4) and the value (V4) 830 from the key-value data structure 802, and then compares the key (K4) of the combination 830 with the key (K5) of the instruction 810.In this case, the keys do not match, and the SSD retrieves the next key-value combination from the group. The next key-value combination is specified by a pointer located at the key (K4) and value (V4) combination. The pointer can be a physical address of the next key-value combination. However, in this example, there is no other key-value combination in group 1. Since there is no other key-value combination in group 1, the SSD can add the key (K5) and value (V5) combination 834 after the key (K4) and value (V4) combination 830.

[0050] Fig. 8B shows the SSD writing the combination 834 of the key (K5) and the value (V5) to the key-value data structure 802 of the NVM. The SSD may provide a memory block (or blocks) (e.g., physical addresses) for the combination 834 of the key (K5) and the value (V5) before writing the combination 834 of the key (K5) and the value (V5). The SSD updates the pointer of the combination 830 of the key (K4) and the value (V4) so ​​that the pointer points to the physical address of the combination 834 of the key (K5) and the value (V5). Once the combination 834 of the key (K5) and (V5) has been stored, the SSD may provide a response 840 to the host. The response 840 may include an acknowledgment that the combination 834 of the key (K5) and the value (V5) has been stored in or on the key-value data structure 802.In some embodiments, instead of a pointer, the key (K5) and value (V5) combination 834 may include some indicator that it is the last key and value combination in the group. In some embodiments, if there is no pointer for the key and value combination, it may be assumed that this is the last key and value combination in the group.

[0051] Fig. 9 (which the Fig. 9a-9C) shows a sequence of execution of a solid-state device (SSD) executing a key-value store (KVS) instruction. In particular, Fig. 9 shows a sequence of a put command from a host performed by an SSD, wherein the put command includes updating a combination of a key and a value.

[0052] As in Fig. As shown in Figure 9A, the SSD receives a put command 910 from a host. The put command 910 specifies the SSD to store a combination of a key and a value. Specifically, the put command 910 specifies the storage of a combination of the key (K5) and the value (V6). The SSD's KVS processor 900 performs a hash operation on the key (K5), which generates a hash value 920. The hash value 920 is then applied to the index structure 904 to identify a group of the key-value data structure 902. In this particular case, the hash value 920 points to an entry in the index structure 904 that identifies group 1. Group 1 points to the combination 930 of the key (K4) and the value (V4) in the key-value data structure 902.In some embodiments, the index structure entry for group 1 includes a pointer that is a physical address of the combination 930 of the key (K4) and the value (V4) in the key-value data structure 902. The key-value data structure 902 is stored in the NVM of the SSD. The group of a key-value data structure may be empty or include one or more key-value data (e.g., a combination of a key and a value). Even though the pointer points to a combination 930 of the key (K4) and the value (V4) in the index structure 904, the pointer may be considered a pointer to group 1 of the key-value data structure 902. The SSD retrieves and reads the combination 930 of the key (K4) and the value (V4) from the key-value data structure 902, and then compares the key (K4) of the combination 930 with the key (K5) of the instruction 910.In this case, the keys do not match, and the SSD retrieves the next key-value combination in the group. The next key-value combination is specified by a pointer located at the key (K4) and value (V4) combination 930. The pointer can be a physical address of the next key-value combination in the group. In this example, the next key-value combination is the key (K5) and value (V5).

[0053] Fig. Figure 9B shows the SSD retrieving the key (K5) and value (V5) combination 932, which is also part of group 1. The SSD retrieves and reads the key (K5) and value (V5) combination 932 from the key-value data structure 902, and then compares the key (K5) of the key-value combination 932 with the key (K5) of instruction 910. The keys match this time, and the SSD updates the key (K5) and value (V5) combination 932 so that V5 has been replaced by V6. The key (K5) and value (V6) combination 934 has now replaced the previous key and value combination 932.

[0054] Fig. 9C shows the SSD writing the combination 934 of the (K5) and the value (V6) to the key-value data structure 902 of the NVM. The key-value combination may be stored at a different physical address of the NVM or at the same physical address as the previous key-value combination 932. The SSD may also need to update the pointer of the combination of the key (K4) and the value (V4) so ​​that the pointer points to the physical address of the combination 934 of the key (K5) and the value (V6). Once the combination of the key (K5) and the (V6) has been stored and / or the pointer has been updated, the SSD may provide a response 940 to the host. The response 940 may include an acknowledgment that the combination of the key (K5) and the value (V6) has been stored in the key-value data structure 902.If necessary, the combination of the key (K5) and the value (V6) may contain a pointer that points to or leads to another combination of a key and a value in the group.

[0055] Fig. 10 (which the Fig. 10A-10C) shows a flow sequence of a solid-state device (SSD) executing a key-value store (KVS) instruction. In particular, Fig. 10 a sequence of a delete command from a host executed by the SSD.

[0056] As in Fig. As shown in Figure 10A, the SSD receives a delete command 1010 from a host. The delete command 1010 specifies the SSD to remove a combination of a key and a value. Specifically, the delete command 1010 specifies the deletion of a combination of the key (K2) and the value (V2). The SSD's KVS processor 1000 performs a hash operation on the key (K2), generating a hash value 1020. The hash value 1020 is then used on or in the index structure 1004 to identify a group of or from the key-value data structure 1002. In this particular case, the hash value 1020 points to an entry in the index structure 1004 that identifies group 0. Group 0 points to the combination 1030 of the key (K1) and the value (V1) in the key-value data structure 1002.In some embodiments, the index structure entry for group 0 includes a pointer that is a physical address of the combination 1030 of the key (K1) and the value (V1) in the key-value data structure 1002. The key-value data structure 1002 is stored in the NVM of the SSD. The group of a key-value data structure may be empty or include one or more key-value data (e.g., a combination of a key and a value). Although the pointer in the index structure 1004 points to the combination 1030 of the key (K1) and the value (V1), the pointer may be considered a pointer to group 0 of the key-value data structure 1002. The SSD retrieves and reads the key (K1) and value (V1) combination 1030 from the key-value data structure 1002, and then compares the key (K1) of the key-value combination 1030 with the key (K5) of the instruction 1010.In this case, the keys do not match, and the SSD retrieves the next key-value combination from the group. The next key-value combination is specified by a pointer located at the key (K1) and value (V1) combination. The pointer can be a physical address of the next key-value combination. In this example, the next key-value combination from the group is the key (K2) and value (V2).

[0057] Fig. Figure 10B shows the SSD retrieving the key (K2) and value (V2) combination 1032, which is also part of group 0. The SSD retrieves and reads the key (K2) and value (V2) combination 1032 from the key-value data structure 1002, and then compares the key (K2) of the key and value combination 1032 with the key (K2) of instruction 1010. The keys match this time.

[0058] The SSD may do one of several things. In one embodiment, the SSD may update the pointer to the key (K1) and value (V1) combination 1030 to point to the physical address of the key (K3) and value (V3) combination 1034 instead of the key (K2) and value (V2) combination 1032. This effectively removes the key (K2) and value (V2) combination 1032 from the key-value data structure 1002 without actually deleting it from the physical address of the NVM. In some embodiments, the SSD may deallocate the memory block (or blocks) (e.g., physical address) on which the key (K2) and value (V2) combination 1032 is stored, meaning that the particular memory block (or blocks) is no longer accessible from the key-value data structure 1002.used by the key-value data structure 1002 and is available for storing new data.

[0059] Fig. 10C shows the SSD updating the pointer to the key-value combination 1030 to point to the key-value combination 1034 instead of the key-value combination 1032. After updating the pointer, the SSD may provide a response 1040 to the host. The response 1040 may include an acknowledgment that the key (K2) and value (V2) combination 1032 in the key-value data structure 1002 has been deleted. In other embodiments, the SSD may overwrite the physical address of the key-value combination 1032 to delete the key-value combination 1032 from the key-value data structure 1002. In such a case, the SSD would still update the pointer to the key-value combination 1030 to point to the key-value combination 1034. Example flowcharts of methods for processing key-value storage (KVS) commands and non-KVS commands by a solid-state device (SSD)

[0060] Fig. 11 and Fig. 12 show flowcharts of methods for processing a key-value store (KVS) instruction and a non-KVS instruction by a solid-state device (SSD). Fig. 11 and Fig. 12 may be performed by any SSD described in the present disclosure, such as SSD 102. Also, for the purpose of clarity, the Fig. 11 and Fig. 12 do not necessarily describe all operations performed by the SSD. In some embodiments, the methods shown in Fig. 11 and Fig. The methods shown in Figure 12 may include other operations that may be performed by the SSD. In some embodiments, the order of the methods may be changed.

[0061] Fig. 11 shows a flowchart of a method 1100 for processing one or more commands received from a host. The method 1100 may be performed by an SSD (e.g., 104, 501). The method receives (at 1102) a command from a host. The command may be received through a host interface (e.g., 110). The method determines (at 1104) whether the command is a key-value store (KVS) command. The determination may be performed by the bridge 112 and / or the host interface 110. The method 1100 may determine whether the command is a KVS command by looking at whether or not the command includes commands that can only be used by a key-value (KV) database. In some embodiments, the method may determine whether the instruction is a KVS instruction by looking at whether the instruction is specifically a get instruction, a put instruction, or a delete instruction.Delete instruction or not. In some embodiments, if the instruction includes a get instruction, an output instruction, or a delete instruction, the method may determine that the instruction is a KVS instruction.

[0062] If the method determines (at 1104) that the instruction is not a KVS instruction, the method may proceed to access (at 1108) a particular location of a key-value data structure in the non-volatile memory (NVM). Examples of non-KVS instructions may include a read instruction and / or a write instruction. Accessing (at 1108) the key-value data structure may be performed by the NVM processor. Accessing (at 1108) the key-value data structure may include reading a physical address of the NVM and / or writing to a physical address of the NVM.

[0063] If the method determines (at 1104) that the instruction is a KVS instruction, the method proceeds to perform a key-value storage (KVS) operation with an index structure (at 1106) to identify a particular location of a key-value data structure in the non-volatile memory (NVM). Performing (at 1106) the KVS operations may include performing one or more hash calculations and / or hash operations to identify one or more hash values ​​that may correspond to entries of an index structure. An example of performing a KVS operation is described in Fig. 12. Once the KVS operation has been performed (at 1106), the method accesses (at 1108) the key-value data structure in or on the NVM based on the KVS operation, the index structure, and the key-value data structure. The method provides (at 1110) a response to a host based on the retrieved data. The method 1100 of Fig. 11 can be performed iteratively for multiple instructions (e.g. KVS instructions and / or non-KVS instructions).

[0064] Fig. 12 shows a flowchart of a method 1200 for processing one or more KVS commands received from a host. Examples of the method 1200 of Fig. 12 are in the Fig. 7-10. The received command is a KVS command that includes a key. The method 1200 may be performed by an SSD (e.g., 104, 501). The method may begin after a command that includes a key is received from a host. The method may begin after the method determines that the received command is a KVS command. The command may be received through a host interface (e.g., 110). The method performs (at 1202) a hash calculation or hash operation on a key in the command received by an SSD. The hash operation computes a hash value based on the key that accompanies the command (e.g., KVS command). The hash operation may map a key of any size to data (e.g., hash value) of a specified size. The hash operation may include a hash function (e.g., Jenkins hash function).The hash function can be used to map a key to a key-value data structure, where the key can be used with an index structure to point to a group (e.g., bucket) in the key-value data structure in which one or more of the combinations of a key and a value are stored. The number of possible keys is typically greater than the number of entries (e.g., hash values) in the index structure. Each entry (e.g., hash value) of the index structure points to a specific location or group (e.g., bucket) of key-value data (e.g., combination of a key and a value) in the key-value data structure. For example, each entry can be a pointer that provides a physical address of a combination of a key and a value in the particular group of key-value data.This physical address can represent the location of the particular group, even if not all combinations of a key and a value are stored at that physical address. A hash function can produce the same hash value for different keys. Thus, a particular location or group (e.g., container) of key-value data in the key-value data structure can store more than one combination of a key and a value. Note that although the different combinations of a key and a value may be part of the same location or group of key-value data from the key-value data structure, they may be stored at different physical addresses of the storage device. A group of key-value data may be empty or may include one or more combinations of a key and a value.

[0065] The method identifies (at 1204) an entry or group of the index structure based on the hash operation. Each entry or group is associated with a hash value. The identified entry or group may point to a group of key-value data comprising one or more combinations of a key and a value. In some embodiments, the group of key-value data may be empty. The method identifies (at 1206) a group of key-value data based on the identified entry of the index structure, and accesses (at 1206) at least one combination of a key and a value of the identified group of key-value data from the key-value data structure.Once the set of key-value data has been identified, the method may process the identified set of key-value data, including accessing, retrieving, comparing, and / or storing key-value data. Accessing the at least one key-value combination may include reading and / or writing data at a particular location (e.g., physical address) of the NVM. The method determines (at 1208) whether the key associated with the received command matches the retrieved key-value combination from the identified set.

[0066] If the keys match, the method then proceeds to deliver (at 1212) a response comprising a value from the retrieved key-value combination. In some embodiments, delivering a response may comprise writing the key-value combination to a particular location of the key-value data structure. However, if the keys do not match, the method determines (at 1210) whether there is another key-value combination for the identified group of key-value data. If the method determines (at 1210) that there is no other key-value combination for the group, the method delivers (at 1212) a response comprising an error message and / or a discrepancy message.

[0067] If the method determines (at 1210) that there is another key and value combination for the identified set of key-value data, the method continues to determine (at 1208) whether the key associated with the received command matches another key from the other retrieved key and value combination of the identified set of key-value data. The method 1200 of Fig. 12 can be performed iteratively for multiple commands.

[0068] While the above description contains many specific embodiments of the invention, these are not intended to limit the scope of the invention, but rather to be considered as examples of specific embodiments thereof. Accordingly, the scope of the invention should be determined not by the illustrated embodiments, but by the appended claims and their equivalents.

[0069] The various features and methods described above may be used independently or combined in various ways. All possible combinations and sub-combinations are intended to be within the scope of this disclosure. Additionally, certain method, event, state, or processing blocks may be omitted in some implementations. The methods and processes described herein are also not limited to any particular sequence, and the blocks or states related thereto may be performed in other suitable sequences. For example, described tasks or events may be performed in a different order than that specifically disclosed, or several may be combined in a single block or state. The example tasks or events may be performed serially, in parallel, or in other suitable ways.Tasks or events may be added to or removed from the disclosed embodiments. The example systems and components described herein may be configured differently than described. For example, elements may be added, removed, or rearranged compared to the disclosed example embodiments.

Claims

[1] Solid-state device (SSD), which includes: a non-volatile memory (NVM) configured to store a key-value data structure (702, 802, 902, 1002) that stores one or more combinations (K1, V1; K2, V2; ... K9, V9) of a key and a value; and a key-value store (KVS) processor (118, 506) configured to: receive a key-value store (KVS) command from a host (104) or a main computer; perform a key-value storage (KVS) operation on the key-value data structure (702, 802, 902, 1002) based on the received KVS command; and provide a response to the host (104) based on the KVS operation; a processor (508) coupled to the NVM (510) and configured to: to process a non-KVS command; and a bridge (504) configured to: receive a command from the host (104); send the command to the KVS processor (118, 506) if the command is the KVS command; and send the instruction to the processor (508) if the instruction is the non-KVS instruction. [2] The SSD of claim 1, wherein the KVS instruction is selected from the group consisting of a get instruction (710), a put instruction (810, 910), and a delete instruction (1010). [3] The SSD of claim 1, wherein the key-value store (KVS) operation comprises using an index structure (704, 804, 904, 1004) to process the key-value data structure (702, 802, 902, 1002) based on the received KVS command. [4] The SSD of claim 1, wherein performing the KVS operation comprises performing a get instruction (710), wherein performing the get instruction comprises: Generating a hash value (720) based on the KVS command, wherein the KVS command comprises a request for a particular value (V3) associated with a particular key (K3); Identifying a particular location in the key-value data structure (702) using the hash value (720) and an index structure (704); and Retrieving at least one combination of a stored key and a stored value from the particular location in the key-value data structure (702, 802, 902, 1002). [5] The SSD of claim 4, wherein providing the response (740) to the host (104) comprises providing the stored value (V3) associated with the stored key (K3). [6] The SSD of claim 4, wherein the particular location in the key-value data structure (702, 802, 902, 1002) stores a plurality of combinations of stored keys and stored values, the particular location comprising a plurality of physical addresses. [7] The SSD of claim 6, wherein performing the KVS operation further comprises iteratively comparing each combination of stored key and stored value at or in the particular location of the key-value data structure (702, 802, 902, 1002) until a particular stored key matches the particular key from the KVS instruction. [8] The SSD of claim 1, further comprising a command scheduler configured to schedule a plurality of received KVS commands in a particular order to be processed by the KVS processor. [9] The SSD of claim 1, further comprising a hash controller configured to perform one or more hash operations of the received KVS commands. [10] A method of operating a solid-state device (SSD), comprising: Storing a key-value data structure (702, 802, 902, 1002) in or on a non-volatile memory (NVM); Receiving a key-value store (KVS) command from a host (104); Identifying (1204) an entry of an index structure (704, 804, 904, 1004) based on the received KVS command on or in the SSD; Identifying (1206) a group of key-value data from the key-value data structure (702, 802, 902, 1002) storing one or more combinations (K1, V1; K2, V2; ... K9, V9) of a key and a value based on the identified entry; Processing one or more key-value data from the identified group of key-value data based on the received KVS command on or in the SSD; and Providing a response to the host (104) based on processing the one or more key-value data; wherein receiving the KVS command comprises: Receiving a command from the host (104) on or in the bridge of the SSD; Sending the command to a KVS processor (118, 506) of the SSD if the command is the KVS command; and Sending the command to a processor (508) of the SSD (501) if the command is a non-KVS command; and wherein the method further comprises: Processing the non-KVS instruction by the processor (508). [11] The method of claim 10, wherein the KVS instruction is selected from the group consisting of a get instruction (710), a put instruction (810, 910) and a delete instruction (1010). [12] The method of claim 10, wherein identifying the entry of the index structure (704, 804, 904, 1004) comprises generating (1202) a hash value (720, 820, 920, 1020) based on the received KVS command on or in the SSD. [13] The method of claim 10, further comprising generating (1202) a hash value (720) based on the KVS instruction, wherein the KVS command comprises a request for a specific value (V3) associated with a specific key (K3), wherein identifying the group of key-value data comprises identifying a particular location in the key-value data structure (702, 802, 902, 1002); and wherein processing the one or more key-value data comprises retrieving at least one combination of stored key and stored value in or at the particular location in the key-value data structure (702). [14] The method of claim 13, wherein providing the response (740) to the host (104) comprises providing the stored value (V3) associated with the stored key (K3). [15] The method of claim 13, wherein processing one or more key-value data comprises iteratively comparing each stored key and stored value combination in or at a plurality of locations in the key-value data structure (702) until a particular stored key matches the particular key of the KVS instruction. [16] The method of claim 10, further comprising generating a hash value (820, 920) based on the KVS command, wherein the KVS command comprises a request to store a specific value with a specific key; wherein identifying the group of key-value data comprises identifying a particular location in the key-value data structure (802, 902); and wherein processing the one or more key-value data comprises storing the particular key and the particular value combination in or at the particular location in the key-value data structure. [17] The method of claim 10, further comprising generating a hash value (1020) based on the KVS instruction, wherein the KVS command comprises a request to delete a specific value with a specific key; wherein identifying the group of key-value data comprises identifying a particular location in the key-value data structure (1002); and wherein processing the one or more key-value data comprises deleting a pointer pointing to a particular location in which the combination of the particular key and the particular value is stored.

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