Circuit, device and frequency converter as well as method for operating an electronic circuit

Abstract

An electronic circuit comprising: a first series circuit of intermediate circuit capacitors (CA1, . . , CAm) and a second series circuit of intermediate circuit capacitors (CB1, .. , CBn) connected in parallel between DC busbars (DC+, DC-), the first series having a first node (A) between its intermediate circuit capacitors and the second series having a second node (B) between its intermediate circuit capacitors, the electronic circuit further comprising a short-circuit module (301) configured to receive a voltage difference (UM) between the first node and the second node and to cause a short-circuit of the DC busbars in response to a change in the received voltage difference that is greater than a predetermined threshold, characterized in that the short-circuit module comprises an arc-generating component (301; 520) arranged at a distance of less than 10 cm from the DC busbars (DC+, DC-) and operable to generate an electrical arc in response to the change in the received voltage difference (UM) being greater than the predetermined threshold value, wherein - at least parts of the respective DC busbars (DC+, DC-) are arranged close to one another and the arc-generating component (301; 520) is arranged between respective sections of the DC busbars (DC+, DC-) and - the respective sections of the DC busbars (DC+, DC-) have electrode tabs (531, 533) which are led out from the respective DC busbars (DC+, DC-).

Description

REGIONThe present disclosure generally relates to a safety concept for electronic circuits, in particular circuits with improved safety, comprising intermediate circuit capacitors.BACKGROUNDIntermediate circuit capacitors are generally electrolytic capacitors in series between DC bus bars. However, the electrolytic capacitors in series have the problem that one capacitor in the series may fail when another in the series is intentionally (e.g., during UL tests) or inadvertently (e.g., by malfunctions) shorted. This can lead to explosions and / or earth faults.The publication EP 1 168 565 A1 discloses a method for protecting a dynamic voltage converter and a dynamic voltage converter, which comprises:an energy storage capacitor bank having at least one subbank comprising at least one string of two capacitors connected in series, wherein, in the case that the subbank comprises two or more strings of capacitors connected in series, these strings are connected in parallel and midpoints of these strings are connected to a star point via high-resistance resistors, andat least two converter branches in the voltage converter, each of which comprises at least one pair of semiconductors.The method is intended to protect the voltage converter against thermal or mechanical damage in the event of a short circuit within the voltage converter or the capacitor bank, wherein the method comprises the following steps:monitoring the currents in the converter and / or the voltages of the centers of the series of series-connected capacitors in order to detect a short circuit,upon detection of the short circuit, initiation of the discharge of the capacitor bank, anddischarging all capacitors.In summary, when a short circuit is detected in the dynamic voltage converter, a rapid discharge of the capacitor bank is initiated, including the ignition of all available semiconductors of the voltage converter and the most uniform possible distribution of the resulting current load within the voltage converter.GB 2 512 632 A discloses an electrical circuit comprising a plurality of capacitors connected between bus bars, a switch connected to conduct between the bus bars via the capacitors, and fault detection means operable to detect a fault in one of the capacitors and cause the switch to conduct in response to the fault detection. In summary, the busbars are electrically short-circuited in the event of fault detection.Therefore, there is an unsatisfaction need in the prior art to overcome the above-mentioned deficiencies and deficiencies.SUMMARYIn one aspect, the disclosure is directed to an electronic circuit having the features of claim 1.The circuit includes, among other things, a first series connection of DC link capacitors and a second series connection of DC link capacitors connected in parallel between DC link rails, the first series having a first node between their DC link capacitors and the second series having a second node between their DC link capacitors, and a short circuit module configured to receive a voltage difference between the first node and the second node and short the DC link rails in response to a change in the received voltage difference being greater than a predetermined threshold.Each of the intermediate circuit capacitors has a voltage corresponding to the voltage division between these capacitors according to their respective capacitance values. As a result, for two specific nodes between these capacitors, e.g. the first node and the second node, the voltage difference between them can be determined only on the basis of the capacitor values of the capacitors. This voltage difference remains substantially constant while all capacitors are operating normally (i.e., in a normal state).According to embodiments, a malfunction state, e.g. short circuit, of one or more intermediate circuit capacitors changes the voltage division between the capacitors and thus leads to a change in the voltage difference between the first node and the second node, thereby triggering the short circuit module. As a result, the DC busbars are short-circuited by the short-circuit module, which facilitates the blowing through of fuses before capacitor explosion and ground faults, for example.The threshold value may be designed to be smaller than the change in the voltage difference in the fault state from that in the normal state, but still take into account general variations of the electronic circuits.In certain embodiments, the first node and the second node have substantially the same voltage in the normal state of the intermediate circuit capacitors. In this case, the voltage difference can be treated as a change in the voltage difference, so that it is relatively easy to monitor the change in the voltage difference between the first node and the second node by simply monitoring the voltage between the first node and the second node.According to the invention, the short-circuit module has an arc-generating component which is arranged adjacent to the direct current busbars and is operable to generate an electric arc in response to the change in the received voltage difference being greater than the predefined threshold value. The arc generating component is disposed proximate the DC bus bars so that the generated arc can short the DC bus bars. According to the invention, the arc-generating component is arranged at a distance of less than 10 cm from the direct current busbars.In certain embodiments, the arc generating component is operable to go high when the received voltage difference is greater than the predetermined threshold. Therefore, the arc generating component may transition to a "rigid" short circuit condition, thus igniting the arc.In certain embodiments, the arc generating component includes at least one of a transient voltage suppressor (TVS) diode, a zener diode, a resistor, a varistor, an active component, a SIDACtor, a fuse, a copper trace or wire, or any combination thereof. For example, the active component comprises a semiconductor switch.According to the invention, at least parts of the respective direct current bus bars are arranged close to one another and the arc-generating component is arranged between the respective parts of the direct current bus bars. Such a close arrangement enables the DC bus bars to be short-circuited by the arc generated by the arc generating component. For example, the arc generating component may be disposed opposite the respective DC bus bars so that the generated arc may pass through a space between the DC bus bars.Alternatively or additionally, according to the invention, the respective portions of the DC busbars include electrode tabs that are led out from the respective DC busbars. Therefore, the DC bus bars may have enlarged portions. These enlarged portions facilitate the short circuit between the DC bus bars by the arc.In certain embodiments not according to the invention as such, the short circuit module includes a switch connected between the DC bus bars and configured to short the DC bus bars in response to the change in the received voltage difference being greater than the predetermined threshold. The switch can have an electrical switch or a mechanical switch. In certain embodiments not according to the invention as such, the switch is configured to be turned off in response to the loss of the received voltage difference. Due to the switch, the DC bus bars are hard wired and thus short-circuited.In certain embodiments, the electronic circuit further includes an overcurrent protection device to shut down the circuit in response to an overcurrent due to the short circuit condition. In certain embodiments, the electronic circuit further includes fuses connected in the DC bus bars and configured to be burned when the DC bus bars are short-circuited. In certain embodiments, the circuit further includes fuses connected to AC lines from which a DC voltage is converted and then supplied to the DC bus bars, wherein the fuses are configured to be burned upon shorting the DC bus bars. The fuses help disconnect the DC bus bars from the power supply to avoid possible damage.In another aspect, the present disclosure relates to a device including the electronic circuit described above. The device can be a frequency converter, a motor drive or the like.In a further aspect, the present disclosure relates to a method with the features of claim 9 for operating an electronic circuit according to the invention.The electronic circuit has a first series circuit of intermediate circuit capacitors and a second series circuit of intermediate circuit capacitors connected in parallel between direct current bus bars (DC+, DC-). The method includes: monitoring a voltage difference between a first node between the first series DC link capacitors and a second node between the second series DC link capacitors, the first node and the second node selected to have substantially the same voltage in a normal state of the DC link capacitors; and shorting the DC bus bars in response to the monitored voltage difference being greater than a predetermined threshold.In another aspect, the present disclosure relates to a frequency converter having the features of claim 10.The frequency converter includes: DC bus bars configured to supply DC current; a first series circuit of DC link capacitors and a second series circuit of DC link capacitors connected in parallel between DC bus bars, the first series having a first node between their DC link capacitors and the second series having a second node between their DC link capacitors, the first node and the second node having substantially the same voltage in a normal state of the DC link capacitors; and a short circuit module configured to receive a voltage difference between the first node and the second node and short the DC bus bars in response to a change in the received voltage difference being greater than a predetermined threshold.The short circuit module includes an arc generating component disposed at a distance of less than 10 cm from the DC bus bars and operable to generate an electric arc in response to the change in the received voltage difference being greater than the predetermined threshold, whereinat least parts of the respective direct current busbars are arranged close to one another and the arc-generating component is arranged between the respective sections of the direct current busbars and / orthe respective portions of the DC bus bars have electrode tabs led out from the respective DC bus barsThese and other aspects of the present disclosure will become apparent from the following description of the preferred embodiment taken in conjunction with the following drawings and their captions, with variations and changes being made therein without departing from the spirit and scope of the novel concepts of the disclosure.BRIEF DESCRIPTION OF THE DRAWINGSThe present disclosure will be better understood from the detailed description and the accompanying drawings, wherein: FIG. 1 schematically illustrates a principle for monitoring a short-circuited state of an intermediate circuit capacitor according to certain embodiments of the present disclosure. FIG. 2 schematically illustrates a simplified arrangement for monitoring a shorted state of an intermediate circuit capacitor according to certain embodiments of the present disclosure. FIG. 3 schematically illustrates a circuit design in accordance with certain embodiments of the present disclosure. FIG. 4 schematically illustrates another circuit design according to certain embodiments, which as such are not according to the present disclosure. FIG. 5 schematically illustrates an arrangement of short-circuiting DC bus bars according to certain embodiments of the present disclosure.DETAILED DESCRIPTIONThe present disclosure will be further described in the following examples, which are intended to be illustrative only, as numerous modifications and variations therein will be apparent to those skilled in the art. Various embodiments of the disclosure will now be described in detail. Referring to the drawings, like numerals, if any, indicate like components throughout the views. As used in the specification herein and in the following claims, the meaning of "a", "an" and "the" includes reference to the plural, unless the context dictates otherwise. As used in the specification herein and in the following claims, the meaning of "in" also includes "in" and "on" unless the context clearly requires otherwise. Moreover, titles or subtitles may be used in the specification for convenience sake, which have no influence on the scope of the present disclosure. In addition, some terms used in this specification are defined in more detail below.The terms used in this specification generally have their ordinary meaning in the art within the scope of the disclosure and in the specific context in which each term is used. Certain terms used to describe the disclosure are discussed below or elsewhere in the specification to provide additional guidance to the practitioner regarding the description of the disclosure. For clarity, certain terms may be highlighted, e.g., by italics and / or guide characters. The use of highlights has no influence on the scope and meaning of a term; the scope and meaning of a term are the same, in the same context, regardless of whether it is highlighted or not. It will be appreciated that the same may be said in more than one way. Thus, for one or more of the terms discussed herein, alternative terms and synonyms may be used, nor is it of particular importance whether or not a term is worked out or discussed herein. Synonyms for certain terms are given. Mention of one or more synonyms does not exclude the use of other synonyms. The use of examples anywhere in this specification, including examples of terms treated herein, is illustrative only and in no way limits the scope and meaning of the disclosure or an exemplary term. Also, the disclosure is not limited to various embodiments in this specification.Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure relates. In the case of conflict, the present document including definitions applies.As used herein, "about", "about" or "about" generally means within 20 percent, preferably within 10 percent, and more preferably within 5 percent of a particular value or range. The numerical quantities given herein are approximate, i.e., the term "round", "over" or "approximately" can be deduced unless expressly stated.As used herein, "plurality" means two or more.As used herein, the terms "comprise," "include," "carry," "have," "contain," "include," "engage," and the like are to be understood as open-ended, i.e., as including, but not limited to.As used herein, the term at least one of A, B, and C should be construed to mean a logical (A or B or C) using a non-exclusive logical OR. It should be understood that one or more steps within a method may be performed in different orders (or concurrently) without altering the principles of the present disclosure.FIG. 1 schematically illustrates a principle for monitoring a short-circuited state of an intermediate circuit capacitor according to certain embodiments of the present disclosure.In FIG. 1, DC bus bars, DC+ and DC- are shown. These DC bus bars are configured to provide a DC signal (either a voltage or a current) and / or a DC power. For example, the DC bus bars connect a rectifier to an inverter. Intermediate circuit capacitors are connected between the DC busbars in order, for example, to keep the DC voltage between the DC busbars substantially constant. These DC link capacitors may be electrolytic capacitors, but the present disclosure is not limited thereto.There may be more than one series connection of intermediate circuit capacitors connected in parallel between the DC bus bars. Two of these, row A and row B, are shown in Figure 1. In each of the rows, a plurality of capacitors are connected in series. For example, row A includes first through mth series capacitors C A1,.., C am and row B includes first through nth series capacitors C B1,.., C Bn. Here, m and n are each an integer greater than or equal to 2, and in each of the rows, the respective capacitors included therein may have the same capacitance. For example, C A1= C A2=.. = C Am, and / or C B1= C B2=.. = C Bn. However, the present disclosure is not limited thereto. The capacitance of the respective capacitors can be adjusted as needed.At least some of the rows connected between the DC bus bars may have the same number of capacitors. For example, m could be equal to n. Moreover, at least some of the rows may have the same configuration as the others. For example, rows A and B have the same configuration, i.e., m=n and C A1: C A2:.. : C Am= C B1: C B2:.. : C Bn, more specifically, C A1= C B1, C A2= C B2,.., CAm=CBn.Each of the rows has some nodes between the respective capacitors included therein. For example, row A (m-1) has nodes between respective capacitors C A1,.., C Am, one of which is specifically shown as node A between capacitor C Ak and capacitor C A(k+1), where 1≤k<m. Similarly, row B (n-1) has nodes between respective capacitors C B1,.., C Bn one of which is specifically shown as node B between capacitor C BI and capacitor C B(I+1) where 1≤I<n. Node A and node B are considered as examples below.The inventors note that these nodes, e.g., node A and node B, can be used as trigger points when the capacitor(s) are shorted.In the normal state, the voltage is applied across the DC bus bars, DC+ and DC-, across each of the rows and thus distributed across the capacitors included in that row according to their respective capacitance values. As a result, the node A has a potential V A, which is determined by its capacitance value together with the capacitance values of the remaining capacitors of the row A, and the node B has a potential V B, which is determined by its capacitance value together with the capacitance values of the remaining capacitors of the row B. Therefore, in the normal state, a voltage difference UMbetween node A and node B, |V A- V B|, is determined by the capacitance values of the intermediate circuit capacitors and can therefore be referred to as a "standard" voltage difference.When one or more of the intermediate circuit capacitors are short-circuited, the voltage difference UM between node A and node B. changes, For the sake of clarity, it is assumed that one or more of the capacitors of the series B, C B1,.., C Bn, are short-circuited. Due to the short-circuited capacitors, the potential at the nodes B, V, B, changes, which results in the voltage difference UM ändert and thus deviating from the standard voltage difference. Therefore, it is possible to know whether or not one of the DC link capacitors is short-circuited by monitoring the voltage difference UMbetween node A and node B.In certain embodiments, node A and node B may have substantially the same potential or voltage in the normal state. This can be achieved, for example, by arranging the rows A and B in the same configuration and selecting the nodes A and B at the same position in the respective row. In this case, the voltage difference UM between node A and node B may be regarded as a voltage change (since the default value difference is about 0).The change in the voltage difference UM(or the short circuit of any capacitor) may be used to trigger safety measures, e.g., fuse blow. To this end, the DC bus bars DC+ and DC- may be short-circuited by a short-circuit module in response to the change in the voltage difference. There are various implementations for the short circuit module, some of which are described in more detail below. For example, the short-circuit module can be designed such that it becomes effective when the change in the voltage difference is greater than a predefined threshold value. The short circuit of the DC bus bars accelerates the blowing of the fuses and thus prevents the explosion and the earth fault of the remaining capacitors.FIG. 2 schematically illustrates a simplified arrangement for monitoring a shorted state of an intermediate circuit capacitor according to certain embodiments of the present disclosure.In FIG. 2, row A is shown with two capacitors, C A1 and C A2, and row B is also shown with two capacitors, C B1 and C B2, respectively. The centers A and B of the respective row are monitored. For simplicity, center A and center B have substantially the same potential in the normal state. This is achieved by the provision of C A1: C A2= C B1: C B2, more specifically, C A1= C A2 and C B1= C B2. It is also possible to provide C A1= C A2= C B1= C B1= C B2. In this case, the midpoints A and B each hold one-half of the voltage across the DC bus bars (e.g., about 700V). Therefore, the standard value for the voltage difference UM is about zero (0).Let C B2 be short-circuited for convenience of explanation. All of the voltage across the DC bus bars, about 700V, is now applied to C B1 which is likely to result in an explosion of C B1. In this case, the voltage difference UM ändert from about 0V to about 350V. This significant voltage change of approximately 350 V can be used to trip the short-circuit module. In this case, the trigger threshold may be set to a value between 0V and 350V, e.g., to about 100V.FIG. 3 schematically illustrates a circuit design in accordance with certain embodiments of the present disclosure.As shown in FIG. 3, the circuit 300 includes DC bus bars, DC+, and DC- and DC-link capacitors connected between the DC bus bars. The DC link capacitors are arranged as in FIG. 2 for convenience of explanation, but the present disclosure is not limited thereto.The circuit 300 further includes an arc generating component 301, which is an example of the short circuit module described above. The arc generating component 301 is a component that can generate an arc in response to a voltage that is, for example, greater than its clearance voltage (corresponding to the trigger threshold, e.g., about 100V). For example, the arc generating component 301 may break down, remain short circuited, and thus ignite the arc. The arc generating component 301 may include at least one of a transient voltage suppressor (TVS) diode, a zener diode, a resistor, a varistor, an active component such as a semiconductor switch (e.g., transistors), a SIDACtor, a fuse, a copper trace or wire, or any combination thereof. For example, the arc generating component 301 may include multiple TVS diodes connected in series to achieve the desired clearance voltage or triggering threshold.The clearance voltage or the trigger threshold may be selected accordingly. In particular, the standard value and all possible change values (due to the short circuit of a capacitor) are taken into account for the voltage difference between node A and node B and thus the differences between the standard value and the different change values. From the differences, the clearance voltage or the trigger threshold may be determined. More specifically, the offset voltage or trigger threshold may be less than each of the differences, but still account for the overall variation of the circuit.In this example, the voltage difference between node A and node B is applied to the arc generating component 301. This voltage difference corresponds to the change in voltage difference as described above. When the voltage difference changes to about 350V, e.g., due to the described short circuit of capacitor C B2, arc generating component 301 generates the arc by applied voltage 350V that is greater than its clearance voltage of, e.g., 100V.The arc generating component 301 is disposed adjacent to the DC bus bars so that the generated arc may result in a short circuit of the DC bus bars. More specifically, the arc generating component 301 is disposed proximate the DC bus bars, for example, less than about 10 cm from each of the DC bus bars, such that the generated arc can establish an electrical path between the DC bus bars. Moreover, the DC bus bars may have at least a respective part thereof closely arranged so that they can be relatively easily short-circuited by the arc. The arrangement of the arc generating component 301 with respect to the DC bus bars will be described in more detail below. The short circuit of the DC bus bars may speed the blowing of fuses, e.g. those arranged in AC lines 305 AC and / or in the DC bus bars 305 DC. Here, a component 303 is connected between the AC lines and the DC lines. The component 303 may perform AC / DC conversion, filtering, or the like. For example, component 303 comprises NFE. At least a portion of the fuses burn through and thus this circuit 300 is placed in a safe state, thereby avoiding a possible explosion of the remaining capacitors.FIG. 4 schematically illustrates another circuit design in accordance with certain embodiments of the present disclosure.The circuit 400 shown in FIG. 4 is substantially identical to the circuit 300 shown in FIG. 3, except that a switch 401 is used instead of the arc generating component 301.The switch 401 is connected between the DC bus bars and is controlled to be turned on and off by a controller 407. In the normal state, the switch 401 is in an open state.In this example, the voltage difference between node A and node B is applied to controller 407. This voltage difference corresponds to the change in voltage difference as described above. When the voltage difference changes to about 350V, e.g., due to the described short circuit of capacitor C B2, controller 407 generates a control signal to close switch 401, in response to applied voltage 350V being greater than a threshold voltage of switch 401, e.g., 100V. Thus, the bus bars DC+ and DC- are hardwired and thus short-circuited via the switch 401. The switch 401 may include, for example, an electric switch or a mechanical switch.In certain embodiments, the switch 401 may be configured to be turned off in response to the loss of the applied voltage (or voltage difference). That is, the switch 401 can be automatically reset in the absence of a voltage, because, for example, the fuses burn out and thus the circuit is disconnected from the power supply.FIG. 5 schematically illustrates an arrangement of short-circuiting DC bus bars according to certain embodiments of the present disclosure.As shown in FIG. 5, a substrate 510 includes an arc generating component 520. The substrate 510 may include a glass substrate, a plastic substrate, a ceramic substrate, a printed circuit board (PCB), or the like. The arc generating component 520 may be the arc generating component 301 described above, for example, a series circuit of TVS diodes. The arc generating component 520 may be fixed on the substrate 510 by soldering, bonding, mechanical fasteners, or the like. Two terminals 511 and 513 may be provided on the substrate 510. One of the two terminals 511 and 513 can be connected to the node A and the other of the two terminals 511 and 513 can be connected to the node B. Further, the two terminals 511 and 513 are connected to the respective terminals of the arc generating component 520 to apply the voltage difference between node A and node B between the terminals. The connections between the connections and / or the components can be galvanic connections.A tab led out from DC+ 531 and a tab led out from DC-533 are arranged close to each other and also close to the arc generating component 520. The arc generating component 520 may be disposed between the tab 531 and the tab 533. In this example, the arc generating component 520 is disposed facing both the tab 531 and the tab 533. In such an arrangement, a short circuit path is likely to be present between the tab 531 and the tab 533 when the arc generating component 520 ignites the arc.In another aspect, the present disclosure relates to an apparatus having the above-described circuit. For example, the device can be a frequency converter, a motor drive or the like.The foregoing description of the exemplary embodiments of the disclosure has been presented for purposes of illustration and description only and is not intended to be exhaustive or to limit the disclosure to the forms disclosed. Many modifications and variations are possible in light of the above teachings.The embodiments were chosen and described in order to explain the principles of the disclosure and its practical application, to enable others skilled in the art to utilize the disclosure and various embodiments with various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to others skilled in the art to which the present disclosure pertains without departing from its spirit and scope. Accordingly, the scope of the present disclosure is defined not by the foregoing description and the exemplary embodiments described therein, but by the appended claims.

Claims

An electronic circuit comprising: a first series connection of intermediate circuit capacitors (CA1,..., CAm) and a second series connection of intermediate circuit capacitors (CB1,..., CBn) connected in parallel between DC bus bars (DC+, DC-), the first series comprising a first node (A) between their intermediate circuit capacitors and the second series comprising a second node (B) between their intermediate circuit capacitors, the electronic circuit further comprising a short circuit module (301) configured to receive a voltage difference (UM) between the first node and the second node and cause short-circuiting of the DC bus bars in response to a change in the received voltage difference being greater than a predetermined threshold, characterized in that the short circuit module comprises an arc generating component (301; 520) arranged at a distance of less than 10 cm from the direct current bus bars (DC+, DC-) and operable to generate an electric arc in response to the change in the received voltage difference (UM) being greater than the predetermined threshold value, wherein - at least parts of the respective direct current bus bars (DC+, DC-) are arranged close to each other and the arc generating component (301; 520) is arranged between respective portions of the direct current bus bars (DC+, DC-) and - the respective portions of the direct current bus bars (DC+, DC-) have electrode tabs (531, 533) led out from the respective direct current bus bars (DC+, DC-).The electronic circuit of claim 1, wherein the first node (A) and the second node (B) have substantially the same voltage in a normal state of the DC link capacitors.The electronic circuit of claim 1 or 2, wherein the arc generating component (301; 520) is operable to explode when the change in the received voltage difference (UM) is greater than the predetermined threshold.The electronic circuit of any preceding claim, wherein the arc generating component (301; 520) comprises at least one of a TVS diode, a zener diode, a resistor, a varistor, an active component, a SIDACtor, a fuse, a copper trace or wire, or any combination thereof.The electronic circuit of claim 4, wherein the active component comprises a semiconductor switch.The electronic circuit of any preceding claim, further comprising fuses (305 DC) connected in the DC bus bars (DC+, DC-) and configured to blow when the DC bus bars (DC+, DC-) are short-circuited.The electronic circuit of any preceding claim, further comprising fuses (305 AC) connected to AC lines from which a DC voltage is converted and then supplied to the DC bus bars (DC+, DC-), wherein the fuses (305 AC) are configured to blow when the DC bus bars (DC+, DC-) are short-circuited.An apparatus comprising the electronic circuit of any preceding claim.Method for operating an electronic circuit according to any of the preceding claims, wherein the electronic circuit comprises a first series connection of intermediate circuit capacitors (CA1,..., CAm) and a second series connection of intermediate circuit capacitors (CB1,..., CBn) connected in parallel between direct current bus bars (DC+, DC-), characterized in that the method comprises: monitoring a voltage difference (UM) between a first node (A) between the intermediate circuit capacitors (CA1,..., CAm) of the first series and a second node (B) between the intermediate circuit capacitors (CB1,..., CBn) of the second series, wherein the first node (A) and the second node (B) are selected to have substantially the same voltage in the normal state of the intermediate circuit capacitors; Shorting the DC bus bars (DC+, DC-) in response to the monitored voltage difference (UM) being greater than a predetermined threshold.A frequency converter comprising: DC bus bars (DC+, DC-) configured to supply DC current, a first series circuit of DC link capacitors (CA1,..., CAm), and a second series circuit of DC link capacitors (CB1,..., CBn) connected in parallel between DC bus bars (DC+, DC-), wherein the first series comprises a first node (A) between their DC link capacitors and the second series comprises a second node (B) between their DC link capacitors, wherein the first node (A) and the second node (B) comprise substantially the same voltage in a normal state of the DC link capacitors, wherein frequency converter further comprises a short circuit module (301) configured to:, to receive a voltage difference (UM) between the first node and the second node and to cause the DC busbars to short-circuit in response to a change in the received voltage difference that is greater than a predetermined threshold value, characterized in that the short-circuit module comprises an arc-generating component (301; 520) arranged at a distance of less than 10 cm from the DC busbars (DC+, DC-) and operable to generate an electric arc in response to the change in the received voltage difference (UM) that is greater than the predetermined threshold value, wherein at least parts of the respective DC busbars (DC+, DC-) are arranged close to one another and the arc-generating component (301; 520) is arranged between respective portions of the direct current bus bars (DC+, DC-), and wherein the respective portions of the direct current bus bars (DC+, DC-) have electrode tabs (531, 533) led out from the respective direct current bus bars (DC+, DC-).

Images