Method for contacting a metallic contact surface in a printed circuit board and printed circuit board

Abstract

Method for contacting a metallic contact surface (34, 36, 38) embedded in a printed circuit board layer sequence (10), comprising the following steps: - Creating a first hole matrix with a plurality of first holes (L1) in a surface of the printed circuit board layer sequence (10) to partially expose the metallic contact area (34, 36, 38), - Applying a metal layer (11) to at least partially fill the first holes (L1), - Generating a second hole matrix with a plurality of second holes (L2) in the surface of the printed circuit board layer sequence (10) to partially expose the metallic contact area (34, 36, 38), wherein the holes (L2) of the second hole matrix are arranged offset relative to the holes (L1) of the first hole matrix, - Applying a metal layer (13) to at least partially fill the second holes (L2).

Description

Technical field

[0001] The present invention relates to a method for contacting a metallic contact surface embedded in a printed circuit board layer sequence, and to a printed circuit board with a metallic contact surface embedded therein. Description of the state of the art

[0002] Metallic contact surfaces incorporated or embedded in printed circuit boards, e.g. contact surfaces on components such as semiconductors, power semiconductors, chips, transistors, or on ceramic layers or the like, must be contacted for connection to a circuit and / or for heat dissipation.

[0003] It is known in the prior art to expose a metallic contact surface (e.g., made of copper) of a component embedded in a printed circuit board layer sequence and then apply a metal to contact the surface. Particularly when contacting power semiconductors, the contact surface is often exposed over a large area to establish a large contact. This has the advantage of high electrical conductivity and low thermal resistance. However, a common problem in the prior art is that applying a large metal surface to the exposed area does not result in a planar surface. This can lead to difficulties when subsequently mounting the printed circuit board onto a heat sink.

[0004] As an alternative to exposing the contact surfaces over a large area, contact can also be established using several parallel blind holes, which can then be electroplated with copper. While blind holes result in a planar surface, the bonding is only achieved at specific points within a grid defined by a maximum hole size and a minimum hole spacing. The maximum hole size and minimum hole spacing are in the range of approximately 200 µm. The maximum bonding rate of such a grid is therefore less than 50%. If the minimum hole spacing is not met, there is a risk that the prepreg layer will lose adhesion, thus preventing reliable metallization.

[0005] DE 19723409 A1 discloses a control unit with at least two housing parts and a printed circuit board clamped between their edge regions, equipped with at least one power component and having a thermally conductive layer, wherein the thermally conductive layer is a copper layer attached to the printed circuit board, which is covered with a solder mask layer in which, at least where it rests on the housing part opposite it, a plurality of thermally conductive contact elements arranged separately in a grid pattern are formed.

[0006] US patent 2011 / 0117357 A1 describes a microstructure with excellent long-term stability that enables simple bonding by thermocompression bonding with high bond strength. The microstructure comprises an insulating base in which continuous (partially) metallized micropores with a pore size of 10 to 500 nm are arranged at a density of 1×10⁶ to 1×10¹⁰ micropores / mm².

[0007] As US 2007 / 0 230 150 A1 demonstrates, arrangements are known in power electronics in which the current-carrying capacity is increased by means of matrix-like connection schemes. Summary of the invention

[0008] Based on this, a method with the features of claim 1 and a printed circuit board with the features of claims 10 and 11, respectively, are proposed. Embodiments of the invention are described in the dependent claims.

[0009] According to the invention, to contact a metallic surface of a contact area embedded in a printed circuit board layer structure, a number of first holes are first introduced into a surface of the printed circuit board configuration and these first holes are then filled with conductive material. Subsequently, a number of second holes are introduced into the surface of the printed circuit board configuration between the filled first holes and are likewise subsequently filled with conductive material.

[0010] The invention is based on the understanding that creating holes to expose the contact surfaces is advantageous compared to exposing the contact surfaces over a large area. The dimensions of the holes can be selected such that the subsequently applied metal layer has an optimal surface and, in particular, good planarity. This facilitates further process steps, such as mounting the printed circuit board onto a heat sink, since, due to the high planarity of the metal surface, it can either be applied directly to the heat sink or subsequent surface treatment steps (e.g., grinding) are at least less complex.

[0011] According to the invention, the method comprises the following steps: - Creating a first hole matrix with a plurality of first holes in a surface of the printed circuit board layer sequence to partially expose the metallic contact area, - Applying a metal layer to at least partially fill the initial holes, - Generating a second hole matrix with a plurality of second holes in the surface of the printed circuit board layer sequence to partially expose the metallic contact area, wherein the holes of the second hole matrix are offset relative to the holes of the first hole matrix, - Applying a metal layer to at least partially fill the second set of holes.

[0012] The majority of the initially introduced holes together form a first hole matrix. In the context of the present invention, the term "hole matrix" refers to a collection of holes arranged in a specific configuration relative to one another.

[0013] In a further step, the initial holes are at least partially filled by applying a metal layer. This brings the exposed areas of the metallic contact surface into contact with the applied metal layer.

[0014] Furthermore, a plurality of second holes are created in the surface of the printed circuit board layer sequence, thus at least partially exposing the metallic contact area. The majority of the second holes created in this step together form the second hole matrix. The holes of the second hole matrix are offset relative to the holes of the first hole matrix. This means that the holes from different hole matrices are arranged in different positions. The positions of the holes of the second hole matrix can be chosen so that they do not overlap with the holes of the first hole matrix, or they can be chosen to overlap (an overlapping arrangement can, if necessary, serve to remove dielectric residue from the corners of the first holes). The holes thus created are then also at least partially filled by a metal layer.

[0015] For example, the hole is created by a process sequence of etching to remove the copper, followed by ablation of the dielectric down to the metallic surface to be bonded, such as by a laser ablation process that acts selectively on the dielectric.

[0016] In known manufacturing processes, holes can only be produced at a specific minimum distance from each other. For example, with known laser drilling methods, holes with a maximum diameter of approximately 200 µm can be produced within a single process step at a minimum hole spacing of about 400 µm. This inevitably creates a gap between the holes that cannot be used for contacting. The surface utilization of a contact produced in this way is only about 35%. If the hole diameters are chosen to be larger, filling with copper via electroplating no longer works, as the metallization then follows the profile, leading to a deeper metallized surface with the disadvantages described. If the hole spacing is chosen to be significantly smaller, there is a risk that the dielectric will lose adhesion to the metallic contact and the subsequent electroplating will be defective.

[0017] By providing the second hole matrix according to the invention, whose holes are offset relative to those of the first hole matrix, it is possible to utilize the available contact area much more effectively. This results in a large contact area with greater thermal mass and thus low thermal resistance, as well as high current conductivity and lower on-resistance, while simultaneously maintaining or achieving good planarity of the contact surfaces (improved connection). The hole matrices can be produced, for example, by laser drilling or by an etching process, each followed by dielectric removal using laser processing.

[0018] The first and second hole matrices can each be formed by a first and second grid, respectively. In this context, the term "grid" means that the holes have a regular arrangement relative to each other. In this case, the holes are equidistant along one spatial direction. This regularity can exist along a first spatial direction as well as along a second spatial direction that differs from the first. In this case, the holes are also equidistant along the second direction. The distances between two holes along the first spatial direction can be identical to the distances between holes along the second spatial direction.

[0019] The first and / or second grid can also be rectangular. This means that the first spatial direction is perpendicular to the second spatial direction. This simplifies the production of the holes, as manufacturing processes for creating holes are often designed for a rectangular arrangement.

[0020] The arrangement of holes in a grid can be described, for example, using an imaginary coordinate system and a two-dimensional basis {a,b} consisting of the basis vectors a and b, which span the grid. The basis vectors are non-zero and point in different spatial directions. A hole matrix forms a grid if the position of each hole, starting from an origin of the imaginary coordinate system, can be described by adding the basis vectors according to (n · a + m · b), where n and m are chosen from the set of integers. The position of a hole is then uniquely determined by specifying the values ​​(n,m). The origin of the imaginary coordinate system can, for example, be placed at the center of one of the holes. In this case, there is a hole at the origin of the imaginary coordinate system, as well as, for example, at the positions (1,0), (2,0), (3,0), (0,1), (0,2), (0,3), (1,1), (1,2), (2,1), etc.Holes arranged in a grid can be manufactured much more easily. Furthermore, due to the regular arrangement of the holes in a grid, the contact surfaces are contacted homogeneously across the entire contact area, resulting in homogeneous contact properties.

[0021] It can be provided that the first grid and the second grid are spanned by a two-dimensional basis {a,b}, wherein the holes of the first grid are arranged at positions (n,m), and wherein the holes of the second grid are arranged at positions ((n+12),(m+12)) The holes are arranged where n and m are to be selected from the set of integers. In this case, the first grid is offset relative to the second grid such that each hole of one grid is located midway between two holes of the other grid. This further increases the homogeneity of the contact and also results in good space utilization.

[0022] The holes can, in principle, have any shape. In possible embodiments, the hole matrices comprise circular and / or rectangular holes. For example, the holes can also have a square shape. In the case of square holes, the first and second hole matrices can together form a checkerboard pattern. This allows almost the entire available contact area to be utilized for contacting.

[0023] Another embodiment of the invention provides for the creation of a third hole matrix with a plurality of third holes in the surface of the printed circuit board layer sequence to partially expose the metallic contact area, wherein the holes of the third hole matrix are arranged offset relative to the holes of the first and second hole matrices. After the third hole matrix is ​​created, a metal layer is again applied so that the holes of the third hole matrix are at least partially filled with metal. The offset arrangement here means that the holes of the third hole matrix are arranged in a different position than the holes of both the first and second hole matrices (overlapping or non-overlapping, as described above). By using a further hole matrix, an even larger proportion of the contact area can optionally be utilized for contacting.

[0024] The invention can be further developed analogously by introducing additional dies with subsequent metal coating.

[0025] For applying the metal layer, an electrolytic deposition process known to experts is suitable, which deposits greater layer thicknesses in holes than on the surface. The process can be carried out in such a way that a raised layer of the coating metal is created above the holes to be filled, essentially overfilling the hole. This process has the advantage that these raised areas can be ground down in a subsequent step, further improving the flatness of the surfaces.

[0026] The invention further relates to a printed circuit board with a sequence of printed circuit board layers and a component embedded therein, which has at least one metallic contact surface, wherein the at least one metallic contact surface is contacted using the method according to the invention. The printed circuit board can be further developed by means of other features described in connection with the method according to the invention.

[0027] Further advantages and embodiments of the invention will become apparent from the dependent claims, the description and the accompanying drawing.

[0028] It is understood that the features mentioned above and those to be explained below can be used not only in the combinations specified, but also in other combinations or on their own, without leaving the scope of the present invention.

[0029] The invention is schematically illustrated in the drawing using exemplary embodiments and is described in detail below with reference to the drawing. Brief description of the drawing Fig. Figure 1 shows a lateral sectional view of a printed circuit board with an embedded component before execution of the method according to the invention. Fig. Figure 2 shows an enlarged view of the in Fig. 1 printed circuit board shown after the introduction of a first hole matrix according to the invention. Fig. 3 shows the circuit board of the Fig. 2 after filling the first hole matrix according to the invention. Fig. 4 shows the view of the Fig. 3 after the introduction of a second hole matrix according to the invention. Fig. 5 shows the view of the Fig. 4 after filling the second hole matrix according to the invention. Fig. Figure 6 shows a schematic top view of a partial area of ​​the printed circuit board according to the invention along a horizontal section through the layer plane of the copper foil. Fig. 5. Fig. Figure 7 shows a schematic top view of a partial area of ​​an alternative embodiment of a printed circuit board according to the invention along a horizontal section through the layer plane of the copper foil. Fig. Figure 8 shows a schematic top view of a partial area of ​​another embodiment of a printed circuit board according to the invention. Fig. 9 illustrates analogously to the representation of the Fig. 3 a deposition method for filling the first hole matrix with a superimposition above the filled holes. Fig. 10 shows the circuit board of the Fig. 9 with a sanded surface. Detailed description

[0030] Fig. Figure 1 shows a side-sectional view of a printed circuit board layer sequence 10.

[0031] A component 30 is embedded in the printed circuit board layer sequence 10. In the illustrated embodiment, the layer sequence comprises a substrate layer 12 and a copper inner layer 14 deposited thereon, on which the component 30 is applied by means of a contact layer or bonding layer 16 (sintered layer or solder layer). The substrate layer 12 can be a conductive or a non-conductive printed circuit board material, such as an FR-4 inner layer. In the former case, the copper inner layer 14 can be omitted.

[0032] The component 30 is embedded in a prepreg or dielectric layer 18, which is covered with a copper foil 20. In one variant, the latter could be omitted, so that only a dielectric layer is used. In this case, the surface and the hole walls would have to be coated with an adhesive and conductive material before copper could be deposited. This could be done, for example, by copper sputtering or chemical deposition.

[0033] The circuit board layout described is purely exemplary, and any other differing layout is readily apparent to the expert.

[0034] The component 30 can be - as in the illustrated embodiment - a field-effect transistor, with a semiconductor body 32 and terminals arranged on it in the form of contact surfaces, which are designated by the reference numerals 34 for the gate contact surface, 36 for the source contact surface and 38 for the drain contact surface.

[0035] It is readily apparent to a person skilled in the art that any other form of component with corresponding contact surfaces can be used for contacting according to the invention.

[0036] The inventive method is described below using the following examples: Fig. 2 to 5 explained, which represent a partial excerpt of the Fig. Figure 1 shows various stages of the inventive method. In particular, it shows how the source contact surface 36 is contacted using the inventive method.

[0037] First, for example, by means of a laser drilling process or by etching the copper foil and removing the dielectric with a laser, essentially circular holes L1 are created in the surface of the printed circuit board layer sequence 10. The copper foil 20 and the underlying dielectric 18 are thereby removed, and the contact surface 36 is partially exposed. In the example shown, the holes L1 have a diameter of 100 to 200 µm. The holes are spaced 500 µm apart along both a first and a second spatial direction. The first spatial direction is perpendicular to the second spatial direction, so that the totality of the holes L1 forms a first square grid. This will be further illustrated below. Fig. Section 6 explains in more detail. The state after the first hole matrix has been created is described in Fig. 2 shown. The cutting plane of the Fig. 2 runs along a diagonal of the square grid.

[0038] Subsequently, a metal layer 11 (which also extends thinly onto the copper foil 20) is applied, for example by means of an electrolytic deposition process or another method known to those skilled in the art, in order to fill the holes L1 with metal. This is described in the Fig. Figure 3 illustrates the electrolytic process described above. This process allows for increased deposition of the metal layer 11 in the areas exposed by the holes L1 and is therefore particularly suitable for filling the holes L1, possibly also with an increased thickness 28 of the filling of the holes L1, as shown in the illustration of the Fig. Figure 9 illustrates this. Fig. 10 shows the circuit board of the Fig. 9 after a flat grinding of the applied metal layer 11 to “level” the protrusions 28.

[0039] After the holes L1 of the first hole matrix are filled, a second grid is created in a subsequent process step, formed by a plurality of holes L2. The second grid is also square with a hole spacing of 500 µm and a hole diameter of 200 µm. The second grid is offset relative to the first grid, such that the holes L2 of the second grid are located midway between two holes L1 of the first grid (and vice versa). The state after the creation of the holes L2 of the second grid is in Fig. 4 shown.

[0040] Finally, in a subsequent process step, e.g. using the electrolytic filling process mentioned above, another metal layer 13 is applied to fill the holes L2 of the second grid (see Fig. 5; resulting in an upper layer sequence 20, 11, 13).

[0041] Fig. Figure 6 shows a schematic top view of a section of the Fig. The circuit board shown in Figure 5 is shown after filling the holes L2 of the second grid along a horizontal section through the layer plane of the copper foil 20. The section view schematically depicts the copper foil 20, the holes L1 of the first grid, the metal layer 11 in the first holes L1, the holes L2 of the second grid, and the second metal layer 13 in the second holes L2. The dashed line 22 indicates the section line along which the section views of the Fig. 1 to 5 are oriented. The section line 22 runs diagonally across the two square grids formed by the holes L1 and L2.

[0042] To explain the mathematical description of the lattices used above, in Fig. Figure 6 also shows an origin 21 of an imaginary coordinate system and the basis vectors a and b. According to this description, the two grids are spanned by the basis {a,b}. The origin 21 is located at the center of a hole L1 of the first grid. Vector a points from the origin to an adjacent hole L1 located at position (1,0). Vector b points from the origin to an adjacent hole L1 located at position (0,1). The length (magnitude) of vectors a and b is 500 µm each. The second grid is arranged such that each hole of the second grid is located essentially centrally between adjacent holes of the first grid. For example, a hole of the second grid is located at position (1,2, 1,2).

[0043] In a previously known application of a single hole matrix for contacting a contact surface, the available area is utilized to only about 35% with a hole diameter of 200 µm and a hole spacing of 500 µm. The second hole matrix according to the invention increases the area utilization to up to 75%.

[0044] The arrangement of the holes can be adapted according to the invention - as e.g. in the illustration of the Fig. As shown in Figure 6, the holes should be orthogonal to each other (imaginary connections between the centers of adjacent pairs of holes (L1, L2) form a square or rectangle), but the arrangement can also deviate from this. In the embodiment described below with a third hole matrix, the orthogonal arrangement is eliminated.

[0045] Fig. Figure 7 shows an alternative embodiment of a printed circuit board produced according to the inventive method in a schematic view from above along a section through the layer plane of the copper foil, similar to the Fig. 6. Analogous to the embodiment described above, the holes labeled “L1” of a first hole matrix were first created and then filled with metal. Next, the holes labeled “L2” of a second hole matrix were created and filled with metal. Finally, the holes labeled “L3” of a third hole matrix were created and filled with metal. The three hole matrices are designed in their geometric dimensions and relative arrangement such that together they form a hexagonal close-packed structure. This means that each hole in one hole matrix is ​​surrounded by six adjacent holes in the other two hole matrices, arranged at equal intervals. This further increases the area utilization.

[0046] Fig.Figure 8 shows a further embodiment of a printed circuit board produced according to the inventive method in a schematic top view, again along a section through the layer plane of the copper foil. In this embodiment, the holes L1 and L2 were produced using an etching process. In contrast to the embodiments described above, the holes have an approximately and substantially square shape and together form a checkerboard pattern. The area utilization can thus be increased to almost 100%.

[0047] By varying the square sizes, e.g., 200 µm edge length in the first pass and 220 µm edge length in the second pass, overlapping areas can be created that compensate for any misalignment and, through the overlap, would lead to the complete removal of the dielectric. The bond to the contact surface would thus be 100% on a flat surface.

Claims

[1] Method for contacting a metallic contact surface (34, 36, 38) embedded in a printed circuit board layer sequence (10), comprising the following steps: - Creating a first hole matrix with a plurality of first holes (L1) in a surface of the printed circuit board layer sequence (10) to partially expose the metallic contact area (34, 36, 38), - Applying a metal layer (11) to at least partially fill the first holes (L1), - Generating a second hole matrix with a plurality of second holes (L2) in the surface of the printed circuit board layer sequence (10) to partially expose the metallic contact area (34, 36, 38), wherein the holes (L2) of the second hole matrix are arranged offset relative to the holes (L1) of the first hole matrix, - Applying a metal layer (13) to at least partially fill the second holes (L2). [2] Method according to claim 1, wherein the first hole matrix is ​​formed by a first grid and the second hole matrix is ​​formed by a second grid. [3] Method according to claim 2, wherein the first grid and / or the second grid are perpendicular. [4] Method according to claim 2 or 3, wherein the first grid and the second grid are spanned from a two-dimensional basis {a,b}, wherein the holes (L1) of the first grid are arranged at the locations (n,m), and wherein the holes (L2) of the second grid are arranged at the locations ((n+12),(m+12)) are arranged, where n and m are to be selected from the set of integers ≥ 0. [5] Method according to any one of claims 1 to 4, wherein the hole matrix comprises circular holes (L1, L2). [6] Method according to any one of claims 1 to 4, wherein the hole matrix comprises rectangular, in particular square holes (L1, L2). [7] Method according to claim 6, wherein the first hole matrix and the second hole matrix together form a checkerboard pattern. [8] Method according to any one of claims 1 to 7, wherein a third hole matrix with a plurality of third holes (L3) is generated in the surface of the printed circuit board layer sequence (10) to partially expose the metallic contact area (34, 36, 38), wherein the holes (L3) of the third hole matrix are arranged offset relative to the holes (L1, L2) of the first and second hole matrix, wherein after generating the third hole matrix a metal layer is applied so that the third holes (L3) are at least partially filled with metal. [9] Method according to any one of claims 1 to 8, wherein the holes (L1, L2, L3) are produced by laser drilling, an etching process or a combination of both processes and / or wherein the application of the metal layer (11, 13) is carried out by an electrolytic filling process. [10] Printed circuit board with a printed circuit board layer sequence (10) and at least one metallic contact surface (34, 36, 38) embedded therein, wherein the at least one metallic contact surface (34, 36, 38) is contacted by means of a method according to one of claims 1 to 9. [11] Printed circuit board with a printed circuit board layer sequence (10) and at least one metallic contact surface (34, 36, 38) embedded therein, wherein the at least one metallic contact surface (34, 36, 38) comprises a first hole matrix with a plurality of first holes (L1) in a surface of the printed circuit board layer sequence (10) and a second hole matrix with a plurality of second holes (L2) in the surface of the printed circuit board layer sequence (10), wherein the holes (L2) of the second hole matrix are arranged offset relative to the holes (L1) of the first hole matrix and wherein the first holes (L1) are at least partially filled by means of a first metal layer (11) and the second holes (L2) are at least partially filled by means of a second metal layer (13). [12] Printed circuit board according to claim 11, wherein the second metal layer (13) for filling the second hole matrix is ​​at least partially applied or deposited on the first metal layer (11) for filling the first hole matrix.

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