Calibration devices for I / O driver circuits with switches that are biased differently for different temperatures.

Abstract

Integrated circuit device, comprising: an input / output driver (104); a calibration circuit (106) which is electrically connected to the input / output driver (104); a bias generator (108) which is electrically connected to the calibration circuit (106) and the input / output driver (104); a temperature sensor (110) electrically connected to the bias generator (108), wherein the calibration circuit (106) and the input / output driver (104) each comprise a bank of resistors (130) and corresponding switches (114), the bodies of the switches (114) being electrically connected to the bias generator (108), and wherein the switches (114) are biased by a bias signal output by the bias generator (108); and a comparator device (116) electrically connected to the calibration circuit (106) and a reference resistor (118), wherein the comparator device (116) matches a resistance of the calibration circuit (106) to the reference resistor (118), wherein the bias generator (108) sets the bias signal when a temperature change is detected by the temperature sensor (110), and wherein the switches (114) change a current flow when the bias signal changes, without changing which switches (114) are activated and deactivated.

Description

BACKGROUNDField of the invention

[0001] The present invention relates to calibration devices used with input / output (I / O) driver circuits, and more particularly to calibration devices for I / O driver circuits having switches biased differently for different temperatures. Description of the state of the art

[0002] Circuits that transmit and receive data are generally referred to as input / output (I / O) devices. Calibration circuits help I / O devices maintain the correct voltages, both during cold start-up and when the I / O device's temperature changes during transmission and reception. For example, calibration of I / O driver devices can be performed relative to an external resistor or resistance off-chip that is not subject to the temperature fluctuations experienced by the I / O device.

[0003] Therefore, high-speed I / O drivers are often calibrated to the fixed impedance (e.g., 40 ohms, 50 ohms, etc.) of the external resistor. These drivers use binary-weighted driver banks to calibrate the impedance for the fixed external resistance. However, because such systems are binary (each resistor device in the bank is either off or on (0 or 1)), there is always the possibility that a large number of resistors within the driver bank can be switched simultaneously, introducing unwanted noise into the I / O driver output.

[0004] For example, a binary code of 0111 can become 1000 with just a small change in the I / O device temperature. Specifically, a change from binary 0111 to binary 1000 in a bank of 4 resistors would cause all members of the driver bank to toggle, which can lead to signal noise (especially if no calibration cycle is assigned in the data transfer protocol (e.g., DDR4, etc.)). To solve this problem, designers have used thermometer coding techniques; however, such solutions increase the design complexity of the circuitry upstream of the driver, increase the consumed chip area, and require driver-to-driver signal routing alignment. Document US 2015 / 0 227 158 A1 describes a semiconductor device comprising a voltage generation unit that generates a first voltage with a first temperature characteristic, a constant voltage generation unit that generates a constant voltage, and an adjustment unit that uses the first voltage and the constant voltage to generate a second voltage with a second temperature characteristic and a third voltage with a third temperature characteristic. The constant voltage generation unit generates the constant voltage independently of the adjustment unit. One of the second and third temperature characteristics is a characteristic opposite to the first temperature characteristic. Document US 6 097 113 A describes that, in accordance with selection signals corresponding to an operating mode from a mode detection circuit, the voltage levels of substrate gate voltages applied to the substrate gates of MOS transistors included in the internal circuit are selected by the selection signals from among the voltages of voltage generation circuits to generate a plurality of voltages with different voltage levels. The threshold voltage and drive current of the MOS transistor are adjusted according to the operating mode. SUMMARY

[0005] Exemplary integrated circuit devices herein include (among other components) a logic circuit that receives and generates data signals, and an input / output driver electrically connected to the logic circuit. The input / output driver has transmit and receive terminals that transmit and receive the data signals to and from the logic circuit.

[0006] These structures also include a calibration circuit electrically connected to the input / output driver, a bias generator electrically connected to the calibration circuit and the input / output driver, and a temperature sensor electrically connected to the bias generator. The calibration circuit and the input / output driver include resistor banks (at least one binary-weighted bank) and corresponding switches. The bodies of the switches are electrically connected to the bias generator, and the switches are biased by a bias signal output from the bias generator. In addition, the calibration circuit includes a comparator device electrically connected to the switches of the calibration circuit and a reference resistor (a fixed impedance).

[0007] Selected switches are enabled and disabled to adjust the reference resistance at startup. Additionally, the bias generator adjusts the bias signal when a temperature change is detected by the temperature sensor. Specifically, the bias generator (in response to a temperature change output from the temperature sensor) initiates a calibration procedure by sweeping the body bias of the switches only in the calibration circuit until the output impedance of the resistor bank array in the calibration circuit matches the impedance of the external resistor (as detected by the comparator). Once the impedance of the driver bank of the calibration circuit and the external resistor matches, the appropriate body bias is applied to all output drivers outside the calibration circuit. Calibration is linear to compensate for temperature variations.Thus, the switches change the current flow when the bias signal changes, and this change in current flow caused by the bias signal adjusts how the calibration circuit calibrates the input / output driver without changing which of the switches is enabled or disabled.

[0008] Furthermore, the activation and deactivation of the switches occurs when the input / output driver performs a power-up operation. However, the bias generator adjusts the bias signal based on temperature changes that occur after the input / output driver completes the power-up operation. In other words, none of the switches are activated or deactivated after the input / output driver completes the power-up operation, because the change in current flow through the resistors caused by the bias signal adjusts as the calibration circuit calibrates the input / output driver.

[0009] In some structures, the input / output driver and calibration circuitry are positioned on one substrate, but the reference resistor is located on another substrate separate from that one substrate.

[0010] Various methods described herein include (among other processes) providing an input / output driver and connecting a calibration circuit to the input / output driver. The calibration circuit and the input / output driver each include a bank of resistors (e.g., a binary weighted bank) and corresponding switches. Such methods also connect a bias generator to the calibration circuit and an input / output driver by connecting the bodies of the switches to the bias generator. The switches are biased by a bias signal output from the bias generator.

[0011] Furthermore, these methods connect a temperature sensor to the bias voltage generator, connect a comparator device to the switches of the calibration circuit, and connect the comparator to a reference resistor. When forming such connections, the input / output driver and the calibration circuit may be positioned on a first substrate, and the reference resistor may be positioned on another substrate separate from the first substrate.

[0012] The comparator device adjusts the resistance of the calibration circuit to the resistance of the reference resistor. The bias generator adjusts the bias signal when a temperature change is detected by the temperature sensor, and the switches change the current flow when the temperature and bias signals change. Thus, the change in current flow caused by the bias signal changes adjusts how the calibration circuit calibrates the input / output driver without changing which of the switches is enabled or disabled.

[0013] The switches are enabled and disabled when the input / output driver performs a power-up operation, but the bias generator adjusts the bias signal based on temperature changes that occur after the input / output driver completes the power-up operation. Thus, none of the switches are enabled or disabled after the input / output driver completes the power-up operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The embodiments described herein will be better understood from the following detailed description with reference to the drawings, which are not necessarily drawn to scale. Fig. 1 is a schematic diagram showing a calibration I / O circuit according to embodiments described herein; Fig. Figure 2 is a schematic diagram showing a portion of the Fig. 1; Fig. 3 is a diagram showing the drive current calibration variation produced by the structures described herein; and Fig. 4 is a flowchart illustrating method embodiments herein. DETAILED DESCRIPTION

[0015] As mentioned above, with binary resistor banks used in calibration circuits for input / output (I / O) driver circuits, there is a potential for a large number of resistors within the driver bank to be switched simultaneously, introducing unwanted noise into the I / O driver output. In view of this, the structures and methods described herein provide calibration devices and procedures for I / O driver circuits that have differently biased switches for different temperatures, rather than switching which resistors are active. This eliminates the possibility of unwanted noise associated with simultaneously switching multiple resistors within the driver banks.

[0016] More specifically, in the devices and methods herein, a driver calibration operation occurs using an external resistor when an I / O chip powers up. This creates a pure binary setting that is used to calibrate the I / O driver for specific combinations of process corner, supply voltage (including voltage drop across the power supply), and initial temperature. Once the I / O chip is running and performing transmit and receive operations, most of the change in driver impedance occurs due to temperature changes. However, rather than switching which resistors are turned on and which are turned off to adjust for temperature changes, the temperature change is instead calibrated with the devices disclosed herein using body bias (forward / reverse bias).In one example, up to 15% of the driver calibration change can be achieved through body bias. This change is linear and does not alter the binary code set at startup. With the structures described here, signal integrity is higher, thermometer coding is eliminated, and there is a reduction in the area in front of the driver chip and signal overload.

[0017] According to the presentation in Fig. 1, exemplary integrated circuit devices herein include (among other components) a logic circuit 102 that receives and generates data signals, and an input / output driver 104 electrically connected to the logic circuit 102. The input / output driver 104 has transmit and receive ports 122 that transmit and receive the data signals to and from the logic circuit 102, where the data signals are transferred between the logic circuit 102 and external devices 124 via the transmit and receive ports 122.

[0018] These structures also include a calibration circuit 106 electrically connected to the input / output driver 104, a bias generator 108 electrically connected to the calibration circuit 106 and the input / output driver 104, and a temperature sensor 110 electrically connected to the sensor. The calibration circuit 106 includes a comparator 116 connected to the switches 114 ( Fig. 2) the calibration circuit 106 and is electrically connected to a reference resistor 118 (a fixed impedance). A state machine 132 is electrically connected to the calibration circuit 106 to electronically store values ​​determined by the comparator 116 and to adjust the output of the bias generator 108.

[0019] According to the presentation in Fig. 1, the calibration circuit 106 and the input / output driver 104 each comprise a bank of resistors 130. Briefly referring to Fig. 2, which shows an exemplary bank of resistors 130 in more detail, the bank of resistors 130 is at least a binary-weighted bank comprising resistors 1120-112N and corresponding switches 114. The resistors 1120-112 N are binary weighted, meaning that each subsequent resistor (e.g., resistor 1121) has more resistance than the previous resistor (e.g., resistor 1120), so connecting a higher resistance resistor can increase the total resistance sufficiently to allow disconnecting one or more lower resistance resistors while increasing the total resistance of the bank of resistors 130.

[0020] As in Fig. 1, the input / output driver 104 (which may be, for example, a double data rate (DDR) or similar input / output driver) includes switches 126 connected to the separate logic devices 102. It should be noted that the logic devices 102 are not necessarily a component of the input / output driver 104, but are shown within the input / output driver 104 for ease of illustration. The input / output driver 104 includes differential resistors 128 connected to the switches 126 such that activation of the switches 126 distinguishes which of the differential resistors 128 are connected to and receive data from or to the transmit and receive ports 122.

[0021] Switches 114, 126 may be any suitable device capable of turning current off or on, such as transistors, and in particular, for example, fully depleted transistors, etc. In one example, the structures described herein utilize fully depleted transistor (FDX) devices, which include an undoped semiconductor layer having a thickness less than a channel depletion width. Thus, the electrical charge and, accordingly, the body potential of the field-effect transistor are fixed, which is helpful for avoiding or at least reducing the floating body effect and improving the controllability of the channel by an external bias.

[0022] More specifically, the bank of resistors 130 of the calibration circuit 106 is identical to the differential resistors 128 of the input / output driver 104. During an initial (power-on) calibration process, the state machine 132 incrementally connects such resistors 1120-112N by enabling / disabling (turning on / off) corresponding switches 114 until the comparator 116 indicates that the resistance of the bank of resistors 130 matches the resistance of the reference resistor 118. This specific pattern of connected and disconnected resistors is then applied by the state machine 132 via the logic elements 102 to the differential resistors 128 of the other I / O drivers, so that all input / output drivers 104 have the same resistance (impedance) as the calibration circuit 106 (which matches the reference resistor 118). As shown in the Fig. 1 and Fig. 2, the comparator 116 is therefore used to activate or deactivate selected switches 114 and 126, which thereby select the corresponding resistors 1120-112 N and 128 connect or disconnect. In some structures, the input / output driver 104 and the calibration circuit 106 are disposed on one substrate, but the reference resistor 118 is disposed on a different substrate than the one substrate to prevent the reference resistor 118 from being affected by the heat experienced by the input / output driver 104 and the calibration circuit 106.

[0023] Therefore, during a power-up operation, the comparator 116 is used to enable or disable selected switches 114 in the calibration circuit 106 (to adjust selected ones of the corresponding resistors 1120-112 Nto connect or disconnect) until the resistance of each of the bank of resistors 130 in the calibration circuit 106 matches the resistance of the reference resistor 118. The starting setting value, which indicates which of the resistors 1120-112 N The impedance of the switches 114 (typically a binary value (e.g., 0110)) connected to the input / output driver 104 is stored in electronic memory (e.g., a state machine 132) and provided to the input / output driver 104 so that all switches 126 in the input / output driver(s) 104 are activated in a similar manner. This allows each of the input / output drivers 104 to have the same impedance as the calibration circuit 106 (since the calibration circuit 106 is a duplicate of the input / output drivers 104).

[0024] The power-up operation differs from input / output operations because the power-up operation occurs immediately after power is applied to the calibration circuit 106 and the input / output driver 104 (e.g., within the first few seconds or fractions of a second after power is applied); in contrast, input / output operations are performed after the power-up operation is complete (e.g., after the first few seconds or fractions of a second during which power is applied). During input / output operations, the transmit and receive ports 122 send and receive data signals. In contrast, during power-up operations, no transmit or receive data signals are sent to or received from the transmit and receive ports 122.

[0025] It should be noted that the calibration circuit 106 does not perform any input / output operations because the calibration circuit 106 is used only for calibration. However, the calibration circuit 106 is physically located with the input / output driver(s) 104 and experiences the same temperature that the input / output driver(s) 104 experiences. Therefore, the resistance or impedance of the calibration circuit 106 changes identically to the input / output driver(s) 104 when the temperature changes. In addition, the operating temperature of the calibration circuit 106 and the input / output driver 104 is generally lower during the power-up process because the process of transmitting and receiving data signals during the input / output operations generates heat, which similarly increases the operating temperature of the calibration circuit 106 and the input / output driver 104.However, because the reference resistor 118 is physically separated from the calibration circuit 106 and the input / output driver(s) 104, the reference resistor 118 does not experience the temperature change that the calibration circuit 106 and the input / output driver 104 experience (the reference resistor 118 is thermally isolated from such temperature change).

[0026] As in the Fig. 1 and Fig. As shown in Figure 2, the bodies of switches 114, 126 are electrically connected to bias generator 108, and switches 114 are biased by a bias signal 120 output from bias generator 108. The body of a switch is an element that affects the channel region of a transistor and is distinct from the source / drain regions, the gate, or the channel. Therefore, the "body" can be the substrate on which the transistor is formed, a substrate gate of the transistor, etc. By changing the voltage of the "body" of the transistor, the threshold voltage (Vt) and current flow characteristics (impedance) of the transistor are changed.

[0027] The bias generator 108 adjusts the bias signal 120 when a temperature change is detected by the temperature sensor 110 during input / output operations (after the power-up process is complete). Specifically, the bias generator 108 (in response to a temperature change output by the temperature sensor 110 that exceeds a temperature change threshold) initiates a calibration process by sampling the voltage of the bias signal 120 until the output impedance of the bank of resistors 130 in the calibration circuit 106 matches the impedance of the reference resistor 118 (as detected by the comparator 116). In other words, during a temperature change-induced calibration process, the bias generator 108 begins at an initial voltage (e.g.,0 V) and gradually increases the bias voltage until the resistance / impedance of the bank of resistors 130 in the calibration circuit 106 matches the resistance of the external resistor 108. The bias generator 108 stores this voltage value (for example, in the state machine 132). This is done without connecting or disconnecting any of the resistors 112. Once the resistance / impedance of the resistor bank 130 and the reference resistor 118 match, the body bias 121 can set the state machine 132, which controls the bias generator 108, to output the newly established body bias 121 to all input / output drivers 104. The calibration is linear to compensate for temperature variations.

[0028] The switches 114, 126 change the current flow when they are biased differently by the changing voltage of the bias signal 120 and the body bias voltage 121 (after the turn-on process is complete). For example, Fig. 3 different currents 140 flowing through a transistor because the transistor is biased differently. This change in current flow, caused by voltage changes in the bias signal 120, adjusts how the calibration circuit 106 calibrates the input / output driver 104 in a calibration operation without changing which of the switches 114 are enabled or disabled. For example, if the temperature sensor 110 detects a temperature increase from the heat generated by the input / output operations, the bias generator 108 changes the bias signal 120 (increases or decreases the voltage) so that more or less current flows through the switches 114, 126 to the resistors 1120-112. N, 128, thereby compensating for the temperature change to maintain a consistent impedance of the I / O driver 104. In one example, the current may be increased as the temperature increases, or vice versa, or other relationships may be established, etc.

[0029] Therefore, comparator 116 is used to enable and disable switches 114 only when input / output driver 104 performs a power-on (start-up) operation and before any input / output operations are performed; however, bias generator 108 uses comparator 116 to adjust bias signal 120 based on temperature changes that occur after input / output driver 104 completes the power-on (start-up) operation and performs any input / output operation. In other words, none of switches 114 are enabled or disabled after the power-on operation is complete, because the change in current flow through resistors 1120-112 caused by changes in bias signal 120 Nfor different temperature conditions. By not changing the switches 114 during input / output operations (and instead only increasing / decreasing the voltage of the bias signal 120), the devices described herein avoid noise that may be induced when the switches 114 are changed during input / output operations.

[0030] As in Fig.4 in flowchart form, various methods described herein include (among other processes) a step of providing an input / output driver (element 200), which in turn may be, for example, a DDR or similar input / output driver. At point 202, these methods connect a calibration circuit to the input / output driver. The calibration circuit and the input / output driver each include a bank of resistors (e.g., a binary weighted bank) and corresponding switches. Such methods also connect a bias generator to the calibration circuit and the input / output driver at point 204 by connecting the bodies of the switches to the bias generator. During input / output operations, the switches are biased by a bias signal output from the bias generator.

[0031] Furthermore, these methods connect a temperature sensor (e.g., a thermometer device) to the bias voltage generator at item 206, and a comparator device (e.g., an operational amplifier, etc.) to the switches of the calibration circuit at item 208, and connect the comparator to a reference resistor at item 210. In forming such connections, the input / output driver and the calibration circuit may be positioned on a first substrate, and the reference resistor may be positioned on another substrate separate from the first substrate.

[0032] As mentioned above, the comparator device is used to match the resistance of the calibration circuit to the resistance of the reference resistor. The bias generator adjusts the bias signal when a temperature change is detected by the temperature sensor and changes the current flow in the switches when the bias signal changes. Thus, the change in current flow caused by changes in the bias signal adjusts how the calibration circuit calibrates the input / output driver for temperature changes that occur during input / output operations, without changing which of the switches is enabled or disabled.

[0033] The switches are enabled and disabled only when the input / output driver performs a power-up operation, but the bias generator adjusts the bias signal based on temperature changes that occur after the input / output driver completes the power-up operation. Thus, none of the switches are enabled or disabled after the input / output driver completes the power-up operation.

[0034] There are different types of transistors that have slight differences in their use in a circuit. For example, a bipolar transistor has terminals labeled base, collector, and emitter. A small current at the base terminal (i.e., flowing between the base and emitter) can control or switch a much larger current between the collector and emitter terminals. Another example is a field-effect transistor, which has terminals labeled gate, source, and drain. A voltage at the gate can control a current between the source and drain. Within such transistors, a semiconductor (channel region) is placed between the conductive source region and the similarly conductive drain (or conductive source / emitter region), and when the semiconductor is in a conductive state, the semiconductor allows electrical current to flow between source and drain, or collector and emitter.The gate is a conductive element electrically separated from the semiconductor by a gate oxide (which is an insulator); and current / voltage within the gate makes the channel region conductive, allowing electrical current to flow between the source and drain. Similarly, current flowing between the base and emitter makes the semiconductor conductive, allowing current to flow between the collector and emitter.

[0035] A positive-type P-type transistor uses impurities such as boron, aluminum, or gallium, etc., within an intrinsic semiconductor substrate (to create a deficit of valence electrons) as the semiconductor region. Similarly, an N-type transistor is a negative-type transistor that uses impurities such as antimony, arsenic, or phosphorus, etc., within an intrinsic semiconductor substrate (to create an excess of valence electrons) as the semiconductor region.

[0036] Generally, transistor structures are formed by depositing or implanting impurities into a substrate to form at least one semiconductor channel region defined by shallow trench isolation regions below the top surface of the substrate. A "substrate" herein may be any material suitable for the given purpose (whether known or developed in the future), and may include, for example, silicon-based wafers (bulk materials), ceramic materials, organic materials, oxide materials, nitride materials, etc., whether doped or undoped. Shallow trench isolation (STI) structures are generally formed by patterning openings / trenches within the substrate and growing or filling the openings with a highly insulating material (this allows different active regions of the substrate to be electrically isolated from each other).

[0037] While only one or a limited number of transistors are illustrated in the drawings, one of ordinary skill in the art would understand that many different types of transistors could be formed simultaneously with the embodiment described herein, and the drawings are intended to illustrate the simultaneous formation of multiple different types of transistors; however, the drawings have been simplified to show only a limited number of transistors for clarity and to enable the reader to more easily appreciate the various features illustrated. This is not intended to be limiting of the invention, as will be understood by those skilled in the art, since this invention is applicable to structures incorporating many of the transistor types shown in the drawings.

[0038] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the foregoing. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0039] Each respective figure, in addition to illustrating the methods and functionality of the present embodiments at various stages, also illustrates the logic of the method as implemented in whole or in part by one or more devices and structures. Such devices and structures are configured to implement the method described above (i.e., include one or more components, such as resistors, capacitors, transistors, and the like, connected to enable performance of a process). In other words, one or more computer hardware devices may be created that are configured to implement the method and processes described herein with reference to the figures and their corresponding description.

[0040] Embodiments described herein may be used in a variety of electronic applications, including, but not limited to, advanced sensors, memory / storage, semiconductors, microprocessors, and other applications. A resulting device and structure, such as an integrated circuit (IC) chip, may be distributed by the manufacturer in raw wafer form (i.e., a single wafer with multiple unpackaged chips), as a bare chip, or in a packaged form. In the latter case, the chip is mounted in a single-chip package (e.g., a plastic carrier with leads attached to a motherboard or other higher-level carrier) or in a multi-chip package (e.g., a ceramic carrier with surface interconnects and / or buried interconnects).In each case, the chip is then integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of either (a) an intermediate product such as a motherboard or (b) a final product. The final product can be any product containing integrated circuit chips, from toys and other low-end applications to sophisticated computer products with a display, keyboard, or other input device, and a central processor.

[0041] Although various embodiments have been described above, it should be understood that aspects contained herein may be encompassed by only some of the described embodiments. Accordingly, the following claims are not to be considered limited by the foregoing description. Reference to an element in the singular shall not mean "one and only one" unless expressly stated, but rather "one or more." All structural and functional equivalents to the elements of the various embodiments described throughout this disclosure or known to those skilled in the art are expressly incorporated herein by reference and are intended to be encompassed by this disclosure.

Claims

[1] Integrated circuit device comprising: an input / output driver (104); a calibration circuit (106) electrically connected to the input / output driver (104); a bias generator (108) electrically connected to the calibration circuit (106) and the input / output driver (104); a temperature sensor (110) electrically connected to the bias generator (108), wherein the calibration circuit (106) and the input / output driver (104) each comprise a bank of resistors (130) and corresponding switches (114), wherein bodies of the switches (114) are electrically connected to the bias generator (108), and wherein the switches (114) are biased by a bias signal output by the bias generator (108); and a comparator device (116) electrically connected to the calibration circuit (106) and a reference resistor (118), wherein the comparator device (116) matches a resistance of the calibration circuit (106) to the reference resistor (118), wherein the bias generator (108) adjusts the bias signal when a temperature change is detected by the temperature sensor (110), and wherein the switches (114) change a current flow when the bias signal changes without changing which switches (114) are activated and deactivated. [2] The integrated circuit device of claim 1, wherein the change in current flow caused by the bias signal changes settings of how the calibration circuit (106) calibrates the input / output driver (104). [3] The integrated circuit device of claim 1, wherein the activation and deactivation of one of the switches (114) is performed during a power-on operation, and wherein the bias generator (108) adjusts the bias signal based on temperature changes that occur after the input / output driver (104) has completed the power-on operation. [4] The integrated circuit device of claim 3, wherein none of the switches (114) is activated or deactivated after the input / output driver (104) has completed the power-up operation. [5] The integrated circuit device of claim 1, wherein the input / output driver (104) and the calibration circuit (106) are located on a first substrate and wherein the reference resistor (118) is located on a different substrate separate from the first substrate. [6] The integrated circuit device of claim 1, wherein the bank of resistors (130) comprises a binary weighted bank. [7] The integrated circuit device of claim 1, wherein the reference resistor (118) has a fixed impedance. [8] Integrated circuit device comprising: a logic circuit (102) that receives and generates data signals; an input / output driver (104) electrically connected to the logic circuit (102), the input / output driver (104) having transmit and receive terminals that transmit and receive the data signals to and from the logic circuit (102); a calibration circuit (106) electrically connected to the input / output driver (104); a bias generator (108) electrically connected to the calibration circuit (106) and the input / output driver (104); a temperature sensor (110) electrically connected to the bias generator (108), wherein the calibration circuit (106) and the input / output driver (104) each comprise a bank of resistors and corresponding switches (114) connected to each resistor of the bank of resistors, wherein bodies of the switches (114) are electrically connected to the bias generator (108), and wherein the switches (114) are biased by a bias signal output by the bias generator (108); and a comparator device (116) electrically connected to the calibration circuit (106) and to a reference resistor (118), wherein the comparator device (116) compares a resistance of the calibration circuit (106) with the reference resistance (118), wherein the bias voltage generator (108) adjusts the bias voltage signal when a temperature change is detected by the temperature sensor (110) by performing a calibration process using the calibration circuit (106) and the reference resistor (118) each time after the temperature change is detected, and wherein the switches (114) change a current flow when the bias signal changes without changing which switches (114) are activated and deactivated. [9] The integrated circuit device of claim 8, wherein the change in current flow caused by the bias signal changes settings as the calibration circuit (106) adjusts the input / output driver (104). [10] The integrated circuit device of claim 8, wherein the activation and deactivation of one of the switches (114) is performed during a power-on operation, and wherein the bias generator (108) adjusts the bias signal based on temperature changes that occur after the input / output driver (104) has completed the power-on operation. [11] The integrated circuit device of claim 10, wherein none of the switches (114) are activated or deactivated after the input / output driver (104) has completed the power-up operation. [12] The integrated circuit device of claim 8, wherein the input / output driver (104) and the calibration circuit (106) are located on a first substrate and wherein the reference resistor (118) is located on a different substrate separate from the first substrate. [13] The integrated circuit device of claim 8, wherein the bank of resistors (130) comprises a binary weighted bank. [14] The integrated circuit device of claim 8, wherein the reference resistor (118) has a fixed impedance. [15] Method comprising: providing an input / output driver (104); connecting a calibration circuit (106) to the input / output driver (104), the calibration circuit (106) and the input / output driver (104) each comprising a bank of resistors (130) and corresponding switches (114); connecting a bias generator (108) to the calibration circuit (106) and the input / output driver (104) by connecting bodies of the switches (114) to the bias generator (108), the switches (114) being biased by a bias signal output from the bias generator (108); connecting a temperature sensor (110) to the bias generator (108); connecting a comparator device (116) to the switches (114) of the calibration circuit (106); and connecting the comparator device (116) to a reference resistor (118), wherein the comparator device (116) compares a resistance of the calibration circuit (106) with a resistance of the reference resistor (118), wherein the bias voltage generator (108) adjusts the bias voltage signal when a temperature change is detected by the temperature sensor (110) by performing a calibration operation using the calibration circuit (106) and the reference resistor (118) each time after the temperature change is detected, and wherein the switches (114) change a current flow with the changes in temperature and the bias signal without changing which switches (114) are activated and deactivated. [16] The method of claim 15, wherein the change in current flow caused by the bias signal changes settings of how the calibration circuit (106) calibrates the input / output driver (104). [17] The method of claim 15, wherein the disabling and enabling of one of the switches (114) is performed during a power-on operation, and wherein the bias generator (108) adjusts the bias signal based on temperature changes that occur after the input / output driver (104) completes the power-on operation. [18] The method of claim 17, wherein none of the switches (114) are activated or deactivated after the input / output driver (104) has completed the power-up operation. [19] The method of claim 15, wherein the input / output driver (104) and the calibration circuit (106) are disposed on a first substrate, and wherein the reference resistor (118) is disposed on a different substrate separate from the first substrate. [20] The method of claim 15, wherein the bank of resistors (130) comprises a binary weighted bank.

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